aaaaaaaaaaaaaaaaaaaaaaaa

add J5 2016 LTE (EUR), fix build with new edk2 revision

.gitignore

@@ -1,2 +1 @@
 uefi.img
-linux.efi

MSM8916Pkg/AcpiTables/AcpiTables.inf

@@ -16,7 +16,7 @@
 
 [Defines]
   INF_VERSION                    = 0x00010005
-  BASE_NAME                      = Pixel3XLAcpiTables
+  BASE_NAME                      = MSM8916PkgAcpiTables
   FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD # Must be this
   MODULE_TYPE                    = USER_DEFINED
   VERSION_STRING                 = 1.0
@@ -36,7 +36,7 @@
   EmbeddedPkg/EmbeddedPkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
-  Pixel3XL/Pixel3XL.dec
+  MSM8916Pkg/MSM8916Pkg.dec
 
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCoreCount

MSM8916Pkg/CommonDsc.dsc.inc

@@ -98,7 +98,7 @@
   VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
 
   ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
-  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+  LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
 
   NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf
 
@@ -170,21 +170,21 @@
   HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
   MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
   DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
   ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
   UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
   PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
   DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
-  UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiTianoCustomDecompressLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
@@ -195,8 +195,8 @@
   UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
 
 [LibraryClasses.common.UEFI_DRIVER]
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
-  UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiTianoCustomDecompressLib.inf
   ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
@@ -208,7 +208,7 @@
   ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
 !ifndef CONFIG_NO_DEBUGLIB
-  DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+  DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
 !if $(TARGET) != RELEASE
   DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
@@ -323,5 +323,5 @@
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32
 
 [PcdsDynamicHii.common.DEFAULT]
-  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|0 # Variable: L"Timeout"
+  #gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|0 # Variable: L"Timeout"
 

MSM8916Pkg/Devices/j5lte.dsc

@@ -0,0 +1,24 @@
+[Defines]
+  PLATFORM_NAME                  = MSM8916Pkg
+  PLATFORM_GUID                  = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee
+  PLATFORM_VERSION               = 0.1
+  DSC_SPECIFICATION              = 0x00010019
+  OUTPUT_DIRECTORY               = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES        = AARCH64
+  BUILD_TARGETS                  = DEBUG|RELEASE
+  SKUID_IDENTIFIER               = DEFAULT
+  FLASH_DEFINITION               = MSM8916Pkg/MSM8916Pkg.fdf
+
+!include MSM8916Pkg/MSM8916Pkg.dsc
+
+[PcdsFixedAtBuild.common]
+  # System Memory (2GB)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
+  
+  # Framebuffer (720x1520)
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferAddress|0x0ec000000
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|720
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|1520
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth|720
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight|1520

MSM8916Pkg/Drivers/MSM8916PkgDxe/MSM8916PkgDxe.c

@@ -34,7 +34,7 @@
 #include <Protocol/LoadedImage.h>
 #include <Protocol/PlatformBootManager.h>
 
-#include "Pixel3XLDxe.h"
+#include "MSM8916PkgDxe.h"
 
 EFI_CPU_ARCH_PROTOCOL     *gCpu;
 
@@ -43,6 +43,7 @@ InitPeripherals (
   IN VOID
   )
 {
+ // MmioWrite32(0x004ab000, 0);
   /* This also crashes. Do you really hate memory attributes or something?
   EFI_STATUS            Status;
   // https://lists.01.org/pipermail/edk2-devel/2017-August/013417.html
@@ -80,7 +81,7 @@ OnEndOfDxe (
 
 EFI_STATUS
 EFIAPI
-Pixel3XLEntryPoint (
+MSM8916PkgEntryPoint (
   IN EFI_HANDLE         ImageHandle,
   IN EFI_SYSTEM_TABLE   *SystemTable
   )
@@ -88,6 +89,8 @@ Pixel3XLEntryPoint (
   EFI_STATUS            Status;
   EFI_EVENT             EndOfDxeEvent;
 
+  // MmioWrite32(0x10060000, 0);
+
   Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
   ASSERT_EFI_ERROR(Status);
 

MSM8916Pkg/Drivers/MSM8916PkgDxe/MSM8916PkgDxe.h

@@ -12,7 +12,7 @@
 *
 **/
 
-#ifndef __PIXEL3XLDXE_H__
+#ifndef __MSM8916PKGDXE_H__
-#define __PIXEL3XLDXE_H__
+#define __MSM8916PKGDXE_H__
 
-#endif /* __PIXEL3XLDXE_H__ */
+#endif /* __MSM8916PKGDXE_H__ */

MSM8916Pkg/Drivers/MSM8916PkgDxe/MSM8916PkgDxe.inf

@@ -12,14 +12,14 @@
 
 [Defines]
   INF_VERSION                    = 0x0001001a
-  BASE_NAME                      = Pixel3XLDxe
+  BASE_NAME                      = MSM8916PkgDxe
   FILE_GUID                      = 422BB380-0FFB-41EC-B86E-AE70F8A02DA3
   MODULE_TYPE                    = DXE_DRIVER
   VERSION_STRING                 = 1.0
-  ENTRY_POINT                    = Pixel3XLEntryPoint
+  ENTRY_POINT                    = MSM8916PkgEntryPoint
 
 [Sources.common]
-  Pixel3XLDxe.c
+  MSM8916PkgDxe.c
 
 [Packages]
   EmbeddedPkg/EmbeddedPkg.dec

MSM8916Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.c

@@ -10,7 +10,7 @@
 #include <Library/DxeServicesTableLib.h>
 #include <Protocol/GraphicsOutput.h>
 #include <Library/BaseLib.h>
-#include <Library/FrameBufferBltLib.h>
+#include "Library/FrameBufferBltLib.h"
 #include <Library/CacheMaintenanceLib.h>
 
 /// Defines
@@ -65,7 +65,7 @@ DISPLAY_DEVICE_PATH mDisplayDevicePath =
     }
 };
 
-/// Declares
+/// DeclaresSimpleFbDxe/SimpleFbDxe.c
 
 STATIC FRAME_BUFFER_CONFIGURE        *mFrameBufferBltLibConfigure;
 STATIC UINTN                         mFrameBufferBltLibConfigureSize;

MSM8916Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf

@@ -16,7 +16,7 @@
   MdeModulePkg/MdeModulePkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
   ArmPkg/ArmPkg.dec
-  Pixel3XL/Pixel3XL.dec
+  MSM8916Pkg/MSM8916Pkg.dec
 
 [LibraryClasses]
   BaseLib
@@ -35,9 +35,9 @@
   gEfiCpuArchProtocolGuid
 
 [FixedPcd]
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferAddress
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferWidth
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferWidth
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferHeight
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferHeight
 
 [Guids]
   gEfiMdeModulePkgTokenSpaceGuid

MSM8916Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf

@@ -37,7 +37,7 @@
   ArmPlatformPkg/ArmPlatformPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
-  Pixel3XL/Pixel3XL.dec
+  MSM8916Pkg/MSM8916Pkg.dec
 
 [LibraryClasses]
   ArmLib

MSM8916Pkg/Include/Chipset/bam.h

@@ -0,0 +1,222 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *   * Neither the name of The Linux Foundation nor the names of its
+ *     contributors may be used to endorse or promote products derived
+ *     from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __PLATFORM_MSM_SHARED_BAM_H
+#define __PLATFORM_MSM_SHARED_BAM_H
+
+#include <Library/LKEnvLib.h>
+
+#define BAM_DESC_SIZE                   8
+#define BAM_CE_SIZE                     16
+#define BAM_MAX_DESC_DATA_LEN           0xFFFF
+#define BAM_DATA_READ                   0
+#define BAM_DATA_WRITE                  1
+
+#define BAM_CTRL_REG(x)                 (0x0000 + (x))
+#define BAM_SW_RST_BIT_MASK             1
+#define BAM_ENABLE_BIT_MASK             (1 << 1)
+
+#define BAM_DESC_CNT_TRSHLD_REG(x)      (0x0008 + (x))
+#define COUNT_TRESHOLD_MASK             0xFF
+#define BAM_IRQ_SRCS(x)                 (0x0000000C + (x))
+#define BAM_IRQ_SRCS_MSK(x)             (0x00000010 + (x))
+#define BAM_IRQ_MASK                    (1 << 31)
+#define P_IRQ_MASK                      (1)
+
+/* Pipe Interrupt masks */
+enum p_int_type
+{
+	P_PRCSD_DESC_EN_MASK = 1,
+	P_OUT_OF_DESC_EN_MASK = (1 << 3),
+	P_ERR_EN_MASK = (1 << 4),
+	P_TRNSFR_END_EN_MASK = (1 << 5)
+};
+
+#define BAM_IRQ_STTS(x)                 (0x00000014 + (x))
+#define BAM_IRQ_SRCS_UNMASKED(x)        (0x00000030 + (x))
+
+#define BAM_IRQ_EN_REG(x)               (0x001C + (x))
+#define BAM_TIMER_EN_MASK               (1 << 4)
+/* Available only in BAM-Lite */
+#define BAM_EMPTY_EN_MASK               (1 << 3)
+#define BAM_ERROR_EN_MASK               (1 << 2)
+/* Available only in BAM */
+#define BAM_HRESP_ERR_EN_MASK           (1 << 1)
+
+#define BAM_TRUST_REG(x)                (0x00000070 + (x))
+#define BAM_EE_MASK                     (7 << 0)
+#define BAM_RESET_BLK_MASK              (1 << 7)
+#define BAM_LOCK_EE_CTRL_MASK           (1 << 13)
+
+#define BAM_CNFG_BITS(x)                (0x0000007C + (x))
+
+#define BAM_P_CTRLn(n, x)               (0x00001000 + 0x1000 * (n) + (x))
+#define P_SYS_MODE_MASK                 (1 << 5)
+/* 1: Producer mode 0: Consumer mode */
+#define P_DIRECTION_SHIFT               3
+#define P_ENABLE                        (1 << 1)
+
+#define BAM_P_RSTn(n, x)                (0x00001000 + 0x4 + 0x1000 * (n) + (x))
+#define BAM_P_IRQ_STTSn(n, x)           (0x00001000 + 0x10 + 0x1000 * (n) + (x))
+#define BAM_P_IRQ_CLRn(n, x)            (0x00001000 + 0x14 + 0x1000 * (n) + (x))
+#define BAM_P_IRQ_ENn(n, x)             (0x00001000 + 0x18 + 0x1000 * (n) + (x))
+#define BAM_P_TRUST_REGn(n, x)          (0x00001000 + 0x30 + 0x1000 * (n) + (x))
+#define BAM_P_SW_OFSTSn(n, x)           (0x00001800 + 0x1000 * (n) + (x))
+#define BAM_P_EVNT_REGn(n, x)           (0x00001818 + 0x1000 * (n) + (x))
+#define P_DESC_FIFO_PEER_OFST_MASK      0xFF
+
+#define BAM_P_DESC_FIFO_ADDRn(n, x)     (0x0000181C + 0x1000 * (n) + (x))
+#define BAM_P_FIFO_SIZESn(n, x)         (0x00001820 + 0x1000 * (n) + (x))
+
+/* Flags for descriptors */
+#define BAM_DESC_INT_FLAG               (1 << 7)
+#define BAM_DESC_EOT_FLAG               (1 << 6)
+#define BAM_DESC_EOB_FLAG               (1 << 5)
+#define BAM_DESC_NWD_FLAG               (1 << 4)
+#define BAM_DESC_CMD_FLAG               (1 << 3)
+#define BAM_DESC_LOCK_FLAG              (1 << 2)
+#define BAM_DESC_UNLOCK_FLAG            (1 << 1)
+
+enum bam_ce_cmd_t{
+	CE_WRITE_TYPE = 0,
+	CE_READ_TYPE = 1
+};
+
+/* result type */
+typedef enum {
+	BAM_RESULT_SUCCESS = 0,
+	BAM_RESULT_FAILURE = 1,
+	BAM_RESULT_TIMEOUT = 2
+} bam_result_t;
+
+
+/* Enum to define the BAM type:
+ * BAM2BAM:Producer BAM to Consumer BAM.
+ * SYS2BAM:Producer System to Consumer BAM.
+ * BAM2SYS:Producer BAM to Consumer System.
+ */
+enum bam_transaction_type {
+	SYS2BAM,
+	BAM2SYS,
+	BAM2BAM,
+};
+
+/* Enum to define BAM mode:
+ * SPS:Use BAM pipes.
+ * DIRECT:Pipes are disabled.
+ * LEGACY:BAM is not used.
+ */
+enum bam_mode {
+	SPS,
+	DIRECT,
+	LEGACY,
+};
+
+/* Enum to define BAM pipe states:
+ * ENABLED:Producer and Consumer pipes are enabled.
+ * HALT:Consumer pipe is halted. (Preferred type)
+ * FULL_HALT:Both Producer and Consumer pipes are halted.
+ */
+enum bam_pipe_state {
+	ENABLED,
+	HALT,
+	FULL_HALT,
+};
+
+enum bam_type {
+	BAM_LITE,
+	BAM,
+};
+
+/* Structure to define BAM descriptors that describe the data
+ * descriptors written to the data FIFO.
+ * addr:Descriptor address.
+ * size:Each descriptor is 8 bytes. Size of the descriptor fifo must
+ *      contain an integer number of Descriptors.
+ */
+struct bam_desc {
+	uint32_t addr;
+	uint16_t size;
+	uint8_t reserved;
+	uint8_t flags;
+} __PACKED;
+
+struct bam_desc_fifo {
+	struct bam_desc *head;
+	struct bam_desc *current;
+	uint16_t size;
+	uint16_t offset;
+};
+
+/* Structure to define BAM pipes
+ * pipe_state: BAM pipe states.
+ * trans_type: BAM tranaction type.
+ * evt_gen_threshold: This register configures the threshold value for
+ *                    Read/Write event generation by the BAM
+ *                    towards another BAM.
+ * fifo: Circular fifo associated with this pipe.
+ * num_pipe: Number of pipes used in this bam.
+ * pipe: Pipe number for this pipe.
+ */
+struct bam_pipe {
+	enum bam_pipe_state state;
+	enum bam_transaction_type trans_type;
+	struct bam_desc_fifo fifo;
+	uint16_t evt_gen_threshold;
+	uint8_t pipe_num;
+	uint8_t initialized;
+};
+
+/* Structure to define a BAM instance being used
+ * base:Base address for the BAM.
+ * type:BAM type.
+ * mode:BAM mode.
+ * pipe_pair:The pipe pairs to be used to access the BAM.
+ * threshold:This Register holds a threshold value for the
+ *           counter summing the Size of the Descriptors Provided.
+ * init:Pipe initialization status for the BAM.
+ */
+struct bam_instance {
+	uint32_t base;
+	enum bam_type type;
+	enum bam_mode mode;
+	uint8_t num_of_pipes;
+	struct bam_pipe pipe[3];
+	uint16_t threshold;
+	void (*callback)(int);
+};
+
+/* Command element(CE) structure*/
+struct cmd_element {
+	uint32_t addr_n_cmd;
+	uint32_t reg_data;
+	uint32_t reg_mask;
+	uint32_t reserve;
+} __PACKED;
+
+#endif

MSM8916Pkg/Include/Chipset/clock-local.h

@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *   * Neither the name of The Linux Foundation nor
+ *     the names of its contributors may be used to endorse or promote
+ *     products derived from this software without specific prior written
+ *     permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef CLOCK_LOCAL_H
+#define CLOCK_LOCAL_H
+
+struct clk;
+struct clk_ops;
+
+#define FREQ_END (UINT32_MAX - 1)
+#define F_END                                                                  \
+  {                                                                            \
+    .freq_hz = FREQ_END,                                                       \
+  }
+
+#define container_of(ptr, type, member)                                        \
+  ((type *)((addr_t)(ptr)-offsetof(type, member)))
+
+/*
+ * Bit manipulation macros
+ */
+#define BM(msb, lsb)                                                           \
+  (((((uint32_t)-1) << (31 - msb)) >> (31 - msb + lsb)) << lsb)
+#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
+
+/*
+ * Halt/Status Checking Mode Macros
+ */
+#define HALT 0         /* Bit pol: 1 = halted */
+#define NOCHECK 1      /* No bit to check, do nothing */
+#define HALT_VOTED 2   /* Bit pol: 1 = halted; delay on disable */
+#define ENABLE 3       /* Bit pol: 1 = running */
+#define ENABLE_VOTED 4 /* Bit pol: 1 = running; delay on disable */
+#define DELAY 5        /* No bit to check, just delay */
+
+/*
+ * Variables from clock-local driver
+ */
+extern struct fixed_clk gnd_clk;
+
+/*
+ * Generic frequency-definition structs and macros
+ */
+struct clk_freq_tbl {
+  const uint32_t freq_hz;
+  struct clk *   src_clk;
+  const uint32_t md_val;
+  const uint32_t ns_val;
+  const uint32_t ctl_val;
+  uint32_t       mnd_en_mask;
+  void *const    extra_freq_data;
+};
+
+extern struct clk_freq_tbl local_dummy_freq;
+
+/* Some clocks have two banks to avoid glitches when switching frequencies.
+ * The unused bank is programmed while running on the other bank, and
+ * switched to afterwards. The following two structs describe the banks. */
+struct bank_mask_info {
+  void *const    md_reg;
+  const uint32_t ns_mask;
+  const uint32_t rst_mask;
+  const uint32_t mnd_en_mask;
+  const uint32_t mode_mask;
+};
+
+struct bank_masks {
+  const uint32_t              bank_sel_mask;
+  const struct bank_mask_info bank0_mask;
+  const struct bank_mask_info bank1_mask;
+};
+
+/**
+ * struct branch - branch on/off
+ * @ctl_reg: clock control register
+ * @en_mask: ORed with @ctl_reg to enable the clock
+ * @halt_reg: halt register
+ * @halt_check: type of halt check to perform
+ * @halt_bit: ANDed with @halt_reg to test for clock halted
+ * @reset_reg: reset register
+ * @reset_mask: ORed with @reset_reg to reset the clock domain
+ */
+struct branch {
+  void *const    ctl_reg;
+  const uint32_t en_mask;
+
+  void *const    halt_reg;
+  const uint16_t halt_check;
+  const uint16_t halt_bit;
+
+  void *const    reset_reg;
+  const uint32_t reset_mask;
+};
+
+/*
+ * Generic clock-definition struct and macros
+ */
+struct rcg_clk {
+  bool        enabled;
+  void *const ns_reg;
+  void *const md_reg;
+
+  const uint32_t           root_en_mask;
+  uint32_t                 ns_mask;
+  const uint32_t           ctl_mask;
+  struct bank_masks *const bank_masks;
+
+  void (*set_rate)(struct rcg_clk *, struct clk_freq_tbl *);
+  struct clk_freq_tbl *freq_tbl;
+  struct clk_freq_tbl *current_freq;
+
+  struct clk *  depends;
+  struct branch b;
+  struct clk    c;
+};
+
+static inline struct rcg_clk *to_rcg_clk(struct clk *clk)
+{
+  return container_of(clk, struct rcg_clk, c);
+}
+
+/**
+ * struct fixed_clk - fixed rate clock (used for crystal oscillators)
+ * @rate: output rate
+ * @c: clk
+ */
+struct fixed_clk {
+  unsigned long rate;
+  struct clk    c;
+};
+
+static inline struct fixed_clk *to_fixed_clk(struct clk *clk)
+{
+  return container_of(clk, struct fixed_clk, c);
+}
+
+static inline unsigned fixed_clk_get_rate(struct clk *clk)
+{
+  struct fixed_clk *f = to_fixed_clk(clk);
+  return f->rate;
+}
+
+/**
+ * struct branch_clk - branch
+ * @enabled: true if clock is on, false otherwise
+ * @b: branch
+ * @parent: clock source
+ * @c: clk
+ *
+ * An on/off switch with a rate derived from the parent.
+ */
+struct branch_clk {
+  bool          enabled;
+  struct branch b;
+  struct clk *  parent;
+  struct clk    c;
+};
+
+static inline struct branch_clk *to_branch_clk(struct clk *clk)
+{
+  return container_of(clk, struct branch_clk, c);
+}
+
+int         branch_clk_enable(struct clk *clk);
+void        branch_clk_disable(struct clk *clk);
+struct clk *branch_clk_get_parent(struct clk *clk);
+int         branch_clk_set_parent(struct clk *clk, struct clk *parent);
+int         branch_clk_is_enabled(struct clk *clk);
+void        branch_clk_auto_off(struct clk *clk);
+int         branch_clk_reset(struct clk *c, enum clk_reset_action action);
+
+/**
+ * struct measure_clk - for rate measurement debug use
+ * @sample_ticks: sample period in reference clock ticks
+ * @multiplier: measurement scale-up factor
+ * @divider: measurement scale-down factor
+ * @c: clk
+ */
+struct measure_clk {
+  uint64_t   sample_ticks;
+  uint32_t   multiplier;
+  uint32_t   divider;
+  struct clk c;
+};
+
+extern struct clk_ops clk_ops_measure;
+
+static inline struct measure_clk *to_measure_clk(struct clk *clk)
+{
+  return container_of(clk, struct measure_clk, c);
+}
+
+/*
+ * clk_ops APIs
+ */
+int         local_clk_enable(struct clk *c);
+void        local_clk_disable(struct clk *c);
+int         local_clk_set_rate(struct clk *c, unsigned rate);
+unsigned    local_clk_get_rate(struct clk *c);
+int         local_clk_is_enabled(struct clk *clk);
+long        local_clk_round_rate(struct clk *c, unsigned rate);
+struct clk *local_clk_get_parent(struct clk *clk);
+
+/*
+ * Generic set-rate implementations
+ */
+void set_rate_mnd(struct rcg_clk *clk, struct clk_freq_tbl *nf);
+void set_rate_mnd_banked(struct rcg_clk *clk, struct clk_freq_tbl *nf);
+void set_rate_nop(struct rcg_clk *clk, struct clk_freq_tbl *nf);
+#endif

MSM8916Pkg/Include/Chipset/clock.h

@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2012, 2014, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *   * Neither the name of The Linux Foundation nor
+ *     the names of its contributors may be used to endorse or promote
+ *     products derived from this software without specific prior written
+ *     permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef CLOCK_H
+#define CLOCK_H
+
+enum clk_reset_action { CLK_RESET_DEASSERT = 0, CLK_RESET_ASSERT = 1 };
+
+struct clk;
+struct clk_ops {
+  int (*enable)(struct clk *clk);
+  void (*disable)(struct clk *clk);
+  void (*auto_off)(struct clk *clk);
+  int (*reset)(struct clk *clk, enum clk_reset_action action);
+  int (*set_rate)(struct clk *clk, unsigned rate);
+  int (*set_min_rate)(struct clk *clk, unsigned rate);
+  int (*set_max_rate)(struct clk *clk, unsigned rate);
+  int (*set_flags)(struct clk *clk, unsigned flags);
+  unsigned (*get_rate)(struct clk *clk);
+  int (*list_rate)(struct clk *clk, unsigned n);
+  int (*is_enabled)(struct clk *clk);
+  long (*round_rate)(struct clk *clk, unsigned rate);
+  int (*set_parent)(struct clk *clk, struct clk *parent);
+  struct clk *(*get_parent)(struct clk *clk);
+  bool (*is_local)(struct clk *clk);
+};
+
+/**
+ * struct clk
+ * @count: enable refcount
+ * @lock: protects clk_enable()/clk_disable() path and @count
+ */
+struct clk {
+  uint32_t        flags;
+  uint32_t        rate;
+  struct clk_ops *ops;
+  const char *    dbg_name;
+  unsigned        count;
+};
+
+struct clk_lookup {
+  const char *con_id;
+  struct clk *clk;
+};
+
+struct clk_list {
+  struct clk_lookup *clist;
+  unsigned           num;
+};
+
+#define CLK_LOOKUP(con, c)                                                     \
+  {                                                                            \
+    .con_id = con, .clk = &c                                                   \
+  }
+
+#endif

MSM8916Pkg/Include/Chipset/clock_lib2.h

@@ -0,0 +1,223 @@
+/*
+ * Copyright (c) 2012-2014, Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *   * Neither the name of Linux Foundation nor
+ *     the names of its contributors may be used to endorse or promote
+ *     products derived from this software without specific prior written
+ *     permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __CLOCK_LIB2_H
+#define __CLOCK_LIB2_H
+
+/*
+ * Bit manipulation macros
+ */
+#define BM(msb, lsb)                                                           \
+  (((((uint32_t)-1) << (31 - msb)) >> (31 - msb + lsb)) << lsb)
+#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
+
+#define container_of(ptr, type, member)                                        \
+  ((type *)((addr_t)(ptr)-offsetof(type, member)))
+
+/* Frequency Macros */
+#define FREQ_END (UINT32_MAX - 1)
+#define F_END                                                                  \
+  {                                                                            \
+    .freq_hz = FREQ_END,                                                       \
+  }
+
+/* F(frequency, source, div, m, n) */
+#define F(f, s, div, m, n)                                                     \
+  {                                                                            \
+    .freq_hz = (f), .src_clk = &s##_clk_src.c, .m_val = (m),                   \
+    .n_val = ~((n) - (m)) * !!(n), .d_val = ~(n),                              \
+    .div_src_val =                                                             \
+        BVAL(4, 0, (int)(2 * (div)-1)) | BVAL(10, 8, s##_source_val),          \
+  }
+
+/* F(frequency, source, div, m, n) */
+#define F_EXT_SRC(f, s, div, m, n)                                             \
+  {                                                                            \
+    .freq_hz = (f), .m_val = (m), .n_val = ~((n) - (m)) * !!(n),               \
+    .d_val = ~(n),                                                             \
+    .div_src_val =                                                             \
+        BVAL(4, 0, (int)(2 * (div)-1)) | BVAL(10, 8, s##_source_val),          \
+  }
+
+/* F_MM(frequency, source, div, m, n) */
+#define F_MM(f, s, div, m, n)                                                  \
+  {                                                                            \
+    .freq_hz = (f), .src_clk = &s##_clk_src.c, .m_val = (m),                   \
+    .n_val = ~((n) - (m)) * !!(n), .d_val = ~(n),                              \
+    .div_src_val =                                                             \
+        BVAL(4, 0, (int)(2 * (div)-1)) | BVAL(10, 8, s##_mm_source_val),       \
+  }
+
+#define F_MDSS(f, s, div, m, n)                                                \
+  {                                                                            \
+    .freq_hz = (f), .m_val = (m), .n_val = ~((n) - (m)) * !!(n),               \
+    .d_val = ~(n),                                                             \
+    .div_src_val =                                                             \
+        BVAL(4, 0, (int)(2 * (div)-1)) | BVAL(10, 8, s##_mm_source_val),       \
+  }
+
+/* Branch Clock Bits */
+#define CBCR_BRANCH_ENABLE_BIT BIT(0)
+#define CBCR_BRANCH_OFF_BIT BIT(31)
+#define BRANCH_CHECK_MASK BM(31, 28)
+#define BRANCH_ON_VAL BVAL(31, 28, 0x0)
+#define BRANCH_NOC_FSM_ON_VAL BVAL(31, 28, 0x2)
+
+/* Root Clock Bits */
+#define CMD_UPDATE_BIT BIT(0)
+#define CMD_UPDATE_MASK 1
+
+#define CFG_SRC_DIV_OFFSET 0
+#define CFG_SRC_DIV_MASK (0x1F << CFG_SRC_DIV_OFFSET)
+
+#define CFG_SRC_SEL_OFFSET 8
+#define CFG_SRC_SEL_MASK (0x3 << CFG_SRC_SEL_OFFSET)
+
+#define CFG_MODE_DUAL_EDGE 0x2
+
+#define CFG_MODE_OFFSET 12
+#define CFG_MODE_MASK (0x3 << CFG_MODE_OFFSET)
+
+/*
+ * Generic frequency-definition structs and macros
+ */
+struct clk_freq_tbl {
+
+  const uint32_t freq_hz;
+  struct clk *   src_clk;
+  const uint32_t div_src_val;
+
+  /* TODO: find out if sys_vdd is needed. */
+
+  const uint32_t m_val;
+  const uint32_t n_val; /* not_n_minus_m_val */
+  const uint32_t d_val; /* not_2d_val        */
+};
+
+/* Fixed clock */
+struct fixed_clk {
+  struct clk c;
+};
+
+/* Branch clock */
+struct branch_clk {
+
+  uint32_t *const bcr_reg;
+  uint32_t *const cbcr_reg;
+
+  void (*set_rate)(struct branch_clk *, struct clk_freq_tbl *);
+
+  struct clk *parent;
+  struct clk  c;
+
+  int      has_sibling;
+  uint32_t cur_div;
+  uint32_t max_div;
+  uint32_t halt_check;
+};
+
+/* Root Clock */
+struct rcg_clk {
+
+  /* RCG registers for this clock */
+
+  uint32_t *const cmd_reg; /* Command reg */
+  uint32_t *const cfg_reg; /* Config  reg */
+  uint32_t *const m_reg;   /*       m     */
+  uint32_t *const n_reg;   /* not (n-m)   */
+  uint32_t *const d_reg;   /* not (2d)    */
+
+  /* set rate function for this clock */
+  void (*set_rate)(struct rcg_clk *, struct clk_freq_tbl *);
+
+  /* freq table */
+  struct clk_freq_tbl *freq_tbl;
+  struct clk_freq_tbl *current_freq;
+
+  struct clk c;
+};
+
+/* Vote Clock */
+struct vote_clk {
+
+  uint32_t *const cbcr_reg;
+  uint32_t *const vote_reg;
+  uint32_t        en_mask;
+
+  struct clk c;
+};
+
+struct reset_clk {
+  uint32_t   bcr_reg;
+  struct clk c;
+};
+
+static inline struct reset_clk *to_reset_clk(struct clk *clk)
+{
+  return container_of(clk, struct reset_clk, c);
+}
+
+static inline struct rcg_clk *to_rcg_clk(struct clk *clk)
+{
+  return container_of(clk, struct rcg_clk, c);
+}
+
+static inline struct branch_clk *to_branch_clk(struct clk *clk)
+{
+  return container_of(clk, struct branch_clk, c);
+}
+
+static inline struct vote_clk *to_local_vote_clk(struct clk *clk)
+{
+  return container_of(clk, struct vote_clk, c);
+}
+
+/* RCG clock functions */
+int  clock_lib2_rcg_enable(struct clk *c);
+int  clock_lib2_rcg_set_rate(struct clk *c, unsigned rate);
+void clock_lib2_rcg_set_rate_mnd(
+    struct rcg_clk *rclk, struct clk_freq_tbl *freq);
+void clock_lib2_rcg_set_rate_hid(
+    struct rcg_clk *rclk, struct clk_freq_tbl *freq);
+
+/* CXO clock functions */
+int  cxo_clk_enable(struct clk *clk);
+void cxo_clk_disable(struct clk *clk);
+
+/* Branch clock functions */
+int  clock_lib2_branch_clk_enable(struct clk *clk);
+void clock_lib2_branch_clk_disable(struct clk *clk);
+int  clock_lib2_branch_set_rate(struct clk *c, unsigned rate);
+
+/* Vote clock functions*/
+int  clock_lib2_vote_clk_enable(struct clk *c);
+void clock_lib2_vote_clk_disable(struct clk *c);
+/* clock reset function */
+int clock_lib2_reset_clk_reset(struct clk *c, enum clk_reset_action action);
+int clock_lib2_branch_clk_reset(struct clk *c, enum clk_reset_action action);
+#endif

MSM8916Pkg/Include/Chipset/clock_pll.h

@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *   * Neither the name of The Linux Foundation nor
+ *     the names of its contributors may be used to endorse or promote
+ *     products derived from this software without specific prior written
+ *     permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef CLOCK_PLL_H
+#define CLOCK_PLL_H
+
+/*
+ * Bit manipulation macros
+ */
+#define BM(msb, lsb)                                                           \
+  (((((uint32_t)-1) << (31 - msb)) >> (31 - msb + lsb)) << lsb)
+#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
+
+struct clk;
+struct clk_ops;
+
+#define container_of(ptr, type, member)                                        \
+  ((type *)((addr_t)(ptr)-offsetof(type, member)))
+
+/**
+ * struct pll_vote_clk - phase locked loop (HW voteable)
+ * @rate: output rate
+ * @en_reg: enable register
+ * @en_mask: ORed with @en_reg to enable the clock
+ * @status_reg: status register
+ * @parent: clock source
+ * @c: clk
+ */
+struct pll_vote_clk {
+  unsigned long rate;
+
+  void *const    en_reg;
+  const uint32_t en_mask;
+
+  void *const    status_reg;
+  const uint32_t status_mask;
+
+  struct clk *parent;
+  struct clk  c;
+};
+
+static inline struct pll_vote_clk *to_pll_vote_clk(struct clk *clk)
+{
+  return container_of(clk, struct pll_vote_clk, c);
+}
+
+/**
+ * struct pll_clk - phase locked loop
+ * @rate: output rate
+ * @mode_reg: enable register
+ * @parent: clock source
+ * @c: clk
+ */
+struct pll_clk {
+  unsigned long rate;
+
+  void *const mode_reg;
+
+  struct clk *parent;
+  struct clk  c;
+};
+
+static inline struct pll_clk *to_pll_clk(struct clk *clk)
+{
+  return container_of(clk, struct pll_clk, c);
+}
+
+int         pll_vote_clk_enable(struct clk *clk);
+void        pll_vote_clk_disable(struct clk *clk);
+unsigned    pll_vote_clk_get_rate(struct clk *clk);
+struct clk *pll_vote_clk_get_parent(struct clk *clk);
+int         pll_vote_clk_is_enabled(struct clk *clk);
+
+int         pll_clk_enable(struct clk *clk);
+void        pll_clk_disable(struct clk *clk);
+unsigned    pll_clk_get_rate(struct clk *clk);
+struct clk *pll_clk_get_parent(struct clk *clk);
+#endif

MSM8916Pkg/Include/Configuration/BootDevices.h

@@ -0,0 +1,34 @@
+#ifndef _BOOT_DEVICES_H_
+#define _BOOT_DEVICES_H_
+
+#include <Library/DevicePathLib.h>
+#include <Uefi.h>
+
+#define PLAT_KEYPAD_DEVICE_GUID                                                \
+  {                                                                            \
+    0xD7F58A0E, 0xBED2, 0x4B5A,                                                \
+    {                                                                          \
+      0xBB, 0x43, 0x8A, 0xB2, 0x3D, 0xD0, 0xE2, 0xB0                           \
+    }                                                                          \
+  }
+
+/* DevicePath definition for Button driver */
+#pragma pack(1)
+typedef struct {
+  VENDOR_DEVICE_PATH       VendorDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL End;
+} EFI_KEYPAD_DEVICE_PATH;
+#pragma pack()
+
+EFI_KEYPAD_DEVICE_PATH KeyPadDxeDevicePath = {
+    {{HARDWARE_DEVICE_PATH,
+      HW_VENDOR_DP,
+      {(UINT8)(sizeof(VENDOR_DEVICE_PATH)),
+       (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8)}},
+     PLAT_KEYPAD_DEVICE_GUID},
+    {END_DEVICE_PATH_TYPE,
+     END_ENTIRE_DEVICE_PATH_SUBTYPE,
+     {(UINT8)(END_DEVICE_PATH_LENGTH),
+      (UINT8)((END_DEVICE_PATH_LENGTH) >> 8)}}};
+
+#endif

MSM8916Pkg/Include/Configuration/DeviceMemoryMap.h

@@ -0,0 +1,277 @@
+#ifndef _DEVICE_MEMORY_MAP_H_
+#define _DEVICE_MEMORY_MAP_H_
+
+#include <Library/ArmLib.h>
+
+#define MAX_ARM_MEMORY_REGION_DESCRIPTOR_COUNT 73
+
+/* Below flag is used for system memory */
+#define SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES                               \
+  EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |        \
+      EFI_RESOURCE_ATTRIBUTE_TESTED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |     \
+      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |                               \
+      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |                         \
+      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |                            \
+      EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE
+
+typedef enum { NoHob, AddMem, AddDev, MaxMem } DeviceMemoryAddHob;
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESS         Address;
+  UINT64                       Length;
+  EFI_RESOURCE_TYPE            ResourceType;
+  EFI_RESOURCE_ATTRIBUTE_TYPE  ResourceAttribute;
+  ARM_MEMORY_REGION_ATTRIBUTES ArmAttributes;
+  DeviceMemoryAddHob           HobOption;
+  EFI_MEMORY_TYPE              MemoryType;
+} ARM_MEMORY_REGION_DESCRIPTOR_EX, *PARM_MEMORY_REGION_DESCRIPTOR_EX;
+
+static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = {
+    /* Address,	  Length,     ResourceType, Resource Attribute, ARM MMU
+       Attribute,                  HobOption, EFI Memory Type */
+       
+    /*  HYP  */
+    {0x80000000, 0x00600000, EFI_RESOURCE_MEMORY_RESERVED,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
+     AddMem, EfiReservedMemoryType},
+    /*  AOP CMD DB  */
+    {0x80820000, 0x00020000, EFI_RESOURCE_MEMORY_RESERVED,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
+     AddMem, EfiReservedMemoryType},
+    /*  SMEM  */
+    {0x80900000, 0x00200000, EFI_RESOURCE_MEMORY_RESERVED,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
+     AddMem, EfiReservedMemoryType},
+    /*  PIL Reserved  */
+    {0x84400000, 0x0F800000, EFI_RESOURCE_MEMORY_RESERVED,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
+     AddMem, EfiReservedMemoryType},
+    /*  DXE Heap  */    
+    {0x93C00000, 0x04500000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiConventionalMemory},
+    /*  DBI Dump  */    
+    {0x98100000, 0x03700000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_INITIALIZED, ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
+     NoHob, EfiConventionalMemory},
+    /*  Sched Heap  */    
+    {0x9B800000, 0x00400000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData},
+    /*  Display Reserved  */    
+    {0x9C000000, 0x01800000, EFI_RESOURCE_MEMORY_RESERVED,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
+     AddMem, EfiReservedMemoryType},
+    /*  FV Region  */
+    {0x9F800000, 0x00200000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData},
+    /*  ABOOT FV  */
+    {0x9FA00000, 0x00200000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiReservedMemoryType},
+    /*  UEFI FD  */    
+    {0x9FC00000, 0x00300000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData},
+    /*  SEC Heap  */    
+    {0x9FF00000, 0x0008C000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData}, 
+    /*  CPU Vectors  */    
+    {0x9FF8C000, 0x00001000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData},
+    /*  MMU PageTables  */ 
+    {0x9FF8D000, 0x00003000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData},
+    /*  UEFI Stack  */ 
+    {0x9FF90000, 0x00040000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiBootServicesData},
+    /*  Log Buffer  */ 
+    {0x9FFF7000, 0x00008000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiRuntimeServicesData},
+    /*  Info Blk  */ 
+    {0x9FFFF000, 0x00001000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiRuntimeServicesData},
+    /*  Secure DSP  */ 
+    {0xA0000000, 0x01200000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiReservedMemoryType},
+    /*  Kernel  */
+    {0xA1200000, 0x08000000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiReservedMemoryType},
+    /*  MLVM_APSS  */
+    {0xA9200000, 0x03A00000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiReservedMemoryType},
+    /*  MLVM_1  */
+    {0xACC00000, 0x07800000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiReservedMemoryType},
+    /*  SEC DEBUG  */
+    {0xB4400000, 0x00C00000, EFI_RESOURCE_MEMORY_RESERVED,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
+     AddMem, EfiReservedMemoryType},
+    /*  SOD Test  */
+    {0xC2000000, 0x0A100000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiReservedMemoryType},
+
+    /*  HLOS  */
+    {0xC0000000, 0x140000000, EFI_RESOURCE_SYSTEM_MEMORY,
+     SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+     AddMem, EfiConventionalMemory},
+
+    /* Other memory regions */
+    /* AOP_SS_MSG_RAM */
+    {0x0C300000, 0x00100000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_INITIALIZED, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     NoHob, EfiConventionalMemory},
+     /* IMEM Base */
+    {0x14680000, 0x0002B000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_INITIALIZED, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     NoHob, EfiConventionalMemory},
+     /* IMEM Cookie Base */
+    {0x146AA000, 0x00001000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_INITIALIZED, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiConventionalMemory},
+
+    /*  Registers  */ 
+    {0x00100000, 0x00200000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x00780000, 0x00007000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x00790000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x007C0000, 0x00020000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x00800000, 0x00100000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x00A00000, 0x00100000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x01D80000, 0x00020000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x01DC0000, 0x00040000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x01FC0000, 0x00040000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x03500000, 0x00300000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x03900000, 0x00300000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x03D00000, 0x00300000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x05090000, 0x00009000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0509A000, 0x00004000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0C200000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x62B00000, 0x00060000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x08800000, 0x00200000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x090B0000, 0x00001000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0A600000, 0x0011B000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0A720000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0B2A0000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0B4A0000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0BA00000, 0x00200000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0C221000, 0x00003000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0C263000, 0x00003000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0C400000, 0x02800000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0AB00000, 0x00020000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x09980000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0AD00000, 0x00020000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0AF00000, 0x00020000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x18280000, 0x00001000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x18282000, 0x00001000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x18284000, 0x00001000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x18200000, 0x00030000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x17A00000, 0x00010000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x17A60000, 0x00100000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x17C00000, 0x00110000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x18300000, 0x000B0000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x0AE00000, 0x00134000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+    {0x15000000, 0x000D0000, EFI_RESOURCE_MEMORY_MAPPED_IO,
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE,
+     AddDev, EfiMemoryMappedIO},
+
+    /* Terminator for MMU*/
+    {0},
+
+    /* Terminator for LibMem */
+    { 0xFFFFFFFF, 0x00001000, EFI_RESOURCE_MEMORY_MAPPED_IO, 
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, ARM_MEMORY_REGION_ATTRIBUTE_DEVICE, 
+     AddDev, EfiMemoryMappedIO}
+
+};
+
+#endif

MSM8916Pkg/Include/Library/FrameBufferSerialPortLib.h

@@ -0,0 +1,41 @@
+#ifndef _FRAMEBUFFER_SERIALPORT_LIB_H_
+#define _FRAMEBUFFER_SERIALPORT_LIB_H_
+
+typedef struct _FBCON_POSITION {
+    INTN x;
+    INTN y;
+} FBCON_POSITION, *PFBCON_POSITION;
+
+typedef struct _FBCON_COLOR {
+    UINTN Foreground;
+    UINTN Background;
+} FBCON_COLOR, *PFBCON_COLOR;
+
+enum FbConMsgType {
+	/* type for menu */
+	FBCON_COMMON_MSG = 0,
+	FBCON_UNLOCK_TITLE_MSG,
+	FBCON_TITLE_MSG,
+	FBCON_SUBTITLE_MSG,
+
+	/* type for warning */
+	FBCON_YELLOW_MSG,
+	FBCON_ORANGE_MSG,
+	FBCON_RED_MSG,
+	FBCON_GREEN_MSG,
+
+	/* and the select message's background */
+	FBCON_SELECT_MSG_BG_COLOR,
+};
+
+void ResetFb(void);
+
+UINTN
+EFIAPI
+SerialPortWriteCritical
+(
+	IN UINT8     *Buffer,
+	IN UINTN     NumberOfBytes
+);
+
+#endif

MSM8916Pkg/Include/Library/LKEnvLib.h

@@ -0,0 +1,111 @@
+#ifndef __LIBRARY_LKENV_H__
+#define __LIBRARY_LKENV_H__
+
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PrintLib.h>
+#include <Library/TimerLib.h>
+
+#include "minstdbool.h"
+#include "minstdint.h"
+
+
+#define REG32(addr) ((volatile uint32_t *)(addr))
+#define writel_rt(v, a) (*REG32(a) = (v))
+#define readl_rt(a) (*REG32(a))
+
+#define writel(v, a) MmioWrite32((UINTN)(a), (UINT32)(v))
+#define readl(a) MmioRead32((UINTN)(a))
+#define writeb(v, a) MmioWrite8((UINTN)(a), (UINT8)(v))
+#define readb(a) MmioRead8((UINTN)(a))
+#define writehw(v, a) MmioWrite16((UINTN)(a), (UINT16)(v))
+#define readhw(a) MmioRead16((UINTN)(a))
+#define RMWREG32(addr, startbit, width, val)                                   \
+  writel(                                                                      \
+      (readl(addr) & ~(((1 << (width)) - 1) << (startbit))) |                  \
+          ((val) << (startbit)),                                               \
+      addr)
+#define BIT(bit) (1 << (bit))
+
+#ifdef MSM_SECURE_IO
+#define readl_relaxed secure_readl
+#define writel_relaxed secure_writel
+#else
+#define readl_relaxed readl
+#define writel_relaxed writel
+#endif
+
+#define NO_ERROR 0
+#define ERROR -1
+#define ERR_NOT_FOUND -2
+#define ERR_NO_MEMORY -5
+#define ERR_NOT_VALID -7
+#define ERR_INVALID_ARGS -8
+#define ERR_IO -20
+#define ERR_NOT_SUPPORTED -24
+
+#include "minstdbool.h"
+#include "minstring.h"
+
+#define va_list VA_LIST
+#define offsetof(type, member) OFFSET_OF(type, member)
+#define __PACKED __attribute__((packed))
+
+#define ROUNDUP(a, b) (((a) + ((b)-1)) & ~((b)-1))
+#define ROUNDDOWN(a, b) ((a) & ~((b)-1))
+#define CACHE_LINE (ArmDataCacheLineLength())
+#define IS_CACHE_LINE_ALIGNED(addr) !((UINTN)(addr) & (CACHE_LINE - 1))
+
+#define snprintf(s, n, fmt, ...)                                               \
+  ((int)AsciiSPrint((s), (n), (fmt), ##__VA_ARGS__))
+
+/* debug levels */
+#define CRITICAL DEBUG_ERROR
+#define ALWAYS DEBUG_ERROR
+#define INFO DEBUG_INFO
+#define SPEW DEBUG_VERBOSE
+
+#if !defined(MDEPKG_NDEBUG)
+#define dprintf(level, fmt, ...)                                               \
+  do {                                                                         \
+    if (DebugPrintEnabled()) {                                                 \
+      CHAR8 __printbuf[100];                                                   \
+      UINTN __printindex;                                                      \
+      CONST CHAR8 *__fmtptr = (fmt);                                           \
+      UINTN        __fmtlen = AsciiStrSize(__fmtptr);                          \
+      CopyMem(__printbuf, __fmtptr, __fmtlen);                                 \
+      __printbuf[__fmtlen - 1] = 0;                                            \
+      for (__printindex = 1; __printbuf[__printindex]; __printindex++) {       \
+        if (__printbuf[__printindex - 1] == '%' &&                             \
+            __printbuf[__printindex] == 's')                                   \
+          __printbuf[__printindex] = 'a';                                      \
+      }                                                                        \
+      DEBUG(((level), __printbuf, ##__VA_ARGS__));                             \
+    }                                                                          \
+  } while (0)
+#else
+#define dprintf(level, fmt, ...)
+#endif
+
+#define ntohl(n) SwapBytes32(n)
+
+#define dmb() ArmDataMemoryBarrier()
+#define dsb() ArmDataSynchronizationBarrier()
+
+#define mdelay(msecs) MicroSecondDelay((msecs)*1000)
+#define udelay(usecs) MicroSecondDelay((usecs))
+
+#define arch_clean_invalidate_cache_range(start, len)                          \
+  WriteBackInvalidateDataCacheRange((VOID *)(UINTN)(start), (UINTN)(len))
+#define arch_invalidate_cache_range(start, len)                                \
+  InvalidateDataCacheRange((VOID *)(UINTN)(start), (UINTN)(len));
+
+#define __ALWAYS_INLINE __attribute__((always_inline))
+
+#define ROUND_TO_PAGE(x) (x & (~(EFI_PAGE_SIZE - 1)))
+
+#endif

MSM8916Pkg/Include/Library/Pow2Lib.h

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __LIBRARY_POW2_H
+#define __LIBRARY_POW2_H
+
+#include <Library/LKEnvLib.h>
+
+/* routines for dealing with power of 2 values for efficiency */
+STATIC inline __ALWAYS_INLINE BOOLEAN ispow2(UINTN val)
+{
+	return ((val - 1) & val) == 0;
+}
+
+STATIC inline __ALWAYS_INLINE UINTN log2(UINTN val)
+{
+	if (!ispow2(val))
+		return 0; // undefined
+
+	return __builtin_ctz(val);
+}
+
+STATIC inline __ALWAYS_INLINE UINTN valpow2(UINTN valp2)
+{
+	return 1 << valp2;
+}
+
+STATIC inline __ALWAYS_INLINE UINTN divpow2(UINTN val, UINTN divp2)
+{
+	return val >> divp2;
+}
+
+STATIC inline __ALWAYS_INLINE UINTN modpow2(UINTN val, UINTN modp2)
+{
+	return val & ((1UL << modp2) - 1);
+}
+
+
+#endif

MSM8916Pkg/Include/Library/QcomClockLib.h

@@ -0,0 +1,12 @@
+#ifndef __LIBRARY_QCOM_CLOCK_LIB_H__
+#define __LIBRARY_QCOM_CLOCK_LIB_H__
+
+#include <Protocol/QcomClock.h>
+
+RETURN_STATUS
+EFIAPI
+ClockImplLibInitialize(VOID);
+
+extern QCOM_CLOCK_PROTOCOL *gClock;
+
+#endif

MSM8916Pkg/Include/Library/QcomPlatformClockInitLib.h

@@ -0,0 +1,11 @@
+#ifndef __LIBRARY_QCOM_PLATFORM_CLOCKINIT_LIB_H__
+#define __LIBRARY_QCOM_PLATFORM_CLOCKINIT_LIB_H__
+
+#include <Chipset/clock.h>
+#include <Library/LKEnvLib.h>
+
+EFI_STATUS
+EFIAPI
+LibQcomPlatformClockInit(struct clk_lookup **clist, unsigned *num);
+
+#endif

MSM8916Pkg/Include/Library/minstdbool.h

@@ -0,0 +1,11 @@
+#ifndef __MIN_STDBOOL_H__
+#define __MIN_STDBOOL_H__
+
+#include <Library/BaseLib.h>
+
+typedef BOOLEAN bool;
+
+#define true TRUE
+#define false FALSE
+
+#endif

MSM8916Pkg/Include/Library/minstdint.h

@@ -0,0 +1,70 @@
+#ifndef __MIN_STDINT_H__
+#define __MIN_STDINT_H__
+
+#include <Library/BaseLib.h>
+
+typedef UINTN size_t;
+
+typedef INT8  int8_t;
+typedef INT16 int16_t;
+typedef INT32 int32_t;
+typedef INT64 int64_t;
+
+typedef UINT8  uint8_t;
+typedef UINT16 uint16_t;
+typedef UINT32 uint32_t;
+typedef UINT64 uint64_t;
+
+typedef UINTN addr_t;
+typedef UINTN paddr_t;
+
+typedef UINT8  u8;
+typedef UINT16 u16;
+typedef UINT32 u32;
+typedef UINT64 u64;
+
+#ifndef INT16_MIN
+#define INT16_MIN MIN_INT16
+#endif
+
+#ifndef INT16_MAX
+#define INT16_MAX MAX_INT16
+#endif
+
+#ifndef UINT16_MIN
+#define UINT16_MIN MIN_UINT16
+#endif
+
+#ifndef UINT16_MAX
+#define UINT16_MAX MAX_UINT16
+#endif
+
+#ifndef INT32_MIN
+#define INT32_MIN MIN_INT32
+#endif
+
+#ifndef INT32_MAX
+#define INT32_MAX MAX_INT32
+#endif
+
+#ifndef UINT32_MIN
+#define UINT32_MIN MIN_UINT32
+#endif
+
+#ifndef UINT32_MAX
+#define UINT32_MAX MAX_UINT32
+#endif
+
+#ifndef UINT_MAX
+#define UINT_MAX MAX_UINTN
+#endif
+
+#ifndef ULONG_MAX
+#define ULONG_MAX (~0UL)
+#endif
+
+#ifndef LONG_MAX
+#define LONG_MAX ((long)(~0UL >> 1))
+#endif
+
+#endif

MSM8916Pkg/Include/Library/minstring.h

@@ -0,0 +1,17 @@
+#ifndef __MIN_STRING_H__
+#define __MIN_STRING_H__
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+
+#define strcmp(s1, s2) ((int)AsciiStrCmp((s1), (s2)))
+#define strncmp(s1, s2, n) ((int)AsciiStrnCmp((s1), (s2), (n)))
+#define strlen(s) ((size_t)AsciiStrLen((s)))
+#define strlcpy(dst, src, n) AsciiStrCpyS((dst), (n), (src))
+#define strstr(s1, s2) AsciiStrStr((s1), (s2))
+#define memset(s, c, n) SetMem((s), (UINTN)(n), (UINT8)(c))
+#define memcpy(s1, s2, n) CopyMem((s1), (s2), (n))
+#define memmove(s1, s2, n) CopyMem((s1), (s2), (n))
+#define memcmp(s1, s2, n) ((int)CompareMem((s1), (s2), (n)))
+
+#endif

MSM8916Pkg/Include/Platform/clock.h

@@ -0,0 +1,93 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __MSM8916_CLOCK_H
+#define __MSM8916_CLOCK_H
+
+#include <Chipset/clock.h>
+#include <Chipset/clock_lib2.h>
+
+#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
+
+#define REG_MM(off)                     (CLK_CTL_BASE + (off))
+
+#define MDP_GDSCR                       REG_MM(0x4D078)
+#define GDSC_POWER_ON_BIT               BIT(31)
+#define GDSC_POWER_ON_STATUS_BIT        BIT(29)
+#define GDSC_EN_FEW_WAIT_MASK           (0x0F << 16)
+#define GDSC_EN_FEW_WAIT_256_MASK       BIT(19)
+
+#define VSYNC_CMD_RCGR                  REG_MM(0x4D02C)
+#define VSYNC_CFG_RCGR                  REG_MM(0x4D030)
+#define MDSS_VSYNC_CBCR                 REG_MM(0x4D090)
+
+#define MDP_CMD_RCGR                    REG_MM(0x4D014)
+#define MDP_CFG_RCGR                    REG_MM(0x4D018)
+#define MDP_CBCR                        REG_MM(0x4D088)
+#define MDP_AHB_CBCR                    REG_MM(0x4D07C)
+#define MDP_AXI_CBCR                    REG_MM(0x4D080)
+
+#define DSI_BYTE0_CMD_RCGR              REG_MM(0x4D044)
+#define DSI_BYTE0_CFG_RCGR              REG_MM(0x4D048)
+#define DSI_BYTE0_CBCR                  REG_MM(0x4D094)
+#define DSI_ESC0_CMD_RCGR               REG_MM(0x4D05C)
+#define DSI_ESC0_CFG_RCGR               REG_MM(0x4D060)
+#define DSI_ESC0_CBCR                   REG_MM(0x4D098)
+#define DSI_PIXEL0_CMD_RCGR             REG_MM(0x4D000)
+#define DSI_PIXEL0_CFG_RCGR             REG_MM(0x4D004)
+#define DSI_PIXEL0_CBCR                 REG_MM(0x4D084)
+#define DSI_PIXEL0_M                    REG_MM(0x4D008)
+#define DSI_PIXEL0_N                    REG_MM(0x4D00C)
+#define DSI_PIXEL0_D                    REG_MM(0x4D010)
+
+#define DSI_BYTE1_CMD_RCGR              REG_MM(0x4D0B0)
+#define DSI_BYTE1_CFG_RCGR              REG_MM(0x4D0B4)
+#define DSI_BYTE1_CBCR                  REG_MM(0x4D0A0)
+#define DSI_ESC1_CMD_RCGR               REG_MM(0x4D0A8)
+#define DSI_ESC1_CFG_RCGR               REG_MM(0x4D0AC)
+#define DSI_ESC1_CBCR                   REG_MM(0x4D09C)
+#define DSI_PIXEL1_CMD_RCGR             REG_MM(0x4D0B8)
+#define DSI_PIXEL1_CFG_RCGR             REG_MM(0x4D0BC)
+#define DSI_PIXEL1_CBCR                 REG_MM(0x4D0A4)
+#define DSI_PIXEL1_M                    REG_MM(0x4D0C0)
+#define DSI_PIXEL1_N                    REG_MM(0x4D0C4)
+#define DSI_PIXEL1_D                    REG_MM(0x4D0C8)
+
+void platform_clock_init(void);
+
+void clock_init_mmc(uint32_t interface);
+void clock_config_mmc(uint32_t interface, uint32_t freq);
+void clock_config_uart_dm(uint8_t id);
+void hsusb_clock_init(void);
+void clock_config_ce(uint8_t instance);
+void mdp_clock_init(void);
+void mdp_gdsc_ctrl(uint8_t enable);
+void clock_ce_enable(uint8_t instance);
+void clock_ce_disable(uint8_t instance);
+void clock_config_blsp_i2c(uint8_t blsp_id, uint8_t qup_id);
+#endif

MSM8916Pkg/Include/Platform/iomap.h

@@ -0,0 +1,286 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM8916_IOMAP_H_
+#define _PLATFORM_MSM8916_IOMAP_H_
+
+#define MSM_IOMAP_BASE              0x00000000
+#define MSM_IOMAP_END               0x08000000
+#define A53_SS_BASE                 0x0B000000
+#define A53_SS_END                  0x0B200000
+
+#define SYSTEM_IMEM_BASE            0x08600000
+#define MSM_SHARED_IMEM_BASE        0x08600000
+
+#define RESTART_REASON_ADDR         (MSM_SHARED_IMEM_BASE + 0x65C)
+#define BS_INFO_OFFSET              (0x6B0)
+#define BS_INFO_ADDR                (MSM_SHARED_IMEM_BASE + BS_INFO_OFFSET)
+#define SDRAM_START_ADDR            0x80000000
+
+#define MSM_SHARED_BASE             0x86300000
+#define APPS_SS_BASE                0x0B000000
+
+#define DDR_START                   get_ddr_start()
+#define ABOOT_FORCE_KERNEL_ADDR     DDR_START + 0x8000
+#define ABOOT_FORCE_KERNEL64_ADDR   DDR_START + 0x80000
+#define ABOOT_FORCE_RAMDISK_ADDR    DDR_START + 0x2000000
+#define ABOOT_FORCE_TAGS_ADDR       DDR_START + 0x1E00000
+
+#define MSM_GIC_DIST_BASE           APPS_SS_BASE
+#define MSM_GIC_CPU_BASE            (APPS_SS_BASE + 0x2000)
+#define MSM_WATCHDOG_BASE           (APPS_SS_BASE + 0x00017000)
+#define MSM_WATCHDOG_RST            (MSM_WATCHDOG_BASE + 0x04)
+#define MSM_WATCHDOG_EN             (MSM_WATCHDOG_BASE + 0x08)
+#define APPS_APCS_QTMR_AC_BASE      (APPS_SS_BASE + 0x00020000)
+#define APPS_APCS_F0_QTMR_V1_BASE   (APPS_SS_BASE + 0x00021000)
+#define QTMR_BASE                   APPS_APCS_F0_QTMR_V1_BASE
+
+#define APCS_BANKED_SAW2_BASE       (APPS_SS_BASE + 0x9000)
+#define APCS_L2_SAW2_BASE           (APPS_SS_BASE + 0x12000)
+
+#define PERIPH_SS_BASE              0x07800000
+
+#define MSM_SDC1_BASE               (PERIPH_SS_BASE + 0x00024000)
+#define MSM_SDC1_SDHCI_BASE         (PERIPH_SS_BASE + 0x00024900)
+#define MSM_SDC2_BASE               (PERIPH_SS_BASE + 0x00064000)
+#define MSM_SDC2_SDHCI_BASE        (PERIPH_SS_BASE + 0x00064900)
+
+/* SDHCI */
+#define SDCC_MCI_HC_MODE            (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG   (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG     (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG    (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG      (0x000000E8)
+#define BLSP1_UART0_BASE            (PERIPH_SS_BASE + 0x000AF000)
+#define BLSP1_UART1_BASE            (PERIPH_SS_BASE + 0x000B0000)
+#define MSM_USB_BASE                (PERIPH_SS_BASE + 0x000D9000)
+
+#define CLK_CTL_BASE                0x1800000
+
+#define SPMI_BASE                   0x02000000
+#define SPMI_GENI_BASE              (SPMI_BASE + 0xA000)
+#define SPMI_PIC_BASE               (SPMI_BASE +  0x01800000)
+#define PMIC_ARB_CORE               0x200F000
+
+#define TLMM_BASE_ADDR              0x1000000
+#define GPIO_CONFIG_ADDR(x)         (TLMM_BASE_ADDR + (x)*0x1000)
+#define GPIO_IN_OUT_ADDR(x)         (TLMM_BASE_ADDR + 0x00000004 + (x)*0x1000)
+
+#define MPM2_MPM_CTRL_BASE          0x004A0000
+#define MPM2_MPM_PS_HOLD            0x004AB000
+#define MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL  0x004A3000
+
+/* CRYPTO ENGINE */
+#define  MSM_CE1_BASE               0x073A000
+#define  MSM_CE1_BAM_BASE           0x0704000
+#define  GCC_CRYPTO_BCR             (CLK_CTL_BASE + 0x16000)
+#define  GCC_CRYPTO_CMD_RCGR        (CLK_CTL_BASE + 0x16004)
+#define  GCC_CRYPTO_CFG_RCGR        (CLK_CTL_BASE + 0x16008)
+#define  GCC_CRYPTO_CBCR            (CLK_CTL_BASE + 0x1601C)
+#define  GCC_CRYPTO_AXI_CBCR        (CLK_CTL_BASE + 0x16020)
+#define  GCC_CRYPTO_AHB_CBCR        (CLK_CTL_BASE + 0x16024)
+
+/* I2C */
+#define BLSP_QUP_BASE(blsp_id, qup_id) (PERIPH_SS_BASE + 0xB5000 + 0x1000 * qup_id)
+#define GCC_BLSP1_QUP2_APPS_CBCR    (CLK_CTL_BASE + 0x3010)
+#define GCC_BLSP1_QUP2_CFG_RCGR     (CLK_CTL_BASE + 0x3018)
+#define GCC_BLSP1_QUP2_CMD_RCGR     (CLK_CTL_BASE + 0x3014)
+
+/* GPLL */
+#define GPLL0_STATUS                (CLK_CTL_BASE + 0x2101C)
+#define GPLL1_STATUS                (CLK_CTL_BASE + 0x2001C)
+#define APCS_GPLL_ENA_VOTE          (CLK_CTL_BASE + 0x45000)
+#define APCS_CLOCK_BRANCH_ENA_VOTE  (CLK_CTL_BASE + 0x45004)
+
+/* SDCC */
+#define SDC1_HDRV_PULL_CTL          (TLMM_BASE_ADDR + 0x10A000)
+#define SDCC1_BCR                   (CLK_CTL_BASE + 0x42000) /* block reset*/
+#define SDCC1_APPS_CBCR             (CLK_CTL_BASE + 0x42018) /* branch ontrol */
+#define SDCC1_AHB_CBCR              (CLK_CTL_BASE + 0x4201C)
+#define SDCC1_CMD_RCGR              (CLK_CTL_BASE + 0x42004) /* cmd */
+#define SDCC1_CFG_RCGR              (CLK_CTL_BASE + 0x42008) /* cfg */
+#define SDCC1_M                     (CLK_CTL_BASE + 0x4200C) /* m */
+#define SDCC1_N                     (CLK_CTL_BASE + 0x42010) /* n */
+#define SDCC1_D                     (CLK_CTL_BASE + 0x42014) /* d */
+
+#define SDC2_HDRV_PULL_CTL          (TLMM_BASE_ADDR + 0x109000)
+#define SDCC2_BCR                   (CLK_CTL_BASE + 0x43000) /* block reset */
+#define SDCC2_APPS_CBCR             (CLK_CTL_BASE + 0x43018) /* branch control */
+#define SDCC2_AHB_CBCR              (CLK_CTL_BASE + 0x4301C)
+#define SDCC2_CMD_RCGR              (CLK_CTL_BASE + 0x43004) /* cmd */
+#define SDCC2_CFG_RCGR              (CLK_CTL_BASE + 0x43008) /* cfg */
+#define SDCC2_M                     (CLK_CTL_BASE + 0x4300C) /* m */
+#define SDCC2_N                     (CLK_CTL_BASE + 0x43010) /* n */
+#define SDCC2_D                     (CLK_CTL_BASE + 0x43014) /* d */
+
+/* UART */
+#define BLSP1_AHB_CBCR              (CLK_CTL_BASE + 0x1008)
+#define BLSP1_UART1_APPS_CBCR       (CLK_CTL_BASE + 0x203C)
+#define BLSP1_UART1_APPS_CMD_RCGR   (CLK_CTL_BASE + 0x2044)
+#define BLSP1_UART1_APPS_CFG_RCGR   (CLK_CTL_BASE + 0x2048)
+#define BLSP1_UART1_APPS_M          (CLK_CTL_BASE + 0x204C)
+#define BLSP1_UART1_APPS_N          (CLK_CTL_BASE + 0x2050)
+#define BLSP1_UART1_APPS_D          (CLK_CTL_BASE + 0x2054)
+#define BLSP1_UART2_APPS_CBCR       (CLK_CTL_BASE + 0x302C)
+#define BLSP1_UART2_APPS_CMD_RCGR   (CLK_CTL_BASE + 0x3034)
+#define BLSP1_UART2_APPS_CFG_RCGR   (CLK_CTL_BASE + 0x3038)
+#define BLSP1_UART2_APPS_M          (CLK_CTL_BASE + 0x303C)
+#define BLSP1_UART2_APPS_N          (CLK_CTL_BASE + 0x3040)
+#define BLSP1_UART2_APPS_D          (CLK_CTL_BASE + 0x3044)
+
+
+/* USB */
+#define USB_HS_BCR                  (CLK_CTL_BASE + 0x41000)
+#define USB_HS_SYSTEM_CBCR          (CLK_CTL_BASE + 0x41004)
+#define USB_HS_AHB_CBCR             (CLK_CTL_BASE + 0x41008)
+#define USB_HS_SYSTEM_CMD_RCGR      (CLK_CTL_BASE + 0x41010)
+#define USB_HS_SYSTEM_CFG_RCGR      (CLK_CTL_BASE + 0x41014)
+
+
+/* RPMB send receive buffer needs to be mapped
+ * as device memory, define the start address
+ * and size in MB
+ */
+#define RPMB_SND_RCV_BUF            0x90000000
+#define RPMB_SND_RCV_BUF_SZ         0x1
+
+/* QSEECOM: Secure app region notification */
+#define APP_REGION_ADDR 0x86000000
+#define APP_REGION_SIZE 0x300000
+
+/* MDSS */
+#define MIPI_DSI_BASE               (0x1A98000)
+#define MIPI_DSI0_BASE              MIPI_DSI_BASE
+#define MIPI_DSI1_BASE              (0x1AA0000)
+#define DSI0_PHY_BASE               (0x1A98500)
+#define DSI1_PHY_BASE               (0x1AA0500)
+#define DSI0_PLL_BASE               (0x1A98300)
+#define DSI1_PLL_BASE               DSI0_PLL_BASE
+#define REG_DSI(off)                (MIPI_DSI_BASE + 0x04 + (off))
+#define MDP_BASE                    (0x1A00000)
+#define REG_MDP(off)                (MDP_BASE + (off))
+#define MDP_HW_REV                              REG_MDP(0x1000)
+#define MDP_VP_0_VIG_0_BASE                     REG_MDP(0x5000)
+#define MDP_VP_0_VIG_1_BASE                     REG_MDP(0x7000)
+#define MDP_VP_0_RGB_0_BASE                     REG_MDP(0x15000)
+#define MDP_VP_0_RGB_1_BASE                     REG_MDP(0x17000)
+#define MDP_VP_0_DMA_0_BASE                     REG_MDP(0x25000)
+#define MDP_VP_0_DMA_1_BASE                     REG_MDP(0x27000)
+#define MDP_VP_0_MIXER_0_BASE                   REG_MDP(0x45000)
+#define MDP_VP_0_MIXER_1_BASE                   REG_MDP(0x46000)
+#define MDP_DISP_INTF_SEL                       REG_MDP(0x1004)
+#define MDP_VIDEO_INTF_UNDERFLOW_CTL            REG_MDP(0x12E0)
+#define MDP_UPPER_NEW_ROI_PRIOR_RO_START        REG_MDP(0x11EC)
+#define MDP_LOWER_NEW_ROI_PRIOR_TO_START        REG_MDP(0x13F8)
+#define MDP_CTL_0_BASE                          REG_MDP(0x2000)
+#define MDP_CTL_1_BASE                          REG_MDP(0x2200)
+#define MDP_CLK_CTRL0                           REG_MDP(0x012AC)
+#define MDP_CLK_CTRL1                           REG_MDP(0x012B4)
+#define MDP_CLK_CTRL2                           REG_MDP(0x012BC)
+#define MDP_CLK_CTRL3                           REG_MDP(0x013A8)
+#define MDP_CLK_CTRL4                           REG_MDP(0x013B0)
+#define MDP_CLK_CTRL5                           REG_MDP(0x013B8)
+
+#define MDP_INTF_0_BASE                         REG_MDP(0x11F00)
+#define MDP_INTF_1_BASE                         REG_MDP(0x12700)
+#define MDP_INTF_2_BASE                         REG_MDP(0x12F00)
+
+#define MDP_REG_SPLIT_DISPLAY_EN                REG_MDP(0x12f4)
+#define MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL    REG_MDP(0x12F8)
+#define MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL    REG_MDP(0x13F0)
+
+#define MDP_REG_PPB0_CNTL                       REG_MDP(0x1420)
+#define MDP_REG_PPB0_CONFIG                     REG_MDP(0x1424)
+
+#define MMSS_MDP_SMP_ALLOC_W_BASE               REG_MDP(0x1080)
+#define MMSS_MDP_SMP_ALLOC_R_BASE               REG_MDP(0x1130)
+
+#define MDP_QOS_REMAPPER_CLASS_0                REG_MDP(0x11E0)
+
+#define VBIF_VBIF_DDR_FORCE_CLK_ON              REG_MDP(0xc8004)
+#define VBIF_VBIF_DDR_OUT_MAX_BURST             REG_MDP(0xc80D8)
+#define VBIF_VBIF_DDR_ARB_CTRL                  REG_MDP(0xc80F0)
+#define VBIF_VBIF_DDR_RND_RBN_QOS_ARB           REG_MDP(0xc8124)
+#define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0        REG_MDP(0xc8160)
+#define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1        REG_MDP(0xc8164)
+#define VBIF_VBIF_DDR_OUT_AOOO_AXI_EN           REG_MDP(0xc8178)
+#define VBIF_VBIF_DDR_OUT_AX_AOOO               REG_MDP(0xc817C)
+#define VBIF_VBIF_IN_RD_LIM_CONF0               REG_MDP(0xc80B0)
+#define VBIF_VBIF_IN_RD_LIM_CONF1               REG_MDP(0xc80B4)
+#define VBIF_VBIF_IN_RD_LIM_CONF2               REG_MDP(0xc80B8)
+#define VBIF_VBIF_IN_RD_LIM_CONF3               REG_MDP(0xc80BC)
+#define VBIF_VBIF_IN_WR_LIM_CONF0               REG_MDP(0xc80C0)
+#define VBIF_VBIF_IN_WR_LIM_CONF1               REG_MDP(0xc80C4)
+#define VBIF_VBIF_IN_WR_LIM_CONF2               REG_MDP(0xc80C8)
+#define VBIF_VBIF_IN_WR_LIM_CONF3               REG_MDP(0xc80CC)
+#define VBIF_VBIF_ABIT_SHORT                    REG_MDP(0xc8070)
+#define VBIF_VBIF_ABIT_SHORT_CONF               REG_MDP(0xc8074)
+#define VBIF_VBIF_GATE_OFF_WRREQ_EN             REG_MDP(0xc80A8)
+
+#define SOFT_RESET                  0x118
+#define CLK_CTRL                    0x11C
+#define TRIG_CTRL                   0x084
+#define CTRL                        0x004
+#define COMMAND_MODE_DMA_CTRL       0x03C
+#define COMMAND_MODE_MDP_CTRL       0x040
+#define COMMAND_MODE_MDP_DCS_CMD_CTRL   0x044
+#define COMMAND_MODE_MDP_STREAM0_CTRL   0x058
+#define COMMAND_MODE_MDP_STREAM0_TOTAL  0x05C
+#define COMMAND_MODE_MDP_STREAM1_CTRL   0x060
+#define COMMAND_MODE_MDP_STREAM1_TOTAL  0x064
+#define ERR_INT_MASK0               0x10C
+
+#define LANE_CTL                    0x0AC
+#define LANE_SWAP_CTL               0x0B0
+#define TIMING_CTL                  0x0C4
+
+#define VIDEO_MODE_ACTIVE_H         0x024
+#define VIDEO_MODE_ACTIVE_V         0x028
+#define VIDEO_MODE_TOTAL            0x02C
+#define VIDEO_MODE_HSYNC            0x030
+#define VIDEO_MODE_VSYNC            0x034
+#define VIDEO_MODE_VSYNC_VPOS       0x038
+
+#define DMA_CMD_OFFSET              0x048
+#define DMA_CMD_LENGTH              0x04C
+
+#define INT_CTRL                    0x110
+#define CMD_MODE_DMA_SW_TRIGGER     0x090
+
+#define EOT_PACKET_CTRL             0x0CC
+#define MISR_CMD_CTRL               0x0A0
+#define MISR_VIDEO_CTRL             0x0A4
+#define VIDEO_MODE_CTRL             0x010
+#define HS_TIMER_CTRL               0x0BC
+
+#define TCSR_TZ_WONCE               0x193D000
+#define TCSR_BOOT_MISC_DETECT	    0x193D100
+
+#define BOOT_ROM_BASE               0x00100000
+#define BOOT_ROM_END                0x00124000  /* Crashes when reading more */
+#endif

MSM8916Pkg/Include/Platform/irqs.h

@@ -0,0 +1,68 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __IRQS_MSM8916_H
+#define __IRQS_MSM8916_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15:  STI/SGI (software triggered/generated interrupts)
+ * 16-31: PPI (private peripheral interrupts)
+ * 32+:   SPI (shared peripheral interrupts)
+ */
+int qtmr_irq();
+
+#define GIC_PPI_START                          16
+#define GIC_SPI_START                          32
+
+#define INT_QTMR_NON_SECURE_PHY_TIMER_EXP      (GIC_PPI_START + 3)
+#define INT_QTMR_VIRTUAL_TIMER_EXP             (GIC_PPI_START + 4)
+
+#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP      qtmr_irq()
+#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP_8x16 (GIC_SPI_START + 8)
+#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP_8x39 (GIC_SPI_START + 257)
+#define SDCC1_PWRCTL_IRQ                       (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ                       (GIC_SPI_START + 221)
+
+#define USB1_HS_BAM_IRQ                        (GIC_SPI_START + 135)
+#define USB1_HS_IRQ                            (GIC_SPI_START + 134)
+
+/* Retrofit universal macro names */
+#define INT_USB_HS                             USB1_HS_IRQ
+
+#define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ         (GIC_SPI_START + 190)
+
+#define NR_MSM_IRQS                            256
+#define NR_GPIO_IRQS                           173
+#define NR_BOARD_IRQS                          0
+
+#define NR_IRQS                                (NR_MSM_IRQS + NR_GPIO_IRQS + \
+                                               NR_BOARD_IRQS)
+
+#define BLSP_QUP_IRQ(blsp_id, qup_id)          (GIC_SPI_START + 95 + qup_id)
+#endif /* __IRQS_MSM8916_H */

MSM8916Pkg/Include/Protocol/QcomBam.h

@@ -0,0 +1,35 @@
+#ifndef __QCOM_PROTOCOL_BAM_H__
+#define __QCOM_PROTOCOL_BAM_H__
+
+#include <Chipset/bam.h>
+
+#define QCOM_BAM_PROTOCOL_GUID \
+  { 0xacdd545a, 0xf1f6, 0x4272, { 0x81, 0xc5, 0x04, 0x93, 0xe3, 0x58, 0x05, 0x32 } }
+
+typedef struct _QCOM_BAM_PROTOCOL   QCOM_BAM_PROTOCOL;
+
+typedef void (EFIAPI *bam_init_t)(struct bam_instance *bam);
+typedef void (EFIAPI *bam_sys_pipe_init_t)(struct bam_instance *bam, uint8_t pipe_num);
+typedef int  (EFIAPI *bam_pipe_fifo_init_t)(struct bam_instance *bam, uint8_t pipe_num);
+typedef struct cmd_element* (EFIAPI *bam_add_cmd_element_t)(struct cmd_element *ptr, uint32_t addr, uint32_t data, enum bam_ce_cmd_t cmd_type);
+typedef int  (EFIAPI *bam_add_desc_t)(struct bam_instance *bam, unsigned int pipe_num, unsigned char *data_ptr, unsigned int data_len, unsigned flags);
+typedef int  (EFIAPI *bam_add_one_desc_t)(struct bam_instance *bam, unsigned int pipe_num, unsigned char*, uint32_t len, uint8_t flags);
+typedef void (EFIAPI *bam_sys_gen_event_t)(struct bam_instance *bam, uint8_t pipe_num, unsigned int num_desc);
+typedef int  (EFIAPI *bam_wait_for_interrupt_t)(struct bam_instance *bam, uint8_t pipe_num, enum p_int_type interrupt);
+typedef void (EFIAPI *bam_read_offset_update_t)(struct bam_instance *bam, unsigned int pipe_num);
+
+struct _QCOM_BAM_PROTOCOL {
+  bam_init_t                bam_init;
+  bam_sys_pipe_init_t       bam_sys_pipe_init;
+  bam_pipe_fifo_init_t      bam_pipe_fifo_init;
+  bam_add_cmd_element_t     bam_add_cmd_element;
+  bam_add_desc_t            bam_add_desc;
+  bam_add_one_desc_t        bam_add_one_desc;
+  bam_sys_gen_event_t       bam_sys_gen_event;
+  bam_wait_for_interrupt_t  bam_wait_for_interrupt;
+  bam_read_offset_update_t  bam_read_offset_update;
+};
+
+extern EFI_GUID gQcomBamProtocolGuid;
+
+#endif

MSM8916Pkg/Include/Protocol/QcomClock.h

@@ -0,0 +1,41 @@
+#ifndef __QCOM_PROTOCOL_CLOCK_H__
+#define __QCOM_PROTOCOL_CLOCK_H__
+
+#include <Chipset/clock.h>
+
+#define QCOM_CLOCK_PROTOCOL_GUID                                               \
+  {                                                                            \
+    0x4fcc91c2, 0x9c4f, 0x4e3c,                                                \
+    {                                                                          \
+      0xa6, 0x73, 0xc6, 0xdf, 0x62, 0xe0, 0x41, 0xd5                           \
+    }                                                                          \
+  }
+
+typedef struct _QCOM_CLOCK_PROTOCOL QCOM_CLOCK_PROTOCOL;
+
+typedef struct clk *(EFIAPI *clk_get_t)(const char *id);
+typedef int(EFIAPI *clk_enable_t)(struct clk *clk);
+typedef void(EFIAPI *clk_disable_t)(struct clk *clk);
+typedef unsigned long(EFIAPI *clk_get_rate_t)(struct clk *clk);
+typedef int(EFIAPI *clk_set_rate_t)(struct clk *clk, unsigned long rate);
+typedef int(EFIAPI *clk_set_parent_t)(struct clk *clk, struct clk *parent);
+typedef struct clk *(EFIAPI *clk_get_parent_t)(struct clk *clk);
+typedef int(EFIAPI *clk_get_set_enable_t)(
+    char *id, unsigned long rate, bool enable);
+typedef int(EFIAPI *clk_reset_t)(struct clk *clk, enum clk_reset_action);
+
+struct _QCOM_CLOCK_PROTOCOL {
+  clk_get_t            clk_get;
+  clk_enable_t         clk_enable;
+  clk_disable_t        clk_disable;
+  clk_get_rate_t       clk_get_rate;
+  clk_set_rate_t       clk_set_rate;
+  clk_set_parent_t     clk_set_parent;
+  clk_get_parent_t     clk_get_parent;
+  clk_get_set_enable_t clk_get_set_enable;
+  clk_reset_t          clk_reset;
+};
+
+extern EFI_GUID gQcomClockProtocolGuid;
+
+#endif

MSM8916Pkg/Include/Resources/FbColor.h

@@ -0,0 +1,14 @@
+#ifndef _FB_COLOR_H_
+#define _FB_COLOR_H_
+
+#define FB_BGRA8888_BLACK          0xff000000
+#define FB_BGRA8888_WHITE          0xffffffff
+#define FB_BGRA8888_CYAN           0xff00ffff
+#define FB_BGRA8888_BLUE           0xff0000ff
+#define FB_BGRA8888_SILVER         0xffc0c0c0
+#define FB_BGRA8888_YELLOW         0xffffff00
+#define FB_BGRA8888_ORANGE         0xffffa500
+#define FB_BGRA8888_RED            0xffff0000
+#define FB_BGRA8888_GREEN          0xff00ff00
+
+#endif

MSM8916Pkg/Include/Resources/font5x12.h

@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the 
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _FONT_5x12_DATA_
+#define _FONT_5x12_DATA_
+
+#define FONT_WIDTH		5
+#define FONT_HEIGHT		12
+
+#define SCALE_FACTOR	2
+
+unsigned font5x12[] = {
+    0x00000000, 0x00000000,
+    0x08421080, 0x00020084,
+    0x00052940, 0x00000000,
+    0x15f52800, 0x0000295f,
+    0x1c52f880, 0x00023e94,
+    0x08855640, 0x0004d542,
+    0x04528800, 0x000b2725,
+    0x00021080, 0x00000000,
+    0x04211088, 0x00821042,
+    0x10841082, 0x00221108,
+    0x09575480, 0x00000000,
+    0x3e420000, 0x00000084,
+    0x00000000, 0x00223000,
+    0x3e000000, 0x00000000,
+    0x00000000, 0x00471000,
+    0x08844200, 0x00008442,
+    0x2318a880, 0x00022a31,
+    0x08429880, 0x000f9084,
+    0x1108c5c0, 0x000f8444,
+    0x1c4443e0, 0x00074610,
+    0x14a62100, 0x000423e9,
+    0x26d087e0, 0x00074610,
+    0x1e10c5c0, 0x00074631,
+    0x088443e0, 0x00010844,
+    0x1d18c5c0, 0x00074631,
+    0x3d18c5c0, 0x00074610,
+    0x08e20000, 0x00471000,
+    0x08e20000, 0x00223000,
+    0x02222200, 0x00082082,
+    0x01f00000, 0x000003e0,
+    0x20820820, 0x00008888,
+    0x1108c5c0, 0x00020084,
+    0x2b98c5c0, 0x000f05b5,
+    0x2318a880, 0x0008c63f,
+    0x1d2949e0, 0x0007ca52,
+    0x0210c5c0, 0x00074421,
+    0x252949e0, 0x0007ca52,
+    0x1e1087e0, 0x000f8421,
+    0x1e1087e0, 0x00008421,
+    0x0210c5c0, 0x00074639,
+    0x3f18c620, 0x0008c631,
+    0x084211c0, 0x00071084,
+    0x10842380, 0x00032508,
+    0x0654c620, 0x0008c525,
+    0x02108420, 0x000f8421,
+    0x2b5dc620, 0x0008c631,
+    0x2b59ce20, 0x0008c739,
+    0x2318c5c0, 0x00074631,
+    0x1f18c5e0, 0x00008421,
+    0x2318c5c0, 0x01075631,
+    0x1f18c5e0, 0x0008c525,
+    0x1c10c5c0, 0x00074610,
+    0x084213e0, 0x00021084,
+    0x2318c620, 0x00074631,
+    0x1518c620, 0x0002114a,
+    0x2b18c620, 0x000556b5,
+    0x08a54620, 0x0008c54a,
+    0x08a54620, 0x00021084,
+    0x088443e0, 0x000f8442,
+    0x0421084e, 0x00e10842,
+    0x08210420, 0x00084108,
+    0x1084210e, 0x00e42108,
+    0x0008a880, 0x00000000,
+    0x00000000, 0x01f00000,
+    0x00000104, 0x00000000,
+    0x20e00000, 0x000b663e,
+    0x22f08420, 0x0007c631,
+    0x22e00000, 0x00074421,
+    0x23e84200, 0x000f4631,
+    0x22e00000, 0x0007443f,
+    0x1e214980, 0x00010842,
+    0x22e00000, 0x1d187a31,
+    0x26d08420, 0x0008c631,
+    0x08601000, 0x00071084,
+    0x10c02000, 0x0c94a108,
+    0x0a908420, 0x0008a4a3,
+    0x084210c0, 0x00071084,
+    0x2ab00000, 0x0008d6b5,
+    0x26d00000, 0x0008c631,
+    0x22e00000, 0x00074631,
+    0x22f00000, 0x0210be31,
+    0x23e00000, 0x21087a31,
+    0x26d00000, 0x00008421,
+    0x22e00000, 0x00074506,
+    0x04f10800, 0x00064842,
+    0x23100000, 0x000b6631,
+    0x23100000, 0x00022951,
+    0x23100000, 0x000556b5,
+    0x15100000, 0x0008a884,
+    0x23100000, 0x1d185b31,
+    0x11f00000, 0x000f8444,
+    0x06421098, 0x01821084,
+    0x08421080, 0x00021084,
+    0x30421083, 0x00321084,
+    0x0004d640, 0x00000000,
+    0x00000000, 0x00000000,
+};
+
+#endif

MSM8916Pkg/Library/FrameBufferBltLib/FrameBufferBltLib.c

@@ -0,0 +1,730 @@
+/** @file
+  FrameBufferBltLib - Library to perform blt operations on a frame buffer.
+
+  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Uefi/UefiBaseType.h>
+#include <Protocol/GraphicsOutput.h>
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/FrameBufferBltLib.h>
+
+struct FRAME_BUFFER_CONFIGURE {
+  UINT32                          PixelsPerScanLine;
+  UINT32                          BytesPerPixel;
+  UINT32                          Width;
+  UINT32                          Height;
+  UINT8                           *FrameBuffer;
+  EFI_GRAPHICS_PIXEL_FORMAT       PixelFormat;
+  EFI_PIXEL_BITMASK               PixelMasks;
+  INT8                            PixelShl[4]; // R-G-B-Rsvd
+  INT8                            PixelShr[4]; // R-G-B-Rsvd
+  UINT8                           LineBuffer[0];
+};
+
+CONST EFI_PIXEL_BITMASK mRgbPixelMasks = {
+  0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000
+};
+
+CONST EFI_PIXEL_BITMASK mBgrPixelMasks = {
+  0x00ff0000, 0x0000ff00, 0x000000ff, 0xff000000
+};
+
+/**
+  Initialize the bit mask in frame buffer configure.
+
+  @param BitMask       The bit mask of pixel.
+  @param BytesPerPixel Size in bytes of pixel.
+  @param PixelShl      Left shift array.
+  @param PixelShr      Right shift array.
+**/
+VOID
+FrameBufferBltLibConfigurePixelFormat (
+  IN CONST EFI_PIXEL_BITMASK    *BitMask,
+  OUT UINT32                    *BytesPerPixel,
+  OUT INT8                      *PixelShl,
+  OUT INT8                      *PixelShr
+  )
+{
+  UINT8   Index;
+  UINT32  *Masks;
+  UINT32  MergedMasks;
+
+  ASSERT (BytesPerPixel != NULL);
+
+  MergedMasks = 0;
+  Masks = (UINT32*) BitMask;
+  for (Index = 0; Index < 3; Index++) {
+    ASSERT ((MergedMasks & Masks[Index]) == 0);
+
+    PixelShl[Index] = (INT8) HighBitSet32 (Masks[Index]) - 23 + (Index * 8);
+    if (PixelShl[Index] < 0) {
+      PixelShr[Index] = -PixelShl[Index];
+      PixelShl[Index] = 0;
+    } else {
+      PixelShr[Index] = 0;
+    }
+    DEBUG ((DEBUG_INFO, "%d: shl:%d shr:%d mask:%x\n", Index,
+            PixelShl[Index], PixelShr[Index], Masks[Index]));
+
+    MergedMasks = (UINT32) (MergedMasks | Masks[Index]);
+  }
+  MergedMasks = (UINT32) (MergedMasks | Masks[3]);
+
+  ASSERT (MergedMasks != 0);
+  *BytesPerPixel = (UINT32) ((HighBitSet32 (MergedMasks) + 7) / 8);
+  DEBUG ((DEBUG_INFO, "Bytes per pixel: %d\n", *BytesPerPixel));
+}
+
+/**
+  Create the configuration for a video frame buffer.
+
+  The configuration is returned in the caller provided buffer.
+
+  @param[in] FrameBuffer       Pointer to the start of the frame buffer.
+  @param[in] FrameBufferInfo   Describes the frame buffer characteristics.
+  @param[in,out] Configure     The created configuration information.
+  @param[in,out] ConfigureSize Size of the configuration information.
+
+  @retval RETURN_SUCCESS            The configuration was successful created.
+  @retval RETURN_BUFFER_TOO_SMALL   The Configure is to too small. The required
+                                    size is returned in ConfigureSize.
+  @retval RETURN_UNSUPPORTED        The requested mode is not supported by
+                                    this implementaion.
+
+**/
+RETURN_STATUS
+EFIAPI
+FrameBufferBltConfigure (
+  IN     VOID                                  *FrameBuffer,
+  IN     EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *FrameBufferInfo,
+  IN OUT FRAME_BUFFER_CONFIGURE                *Configure,
+  IN OUT UINTN                                 *ConfigureSize
+  )
+{
+  CONST EFI_PIXEL_BITMASK                      *BitMask;
+  UINT32                                       BytesPerPixel;
+  INT8                                         PixelShl[4];
+  INT8                                         PixelShr[4];
+
+  if (ConfigureSize == NULL) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  switch (FrameBufferInfo->PixelFormat) {
+  case PixelRedGreenBlueReserved8BitPerColor:
+    BitMask = &mRgbPixelMasks;
+    break;
+
+  case PixelBlueGreenRedReserved8BitPerColor:
+    BitMask = &mBgrPixelMasks;
+    break;
+
+  case PixelBitMask:
+    BitMask = &FrameBufferInfo->PixelInformation;
+    break;
+
+  case PixelBltOnly:
+    ASSERT (FrameBufferInfo->PixelFormat != PixelBltOnly);
+    return RETURN_UNSUPPORTED;
+
+  default:
+    ASSERT (FALSE);
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (FrameBufferInfo->PixelsPerScanLine < FrameBufferInfo->HorizontalResolution) {
+    return RETURN_UNSUPPORTED;
+  }
+
+  FrameBufferBltLibConfigurePixelFormat (BitMask, &BytesPerPixel, PixelShl, PixelShr);
+
+  if (*ConfigureSize < sizeof (FRAME_BUFFER_CONFIGURE)
+                     + FrameBufferInfo->HorizontalResolution * BytesPerPixel) {
+    *ConfigureSize = sizeof (FRAME_BUFFER_CONFIGURE)
+                   + FrameBufferInfo->HorizontalResolution * BytesPerPixel;
+    return RETURN_BUFFER_TOO_SMALL;
+  }
+
+  if (Configure == NULL) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  CopyMem (&Configure->PixelMasks, BitMask,  sizeof (*BitMask));
+  CopyMem (Configure->PixelShl,    PixelShl, sizeof (PixelShl));
+  CopyMem (Configure->PixelShr,    PixelShr, sizeof (PixelShr));
+
+  if (FrameBufferInfo->HorizontalResolution < 1080) {
+   Configure->BytesPerPixel     = BytesPerPixel - (BytesPerPixel / 4); // Defaults to ex. 24bpp for 32bpp and 3bpp for 4bpp usecases
+  } else {
+   Configure->BytesPerPixel     = BytesPerPixel;
+  }
+
+  Configure->PixelFormat       = FrameBufferInfo->PixelFormat;
+  Configure->FrameBuffer       = (UINT8*) FrameBuffer;
+  Configure->Width             = FrameBufferInfo->HorizontalResolution;
+  Configure->Height            = FrameBufferInfo->VerticalResolution;
+  Configure->PixelsPerScanLine = FrameBufferInfo->PixelsPerScanLine;
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Performs a UEFI Graphics Output Protocol Blt Video Fill.
+
+  @param[in]  Configure     Pointer to a configuration which was successfully
+                            created by FrameBufferBltConfigure ().
+  @param[in]  Color         Color to fill the region with.
+  @param[in]  DestinationX  X location to start fill operation.
+  @param[in]  DestinationY  Y location to start fill operation.
+  @param[in]  Width         Width (in pixels) to fill.
+  @param[in]  Height        Height to fill.
+
+  @retval  RETURN_INVALID_PARAMETER Invalid parameter was passed in.
+  @retval  RETURN_SUCCESS           The video was filled successfully.
+
+**/
+EFI_STATUS
+FrameBufferBltLibVideoFill (
+  IN  FRAME_BUFFER_CONFIGURE        *Configure,
+  IN  EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Color,
+  IN  UINTN                         DestinationX,
+  IN  UINTN                         DestinationY,
+  IN  UINTN                         Width,
+  IN  UINTN                         Height
+  )
+{
+  UINTN                             IndexX;
+  UINTN                             IndexY;
+  UINT8                             *Destination;
+  UINT8                             Uint8;
+  UINT32                            Uint32;
+  UINT64                            WideFill;
+  BOOLEAN                           UseWideFill;
+  BOOLEAN                           LineBufferReady;
+  UINTN                             Offset;
+  UINTN                             WidthInBytes;
+  UINTN                             SizeInBytes;
+
+  //
+  // BltBuffer to Video: Source is BltBuffer, destination is Video
+  //
+  if (DestinationY + Height > Configure->Height) {
+    DEBUG ((EFI_D_VERBOSE, "VideoFill: Past screen (Y)\n"));
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (DestinationX + Width > Configure->Width) {
+    DEBUG ((EFI_D_VERBOSE, "VideoFill: Past screen (X)\n"));
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (Width == 0 || Height == 0) {
+    DEBUG ((EFI_D_VERBOSE, "VideoFill: Width or Height is 0\n"));
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  WidthInBytes = Width * Configure->BytesPerPixel;
+
+  Uint32 = *(UINT32*) Color;
+  WideFill =
+    (UINT32) (
+    (((Uint32 << Configure->PixelShl[0]) >> Configure->PixelShr[0]) &
+     Configure->PixelMasks.RedMask) |
+     (((Uint32 << Configure->PixelShl[1]) >> Configure->PixelShr[1]) &
+      Configure->PixelMasks.GreenMask) |
+      (((Uint32 << Configure->PixelShl[2]) >> Configure->PixelShr[2]) &
+       Configure->PixelMasks.BlueMask)
+      );
+  DEBUG ((EFI_D_VERBOSE, "VideoFill: color=0x%x, wide-fill=0x%x\n",
+          Uint32, WideFill));
+
+  //
+  // If the size of the pixel data evenly divides the sizeof
+  // WideFill, then a wide fill operation can be used
+  //
+  UseWideFill = TRUE;
+  if ((sizeof (WideFill) % Configure->BytesPerPixel) == 0) {
+    for (IndexX = Configure->BytesPerPixel; IndexX < sizeof (WideFill); IndexX++) {
+      ((UINT8*) &WideFill)[IndexX] = ((UINT8*) &WideFill)[IndexX % Configure->BytesPerPixel];
+    }
+  } else {
+    //
+    // If all the bytes in the pixel are the same value, then use
+    // a wide fill operation.
+    //
+    for (
+      IndexX = 1, Uint8 = ((UINT8*) &WideFill)[0];
+      IndexX < Configure->BytesPerPixel;
+      IndexX++) {
+      if (Uint8 != ((UINT8*) &WideFill)[IndexX]) {
+        UseWideFill = FALSE;
+        break;
+      }
+    }
+    if (UseWideFill) {
+      SetMem (&WideFill, sizeof (WideFill), Uint8);
+    }
+  }
+
+  if (UseWideFill && (DestinationX == 0) && (Width == Configure->PixelsPerScanLine)) {
+    DEBUG ((EFI_D_VERBOSE, "VideoFill (wide, one-shot)\n"));
+    Offset = DestinationY * Configure->PixelsPerScanLine;
+    Offset = Configure->BytesPerPixel * Offset;
+    Destination = Configure->FrameBuffer + Offset;
+    SizeInBytes = WidthInBytes * Height;
+    if (SizeInBytes >= 8) {
+      SetMem32 (Destination, SizeInBytes & ~3, (UINT32) WideFill);
+      Destination += SizeInBytes & ~3;
+      SizeInBytes &= 3;
+    }
+    if (SizeInBytes > 0) {
+      SetMem (Destination, SizeInBytes, (UINT8) (UINTN) WideFill);
+    }
+  } else {
+    LineBufferReady = FALSE;
+    for (IndexY = DestinationY; IndexY < (Height + DestinationY); IndexY++) {
+      Offset = (IndexY * Configure->PixelsPerScanLine) + DestinationX;
+      Offset = Configure->BytesPerPixel * Offset;
+      Destination = Configure->FrameBuffer + Offset;
+
+      if (UseWideFill && (((UINTN) Destination & 7) == 0)) {
+        DEBUG ((EFI_D_VERBOSE, "VideoFill (wide)\n"));
+        SizeInBytes = WidthInBytes;
+        if (SizeInBytes >= 8) {
+          SetMem64 (Destination, SizeInBytes & ~7, WideFill);
+          Destination += SizeInBytes & ~7;
+          SizeInBytes &= 7;
+        }
+        if (SizeInBytes > 0) {
+          CopyMem (Destination, &WideFill, SizeInBytes);
+        }
+      } else {
+        DEBUG ((EFI_D_VERBOSE, "VideoFill (not wide)\n"));
+        if (!LineBufferReady) {
+          CopyMem (Configure->LineBuffer, &WideFill, Configure->BytesPerPixel);
+          for (IndexX = 1; IndexX < Width; ) {
+            CopyMem (
+              (Configure->LineBuffer + (IndexX * Configure->BytesPerPixel)),
+              Configure->LineBuffer,
+              MIN (IndexX, Width - IndexX) * Configure->BytesPerPixel
+            );
+            IndexX += MIN (IndexX, Width - IndexX);
+          }
+          LineBufferReady = TRUE;
+        }
+        CopyMem (Destination, Configure->LineBuffer, WidthInBytes);
+      }
+    }
+  }
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Performs a UEFI Graphics Output Protocol Blt Video to Buffer operation
+  with extended parameters.
+
+  @param[in]  Configure     Pointer to a configuration which was successfully
+                            created by FrameBufferBltConfigure ().
+  @param[out] BltBuffer     Output buffer for pixel color data.
+  @param[in]  SourceX       X location within video.
+  @param[in]  SourceY       Y location within video.
+  @param[in]  DestinationX  X location within BltBuffer.
+  @param[in]  DestinationY  Y location within BltBuffer.
+  @param[in]  Width         Width (in pixels).
+  @param[in]  Height        Height.
+  @param[in]  Delta         Number of bytes in a row of BltBuffer.
+
+  @retval RETURN_INVALID_PARAMETER Invalid parameter were passed in.
+  @retval RETURN_SUCCESS           The Blt operation was performed successfully.
+**/
+RETURN_STATUS
+FrameBufferBltLibVideoToBltBuffer (
+  IN     FRAME_BUFFER_CONFIGURE          *Configure,
+     OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,
+  IN     UINTN                           SourceX,
+  IN     UINTN                           SourceY,
+  IN     UINTN                           DestinationX,
+  IN     UINTN                           DestinationY,
+  IN     UINTN                           Width,
+  IN     UINTN                           Height,
+  IN     UINTN                           Delta
+  )
+{
+  UINTN                                  DstY;
+  UINTN                                  SrcY;
+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL          *Blt;
+  UINT8                                  *Source;
+  UINT8                                  *Destination;
+  UINTN                                  IndexX;
+  UINT32                                 Uint32;
+  UINTN                                  Offset;
+  UINTN                                  WidthInBytes;
+
+  //
+  // Video to BltBuffer: Source is Video, destination is BltBuffer
+  //
+  if (SourceY + Height > Configure->Height) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (SourceX + Width > Configure->Width) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (Width == 0 || Height == 0) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  //
+  // If Delta is zero, then the entire BltBuffer is being used, so Delta is
+  // the number of bytes in each row of BltBuffer. Since BltBuffer is Width
+  // pixels size, the number of bytes in each row can be computed.
+  //
+  if (Delta == 0) {
+    Delta = Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL);
+  }
+
+  WidthInBytes = Width * Configure->BytesPerPixel;
+
+  //
+  // Video to BltBuffer: Source is Video, destination is BltBuffer
+  //
+  for (SrcY = SourceY, DstY = DestinationY;
+       DstY < (Height + DestinationY);
+       SrcY++, DstY++) {
+
+    Offset = (SrcY * Configure->PixelsPerScanLine) + SourceX;
+    Offset = Configure->BytesPerPixel * Offset;
+    Source = Configure->FrameBuffer + Offset;
+
+    if (Configure->PixelFormat == PixelBlueGreenRedReserved8BitPerColor) {
+      Destination = (UINT8 *) BltBuffer + (DstY * Delta) + (DestinationX * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+    } else {
+      Destination = Configure->LineBuffer;
+    }
+
+    CopyMem (Destination, Source, WidthInBytes);
+
+    if (Configure->PixelFormat != PixelBlueGreenRedReserved8BitPerColor) {
+      for (IndexX = 0; IndexX < Width; IndexX++) {
+        Blt = (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *)
+          ((UINT8 *) BltBuffer + (DstY * Delta) +
+          (DestinationX + IndexX) * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+        Uint32 = *(UINT32*) (Configure->LineBuffer + (IndexX * Configure->BytesPerPixel));
+        *(UINT32*) Blt =
+          (UINT32) (
+          (((Uint32 & Configure->PixelMasks.RedMask) >>
+            Configure->PixelShl[0]) << Configure->PixelShr[0]) |
+            (((Uint32 & Configure->PixelMasks.GreenMask) >>
+              Configure->PixelShl[1]) << Configure->PixelShr[1]) |
+              (((Uint32 & Configure->PixelMasks.BlueMask) >>
+                Configure->PixelShl[2]) << Configure->PixelShr[2])
+            );
+      }
+    }
+  }
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Performs a UEFI Graphics Output Protocol Blt Buffer to Video operation
+  with extended parameters.
+
+  @param[in]  Configure     Pointer to a configuration which was successfully
+                            created by FrameBufferBltConfigure ().
+  @param[in]  BltBuffer     Output buffer for pixel color data.
+  @param[in]  SourceX       X location within BltBuffer.
+  @param[in]  SourceY       Y location within BltBuffer.
+  @param[in]  DestinationX  X location within video.
+  @param[in]  DestinationY  Y location within video.
+  @param[in]  Width         Width (in pixels).
+  @param[in]  Height        Height.
+  @param[in]  Delta         Number of bytes in a row of BltBuffer.
+
+  @retval RETURN_INVALID_PARAMETER Invalid parameter were passed in.
+  @retval RETURN_SUCCESS           The Blt operation was performed successfully.
+**/
+RETURN_STATUS
+FrameBufferBltLibBufferToVideo (
+  IN  FRAME_BUFFER_CONFIGURE                *Configure,
+  IN  EFI_GRAPHICS_OUTPUT_BLT_PIXEL         *BltBuffer,
+  IN  UINTN                                 SourceX,
+  IN  UINTN                                 SourceY,
+  IN  UINTN                                 DestinationX,
+  IN  UINTN                                 DestinationY,
+  IN  UINTN                                 Width,
+  IN  UINTN                                 Height,
+  IN  UINTN                                 Delta
+  )
+{
+  UINTN                                    DstY;
+  UINTN                                    SrcY;
+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL            *Blt;
+  UINT8                                    *Source;
+  UINT8                                    *Destination;
+  UINTN                                    IndexX;
+  UINT32                                   Uint32;
+  UINTN                                    Offset;
+  UINTN                                    WidthInBytes;
+
+  //
+  // BltBuffer to Video: Source is BltBuffer, destination is Video
+  //
+  if (DestinationY + Height > Configure->Height) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (DestinationX + Width > Configure->Width) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (Width == 0 || Height == 0) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  //
+  // If Delta is zero, then the entire BltBuffer is being used, so Delta is
+  // the number of bytes in each row of BltBuffer. Since BltBuffer is Width
+  // pixels size, the number of bytes in each row can be computed.
+  //
+  if (Delta == 0) {
+    Delta = Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL);
+  }
+
+  WidthInBytes = Width * Configure->BytesPerPixel;
+
+  for (SrcY = SourceY, DstY = DestinationY;
+       SrcY < (Height + SourceY);
+       SrcY++, DstY++) {
+
+    Offset = (DstY * Configure->PixelsPerScanLine) + DestinationX;
+    Offset = Configure->BytesPerPixel * Offset;
+    Destination = Configure->FrameBuffer + Offset;
+
+    if (Configure->PixelFormat == PixelBlueGreenRedReserved8BitPerColor) {
+      Source = (UINT8 *) BltBuffer + (SrcY * Delta);
+    } else {
+      for (IndexX = 0; IndexX < Width; IndexX++) {
+        Blt =
+          (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) (
+              (UINT8 *) BltBuffer +
+              (SrcY * Delta) +
+              ((SourceX + IndexX) * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))
+            );
+        Uint32 = *(UINT32*) Blt;
+        *(UINT32*) (Configure->LineBuffer + (IndexX * Configure->BytesPerPixel)) =
+          (UINT32) (
+              (((Uint32 << Configure->PixelShl[0]) >> Configure->PixelShr[0]) &
+               Configure->PixelMasks.RedMask) |
+              (((Uint32 << Configure->PixelShl[1]) >> Configure->PixelShr[1]) &
+               Configure->PixelMasks.GreenMask) |
+              (((Uint32 << Configure->PixelShl[2]) >> Configure->PixelShr[2]) &
+               Configure->PixelMasks.BlueMask)
+            );
+      }
+      Source = Configure->LineBuffer;
+    }
+
+    CopyMem (Destination, Source, WidthInBytes);
+  }
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Performs a UEFI Graphics Output Protocol Blt Video to Video operation
+
+  @param[in]  Configure     Pointer to a configuration which was successfully
+                            created by FrameBufferBltConfigure ().
+  @param[in]  SourceX       X location within video.
+  @param[in]  SourceY       Y location within video.
+  @param[in]  DestinationX  X location within video.
+  @param[in]  DestinationY  Y location within video.
+  @param[in]  Width         Width (in pixels).
+  @param[in]  Height        Height.
+
+  @retval RETURN_INVALID_PARAMETER Invalid parameter were passed in.
+  @retval RETURN_SUCCESS           The Blt operation was performed successfully.
+**/
+RETURN_STATUS
+FrameBufferBltLibVideoToVideo (
+  IN  FRAME_BUFFER_CONFIGURE                *Configure,
+  IN  UINTN                                 SourceX,
+  IN  UINTN                                 SourceY,
+  IN  UINTN                                 DestinationX,
+  IN  UINTN                                 DestinationY,
+  IN  UINTN                                 Width,
+  IN  UINTN                                 Height
+  )
+{
+  UINT8                                     *Source;
+  UINT8                                     *Destination;
+  UINTN                                     Offset;
+  UINTN                                     WidthInBytes;
+  INTN                                      LineStride;
+
+  //
+  // Video to Video: Source is Video, destination is Video
+  //
+  if (SourceY + Height > Configure->Height) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (SourceX + Width > Configure->Width) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (DestinationY + Height > Configure->Height) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (DestinationX + Width > Configure->Width) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  if (Width == 0 || Height == 0) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  WidthInBytes = Width * Configure->BytesPerPixel;
+
+  Offset = (SourceY * Configure->PixelsPerScanLine) + SourceX;
+  Offset = Configure->BytesPerPixel * Offset;
+  Source = Configure->FrameBuffer + Offset;
+
+  Offset = (DestinationY * Configure->PixelsPerScanLine) + DestinationX;
+  Offset = Configure->BytesPerPixel * Offset;
+  Destination = Configure->FrameBuffer + Offset;
+
+  LineStride = Configure->BytesPerPixel * Configure->PixelsPerScanLine;
+  if (Destination > Source) {
+    //
+    // Copy from last line to avoid source is corrupted by copying
+    //
+    Source += Height * LineStride;
+    Destination += Height * LineStride;
+    LineStride = -LineStride;
+  }
+
+  while (Height-- > 0) {
+    CopyMem (Destination, Source, WidthInBytes);
+
+    Source += LineStride;
+    Destination += LineStride;
+  }
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Performs a UEFI Graphics Output Protocol Blt operation.
+
+  @param[in]     Configure    Pointer to a configuration which was successfully
+                              created by FrameBufferBltConfigure ().
+  @param[in,out] BltBuffer    The data to transfer to screen.
+  @param[in]     BltOperation The operation to perform.
+  @param[in]     SourceX      The X coordinate of the source for BltOperation.
+  @param[in]     SourceY      The Y coordinate of the source for BltOperation.
+  @param[in]     DestinationX The X coordinate of the destination for
+                              BltOperation.
+  @param[in]     DestinationY The Y coordinate of the destination for
+                              BltOperation.
+  @param[in]     Width        The width of a rectangle in the blt rectangle
+                              in pixels.
+  @param[in]     Height       The height of a rectangle in the blt rectangle
+                              in pixels.
+  @param[in]     Delta        Not used for EfiBltVideoFill and
+                              EfiBltVideoToVideo operation. If a Delta of 0
+                              is used, the entire BltBuffer will be operated
+                              on. If a subrectangle of the BltBuffer is
+                              used, then Delta represents the number of
+                              bytes in a row of the BltBuffer.
+
+  @retval RETURN_INVALID_PARAMETER Invalid parameter were passed in.
+  @retval RETURN_SUCCESS           The Blt operation was performed successfully.
+**/
+RETURN_STATUS
+EFIAPI
+FrameBufferBlt (
+  IN     FRAME_BUFFER_CONFIGURE                *Configure,
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL         *BltBuffer, OPTIONAL
+  IN     EFI_GRAPHICS_OUTPUT_BLT_OPERATION     BltOperation,
+  IN     UINTN                                 SourceX,
+  IN     UINTN                                 SourceY,
+  IN     UINTN                                 DestinationX,
+  IN     UINTN                                 DestinationY,
+  IN     UINTN                                 Width,
+  IN     UINTN                                 Height,
+  IN     UINTN                                 Delta
+  )
+{
+  if (Configure == NULL) {
+    return RETURN_INVALID_PARAMETER;
+  }
+
+  switch (BltOperation) {
+  case EfiBltVideoToBltBuffer:
+    return FrameBufferBltLibVideoToBltBuffer (
+             Configure,
+             BltBuffer,
+             SourceX,
+             SourceY,
+             DestinationX,
+             DestinationY,
+             Width,
+             Height,
+             Delta
+             );
+
+  case EfiBltVideoToVideo:
+    return FrameBufferBltLibVideoToVideo (
+             Configure,
+             SourceX,
+             SourceY,
+             DestinationX,
+             DestinationY,
+             Width,
+             Height
+             );
+
+  case EfiBltVideoFill:
+    return FrameBufferBltLibVideoFill (
+             Configure,
+             BltBuffer,
+             DestinationX,
+             DestinationY,
+             Width,
+             Height
+             );
+
+  case EfiBltBufferToVideo:
+    return FrameBufferBltLibBufferToVideo (
+             Configure,
+             BltBuffer,
+             SourceX,
+             SourceY,
+             DestinationX,
+             DestinationY,
+             Width,
+             Height,
+             Delta
+             );
+
+  default:
+    return RETURN_INVALID_PARAMETER;
+  }
+}

MSM8916Pkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf

@@ -0,0 +1,34 @@
+## @file
+#  FrameBufferBltLib - Library to perform blt operations on a frame buffer.
+#
+#  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = FrameBufferBltLib
+  FILE_GUID                      = 243D3E8C-2780-4A25-9693-A410475BFCEC
+  MODULE_TYPE                    = UEFI_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = FrameBufferBltLib
+
+[Sources.common]
+  FrameBufferBltLib.c
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec

MSM8916Pkg/Library/FrameBufferSerialPortLib/FrameBufferSerialPortLib.c

@@ -0,0 +1,464 @@
+#include <PiDxe.h>
+
+#include <Library/ArmLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/HobLib.h>
+#include <Library/SerialPortLib.h>
+
+#include <Resources/font5x12.h>
+#include <Resources/FbColor.h>
+
+#include "FrameBufferSerialPortLib.h"
+
+FBCON_POSITION m_Position;
+FBCON_POSITION m_MaxPosition;
+FBCON_COLOR m_Color;
+BOOLEAN m_Initialized = FALSE;
+
+UINTN gWidth = FixedPcdGet32(PcdMipiFrameBufferWidth);
+// Reserve half screen for output
+UINTN gHeight = FixedPcdGet32(PcdMipiFrameBufferHeight);
+UINTN gBpp = FixedPcdGet32(PcdMipiFrameBufferPixelBpp);
+
+// Module-used internal routine
+void FbConPutCharWithFactor
+(
+	char c,
+	int type,
+	unsigned scale_factor
+);
+
+void FbConDrawglyph
+(
+	char *pixels,
+	unsigned stride,
+	unsigned bpp,
+	unsigned *glyph,
+	unsigned scale_factor
+);
+
+void FbConReset(void);
+void FbConScrollUp(void);
+void FbConFlush(void);
+
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize
+(
+	VOID
+)
+{
+	UINTN InterruptState = 0;
+
+	// Prevent dup initialization
+	if (m_Initialized) return RETURN_SUCCESS;
+
+	// Interrupt Disable
+	InterruptState = ArmGetInterruptState();
+	ArmDisableInterrupts();
+
+	// Reset console
+	FbConReset();
+
+	// Set flag
+	m_Initialized = TRUE;
+
+	if (InterruptState) ArmEnableInterrupts();
+	return RETURN_SUCCESS;
+}
+
+void ResetFb(void)
+{
+	// Clear current screen.
+	char* Pixels = (void*)FixedPcdGet32(PcdMipiFrameBufferAddress);
+	UINTN BgColor = FB_BGRA8888_BLACK;
+
+	// Set to black color.
+	for (UINTN i = 0; i < gWidth; i++)
+	{
+		for (UINTN j = 0; j < gHeight; j++)
+		{
+			BgColor = FB_BGRA8888_BLACK;
+			// Set pixel bit
+			for (UINTN p = 0; p < (gBpp / 8); p++)
+			{
+				*Pixels = (unsigned char)BgColor;
+				BgColor = BgColor >> 8;
+				Pixels++;
+			}
+		}
+	}
+}
+
+void FbConReset(void)
+{
+	// Reset position.
+	m_Position.x = 0;
+	m_Position.y = 0;
+
+	// Calc max position.
+	m_MaxPosition.x = gWidth / (FONT_WIDTH + 1);
+	m_MaxPosition.y = (gHeight - 1) / FONT_HEIGHT;
+
+	// Reset color.
+	m_Color.Foreground = FB_BGRA8888_WHITE;
+	m_Color.Background = FB_BGRA8888_BLACK;
+}
+
+void FbConPutCharWithFactor
+(
+	char c,
+	int type,
+	unsigned scale_factor
+)
+{
+	char* Pixels;
+
+	if (!m_Initialized) return;
+
+paint:
+
+	if ((unsigned char)c > 127) return;
+
+	if ((unsigned char)c < 32)
+	{
+		if (c == '\n')
+		{
+			goto newline;
+		}
+		else if (c == '\r')
+		{
+			m_Position.x = 0;
+			return;
+		}
+		else
+		{
+			return;
+		}
+	}
+
+	// Save some space
+	if (m_Position.x == 0 && (unsigned char)c == ' ' &&
+		type != FBCON_SUBTITLE_MSG &&
+		type != FBCON_TITLE_MSG)
+		return;
+
+	BOOLEAN intstate = ArmGetInterruptState();
+	ArmDisableInterrupts();
+
+	Pixels = (void*)FixedPcdGet32(PcdMipiFrameBufferAddress);
+	Pixels += m_Position.y * ((gBpp / 8) * FONT_HEIGHT * gWidth);
+	Pixels += m_Position.x * scale_factor * ((gBpp / 8) * (FONT_WIDTH + 1));
+
+	FbConDrawglyph(
+		Pixels,
+		gWidth,
+		(gBpp / 8),
+		font5x12 + (c - 32) * 2,
+		scale_factor);
+
+	m_Position.x++;
+
+	if (m_Position.x >= (int)(m_MaxPosition.x / scale_factor)) goto newline;
+
+	if (intstate) ArmEnableInterrupts();
+	return;
+
+newline:
+	m_Position.y += scale_factor;
+	m_Position.x = 0;
+	if (m_Position.y >= m_MaxPosition.y - scale_factor)
+	{
+		ResetFb();
+		FbConFlush();
+		m_Position.y = 0;
+
+		if (intstate) ArmEnableInterrupts();
+		goto paint;
+	}
+	else
+	{
+		FbConFlush();
+		if (intstate) ArmEnableInterrupts();
+	}
+
+}
+
+void FbConDrawglyph
+(
+	char *pixels,
+	unsigned stride,
+	unsigned bpp,
+	unsigned *glyph,
+	unsigned scale_factor
+)
+{
+	char *bg_pixels = pixels;
+	unsigned x, y, i, j, k;
+	unsigned data, temp;
+	unsigned int fg_color = m_Color.Foreground;
+	unsigned int bg_color = m_Color.Background;
+	stride -= FONT_WIDTH * scale_factor;
+
+	for (y = 0; y < FONT_HEIGHT / 2; ++y)
+	{
+		for (i = 0; i < scale_factor; i++)
+		{
+			for (x = 0; x < FONT_WIDTH; ++x)
+			{
+				for (j = 0; j < scale_factor; j++)
+				{
+					bg_color = m_Color.Background;
+					for (k = 0; k < bpp; k++)
+					{
+						*bg_pixels = (unsigned char)bg_color;
+						bg_color = bg_color >> 8;
+						bg_pixels++;
+					}
+				}
+			}
+			bg_pixels += (stride * bpp);
+		}
+	}
+
+	for (y = 0; y < FONT_HEIGHT / 2; ++y)
+	{
+		for (i = 0; i < scale_factor; i++)
+		{
+			for (x = 0; x < FONT_WIDTH; ++x)
+			{
+				for (j = 0; j < scale_factor; j++)
+				{
+					bg_color = m_Color.Background;
+					for (k = 0; k < bpp; k++)
+					{
+						*bg_pixels = (unsigned char)bg_color;
+						bg_color = bg_color >> 8;
+						bg_pixels++;
+					}
+				}
+			}
+			bg_pixels += (stride * bpp);
+		}
+	}
+
+	data = glyph[0];
+	for (y = 0; y < FONT_HEIGHT / 2; ++y)
+	{
+		temp = data;
+		for (i = 0; i < scale_factor; i++)
+		{
+			data = temp;
+			for (x = 0; x < FONT_WIDTH; ++x)
+			{
+				if (data & 1)
+				{
+					for (j = 0; j < scale_factor; j++)
+					{
+						fg_color = m_Color.Foreground;
+						for (k = 0; k < bpp; k++)
+						{
+							*pixels = (unsigned char)fg_color;
+							fg_color = fg_color >> 8;
+							pixels++;
+						}
+					}
+				}
+				else
+				{
+					for (j = 0; j < scale_factor; j++)
+					{
+						pixels = pixels + bpp;
+					}
+				}
+				data >>= 1;
+			}
+			pixels += (stride * bpp);
+		}
+	}
+
+	data = glyph[1];
+	for (y = 0; y < FONT_HEIGHT / 2; ++y)
+	{
+		temp = data;
+		for (i = 0; i < scale_factor; i++)
+		{
+			data = temp;
+			for (x = 0; x < FONT_WIDTH; ++x)
+			{
+				if (data & 1)
+				{
+					for (j = 0; j < scale_factor; j++)
+					{
+						fg_color = m_Color.Foreground;
+						for (k = 0; k < bpp; k++)
+						{
+							*pixels = (unsigned char)fg_color;
+							fg_color = fg_color >> 8;
+							pixels++;
+						}
+					}
+				}
+				else
+				{
+					for (j = 0; j < scale_factor; j++)
+					{
+						pixels = pixels + bpp;
+					}
+				}
+				data >>= 1;
+			}
+			pixels += (stride * bpp);
+		}
+	}
+}
+
+/* TODO: Take stride into account */
+void FbConScrollUp(void)
+{
+	unsigned short *dst = (void*)FixedPcdGet32(PcdMipiFrameBufferAddress);
+	unsigned short *src = dst + (gWidth * FONT_HEIGHT);
+	unsigned count = gWidth * (gHeight - FONT_HEIGHT);
+
+	while (count--)
+	{
+		*dst++ = *src++;
+	}
+
+	count = gWidth * FONT_HEIGHT;
+	while (count--)
+	{
+		*dst++ = m_Color.Background;
+	}
+
+	FbConFlush();
+}
+
+void FbConFlush(void)
+{
+	unsigned total_x, total_y;
+	unsigned bytes_per_bpp;
+
+	total_x = gWidth;
+	total_y = gHeight;
+	bytes_per_bpp = (gBpp / 8);
+
+	WriteBackInvalidateDataCacheRange(
+		(void*)FixedPcdGet32(PcdMipiFrameBufferAddress),
+		(total_x * total_y * bytes_per_bpp)
+	);
+}
+
+UINTN
+EFIAPI
+SerialPortWrite
+(
+	IN UINT8     *Buffer,
+	IN UINTN     NumberOfBytes
+)
+{
+	UINT8* CONST Final = &Buffer[NumberOfBytes];
+	UINTN  InterruptState = ArmGetInterruptState();
+	ArmDisableInterrupts();
+
+	while (Buffer < Final)
+	{
+		FbConPutCharWithFactor(*Buffer++, FBCON_COMMON_MSG, SCALE_FACTOR);
+	}
+
+	if (InterruptState) ArmEnableInterrupts();
+	return NumberOfBytes;
+}
+
+UINTN
+EFIAPI
+SerialPortWriteCritical
+(
+	IN UINT8     *Buffer,
+	IN UINTN     NumberOfBytes
+)
+{
+	UINT8* CONST Final = &Buffer[NumberOfBytes];
+	UINTN  CurrentForeground = m_Color.Foreground;
+	UINTN  InterruptState = ArmGetInterruptState();
+
+	ArmDisableInterrupts();
+	m_Color.Foreground = FB_BGRA8888_YELLOW;
+
+	while (Buffer < Final)
+	{
+		FbConPutCharWithFactor(*Buffer++, FBCON_COMMON_MSG, SCALE_FACTOR);
+	}
+
+	m_Color.Foreground = CurrentForeground;
+
+	if (InterruptState) ArmEnableInterrupts();
+	return NumberOfBytes;
+}
+
+UINTN
+EFIAPI
+SerialPortRead
+(
+	OUT UINT8     *Buffer,
+	IN  UINTN     NumberOfBytes
+)
+{
+	return 0;
+}
+
+BOOLEAN
+EFIAPI
+SerialPortPoll
+(
+	VOID
+)
+{
+	return FALSE;
+}
+
+RETURN_STATUS
+EFIAPI
+SerialPortSetControl
+(
+	IN UINT32 Control
+)
+{
+	return RETURN_UNSUPPORTED;
+}
+
+RETURN_STATUS
+EFIAPI
+SerialPortGetControl
+(
+	OUT UINT32 *Control
+)
+{
+	return RETURN_UNSUPPORTED;
+}
+
+RETURN_STATUS
+EFIAPI
+SerialPortSetAttributes
+(
+	IN OUT UINT64             *BaudRate,
+	IN OUT UINT32             *ReceiveFifoDepth,
+	IN OUT UINT32             *Timeout,
+	IN OUT EFI_PARITY_TYPE    *Parity,
+	IN OUT UINT8              *DataBits,
+	IN OUT EFI_STOP_BITS_TYPE *StopBits
+)
+{
+	return RETURN_UNSUPPORTED;
+}
+
+UINTN SerialPortFlush(VOID)
+{
+	return 0;
+}
+
+VOID
+EnableSynchronousSerialPortIO(VOID)
+{
+	// Already synchronous
+}

MSM8916Pkg/Library/FrameBufferSerialPortLib/FrameBufferSerialPortLib.h

@@ -0,0 +1,41 @@
+#ifndef _FRAMEBUFFER_SERIALPORT_LIB_H_
+#define _FRAMEBUFFER_SERIALPORT_LIB_H_
+
+typedef struct _FBCON_POSITION {
+    INTN x;
+    INTN y;
+} FBCON_POSITION, *PFBCON_POSITION;
+
+typedef struct _FBCON_COLOR {
+    UINTN Foreground;
+    UINTN Background;
+} FBCON_COLOR, *PFBCON_COLOR;
+
+enum FbConMsgType {
+	/* type for menu */
+	FBCON_COMMON_MSG = 0,
+	FBCON_UNLOCK_TITLE_MSG,
+	FBCON_TITLE_MSG,
+	FBCON_SUBTITLE_MSG,
+
+	/* type for warning */
+	FBCON_YELLOW_MSG,
+	FBCON_ORANGE_MSG,
+	FBCON_RED_MSG,
+	FBCON_GREEN_MSG,
+
+	/* and the select message's background */
+	FBCON_SELECT_MSG_BG_COLOR,
+};
+
+void ResetFb(void);
+
+UINTN
+EFIAPI
+SerialPortWriteCritical
+(
+	IN UINT8     *Buffer,
+	IN UINTN     NumberOfBytes
+);
+
+#endif

MSM8916Pkg/Library/FrameBufferSerialPortLib/FrameBufferSerialPortLib.inf

@@ -0,0 +1,30 @@
+[Defines]
+  INF_VERSION    = 0x00010005
+  BASE_NAME      = FrameBufferSerialPortLib
+  MODULE_TYPE    = BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = SerialPortLib
+
+[Sources.common]
+  FrameBufferSerialPortLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPkg/ArmPkg.dec
+  MSM8916Pkg/MSM8916Pkg.dec
+
+[LibraryClasses]
+  ArmLib
+  PcdLib
+  IoLib
+  HobLib
+  CompilerIntrinsicsLib
+  CacheMaintenanceLib
+
+[Pcd]
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferAddress
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferWidth
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferHeight
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferPixelBpp
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight

MSM8916Pkg/Library/InMemorySerialPortLib/InMemorySerialPortLib.c

@@ -34,19 +34,17 @@ SerialPortInitialize (
   VOID
   )
 {
-#if 0
+  UINT8* base = (UINT8*)0x8d100000ull;
-  UINT8* base = (UINT8*)0xa1a10000ull;
   for (UINTN i = 0; i < 0x200000; i++) {
     base[i] = 0;
   }
-#endif
   return RETURN_SUCCESS;
 }
 
 static void mem_putchar(UINT8 c) {
   static const UINTN size = 0x200000;
   static UINTN offset = 0;
-  UINT8* base = (UINT8*)0xa1a10000ull;
+  UINT8* base = (UINT8*)0x8d100000ull;
   base[offset++] = c;
   if (offset >= size) {
     offset = 0;

MSM8916Pkg/Library/MSM8916PkgLib/MSM8916PkgHelper.S

@@ -18,31 +18,7 @@
 .align 3
 
 ASM_FUNC(ArmPlatformPeiBootAction)
-startlabel:
-  // check if we're located at expected location
-  adr	x4, .
-  ldr	x5, =ArmPlatformPeiBootAction
-  cmp	x4, x5
-  bne	docopy
   ret
-docopy:
-  // find our start address by getting our expected offset, then subtracting it from our actual address
-  ldr	x6, =FixedPcdGet64 (PcdFdBaseAddress)
-  sub	x5, x5, x6 // x5 now holds offset of ArmPlatformPeiBootAction from start of FD base
-  sub	x4, x4, x5 // x4 now holds address of actual FD base
-  // tweak the return address
-  // note: x30 is lr; gcc5 doesn't have the alias
-  sub	x30, x30, x4
-  add	x30, x30, x6
-  ldr	x5, =FixedPcdGet64 (PcdFdSize)
-  // crap memcpy
-loop:
-  ldp	x2, x3, [x4], #16
-  stp	x2, x3, [x6], #16
-  subs	x5, x5, #16
-  b.ne	loop
-  ret
-.ltorg
 
 //UINTN
 //ArmPlatformIsPrimaryCore (

MSM8916Pkg/Library/MSM8916PkgLib/MSM8916PkgLib.inf

@@ -12,7 +12,7 @@
 
 [Defines]
   INF_VERSION                    = 0x00010019
-  BASE_NAME                      = Pixel3XLLib
+  BASE_NAME                      = MSM8916PkgLib
   FILE_GUID                      = 61620091-45BA-4EFF-8F58-F7ABF228CEBC
   MODULE_TYPE                    = BASE
   VERSION_STRING                 = 1.0
@@ -33,9 +33,9 @@
   SerialPortLib
 
 [Sources.common]
-  Pixel3XL.c
+  MSM8916Pkg.c
-  Pixel3XLHelper.S
+  MSM8916PkgHelper.S
-  Pixel3XLMem.c
+  MSM8916PkgMem.c
 
 [FixedPcd]
   gArmTokenSpaceGuid.PcdArmPrimaryCore

MSM8916Pkg/Library/MSM8916PkgLib/MSM8916PkgMem.c

@@ -27,18 +27,25 @@
 #define DDR_ATTRIBUTES_UNCACHED         ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
 
 #define SDM845_PERIPH_BASE              0x00000000
-#define SDM845_PERIPH_SZ                0x80000000
+#define SDM845_PERIPH_SZ                0x60000000
 
 #define HIKEY960_MEMORY_SIZE               0x0000000100000000
 
-STATIC struct Pixel3XLReservedMemory {
+STATIC struct MSM8916PkgReservedMemory {
   EFI_PHYSICAL_ADDRESS         Offset;
   EFI_PHYSICAL_ADDRESS         Size;
-} Pixel3XLReservedMemoryBuffer [] = {
+} MSM8916PkgReservedMemoryBuffer [] = {
-  { 0x85700000, 0x00600000 },    // hyp_region
+/**  { 0x86000000, 0x00300000 },    // tz_apps_region
-  { 0x85e00000, 0x00100000 },    // xbl_region
+  { 0x86300000, 0x00100000 },    // smem_region
-  { 0x85fc0000, 0x02f40000 },    // removed_region
+  { 0x86400000, 0x00280000 },    // tz/hyp_region
-  { 0x8ab00000, 0x01400000 },    // qseecom_region
+  { 0x86700000, 0x06C00000 },    // MPSS/EFS/DHMS/PIL_region
+**/
+/*
+  { 0x85A00000, 0x00E00000 },    // tz-apps_region
+  { 0x86800000, 0x05400000 },    // mpss_region
+  { 0x8bc00000, 0x00200000 },    // gps_region
+  { 0x8be00000, 0x00600000 },    // wcnss_region
+  { 0x8c400000, 0x00600000 },    // venus_region*/
 };
 
 /**
@@ -82,30 +89,30 @@ ArmPlatformGetVirtualMemoryMap (
   );
 
   NextHob.Raw = GetHobList ();
-  Count = sizeof (Pixel3XLReservedMemoryBuffer) / sizeof (struct Pixel3XLReservedMemory);
+  Count = sizeof (MSM8916PkgReservedMemoryBuffer) / sizeof (struct MSM8916PkgReservedMemory);
   while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL)
   {
     if (Index >= Count)
       break;
     if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
-        (Pixel3XLReservedMemoryBuffer[Index].Offset >= NextHob.ResourceDescriptor->PhysicalStart) &&
+        (MSM8916PkgReservedMemoryBuffer[Index].Offset >= NextHob.ResourceDescriptor->PhysicalStart) &&
-        ((Pixel3XLReservedMemoryBuffer[Index].Offset + Pixel3XLReservedMemoryBuffer[Index].Size) <=
+        ((MSM8916PkgReservedMemoryBuffer[Index].Offset + MSM8916PkgReservedMemoryBuffer[Index].Size) <=
          NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))
     {
       ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;
       ResourceLength = NextHob.ResourceDescriptor->ResourceLength;
       ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;
-      ReservedTop = Pixel3XLReservedMemoryBuffer[Index].Offset + Pixel3XLReservedMemoryBuffer[Index].Size;
+      ReservedTop = MSM8916PkgReservedMemoryBuffer[Index].Offset + MSM8916PkgReservedMemoryBuffer[Index].Size;
 
       // Create the System Memory HOB for the reserved buffer
       BuildResourceDescriptorHob (
         EFI_RESOURCE_MEMORY_RESERVED,
         EFI_RESOURCE_ATTRIBUTE_PRESENT,
-        Pixel3XLReservedMemoryBuffer[Index].Offset,
+        MSM8916PkgReservedMemoryBuffer[Index].Offset,
-        Pixel3XLReservedMemoryBuffer[Index].Size
+        MSM8916PkgReservedMemoryBuffer[Index].Size
       );
       // Update the HOB
-      NextHob.ResourceDescriptor->ResourceLength = Pixel3XLReservedMemoryBuffer[Index].Offset -
+      NextHob.ResourceDescriptor->ResourceLength = MSM8916PkgReservedMemoryBuffer[Index].Offset -
                                                    NextHob.ResourceDescriptor->PhysicalStart;
 
       // If there is some memory available on the top of the reserved memory then create a HOB

MSM8916Pkg/Library/MemoryInitPeiLib/MemoryInitPeiLib.c

@@ -0,0 +1,74 @@
+/** @file
+*
+*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+*  Copyright (c) 2019, RUIKAI LIU and MR TUNNEL. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <PiPei.h>
+
+#include <Library/ArmMmuLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+
+extern UINT64 mSystemMemoryEnd;
+
+VOID
+BuildMemoryTypeInformationHob (
+  VOID
+);
+
+STATIC
+VOID
+InitMmu (
+  IN ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable
+)
+{
+
+  VOID                          *TranslationTableBase;
+  UINTN                         TranslationTableSize;
+  RETURN_STATUS                 Status;
+
+  //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
+  //      DRAM (even at the top of DRAM as it is the first permanent memory allocation)
+  Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU\n"));
+  }
+}
+
+EFI_STATUS
+EFIAPI
+MemoryPeim (
+  IN EFI_PHYSICAL_ADDRESS               UefiMemoryBase,
+  IN UINT64                             UefiMemorySize
+  )
+{
+  ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
+
+  // Get Virtual Memory Map from the Platform Library
+  ArmPlatformGetVirtualMemoryMap (&MemoryTable);
+
+  // Ensure PcdSystemMemorySize has been set
+  ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
+
+  InitMmu (MemoryTable);
+
+  if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)){
+        // Optional feature that helps prevent EFI memory map fragmentation.
+  	BuildMemoryTypeInformationHob();
+  }
+
+  return EFI_SUCCESS;
+}

MSM8916Pkg/Library/MemoryInitPeiLib/PeiMemoryAllocationLib.inf

@@ -0,0 +1,51 @@
+#/** @file
+#
+#  Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
+#  Copyright (c) 2016, Linaro, Ltd. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = MemoryInitPeiLib
+  FILE_GUID                      = 4bbc9c10-a100-43fb-8311-332ba497d1b4
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = MemoryInitPeiLib|SEC PEIM
+
+[Sources]
+  MemoryInitPeiLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  MSM8916Pkg/MSM8916Pkg.dec
+
+[LibraryClasses]
+  DebugLib
+  HobLib
+  ArmMmuLib
+  ArmPlatformLib
+
+[Guids]
+  gEfiMemoryTypeInformationGuid
+
+[FeaturePcd]
+  gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
+
+[Depex]
+  TRUE

MSM8916Pkg/Library/PlatformBootManagerLib/PlatformBm.c

@@ -0,0 +1,691 @@
+/** @file
+  Implementation for PlatformBootManagerLib library class interfaces.
+
+  Copyright (C) 2015-2016, Red Hat, Inc.
+  Copyright (c) 2014, ARM Ltd. All rights reserved.
+  Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.
+  Copyright (c) 2016, Linaro Ltd. All rights reserved.
+  Copyright (c), 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution. The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BootLogoLib.h>
+#include <Library/CapsuleLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PrintLib.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/EsrtManagement.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/LoadedImage.h>
+#include <Guid/EventGroup.h>
+#include <Guid/TtyTerm.h>
+#include <Configuration/BootDevices.h>
+
+#include "PlatformBm.h"
+
+#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
+
+#pragma pack (1)
+typedef struct {
+  VENDOR_DEVICE_PATH         SerialDxe;
+  UART_DEVICE_PATH           Uart;
+  VENDOR_DEFINED_DEVICE_PATH TermType;
+  EFI_DEVICE_PATH_PROTOCOL   End;
+} PLATFORM_SERIAL_CONSOLE;
+#pragma pack ()
+
+typedef struct {
+  VENDOR_DEVICE_PATH            Custom;
+  USB_DEVICE_PATH               Hub;
+  USB_DEVICE_PATH               Dev;
+  EFI_DEVICE_PATH_PROTOCOL      EndDevicePath;
+} PLATFORM_USB_DEV;
+
+#define DW_USB_DXE_FILE_GUID { \
+          0x4bf1704c, 0x03f4, 0x46d5, \
+          { 0xbc, 0xa6, 0x82, 0xfa, 0x58, 0x0b, 0xad, 0xfd } \
+          }
+
+STATIC PLATFORM_USB_DEV mUsbHubPort = {
+  //
+  // VENDOR_DEVICE_PATH DwUsbHostDxe
+  //
+  {
+    { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
+    DW_USB_DXE_FILE_GUID
+  },
+
+  //
+  // USB_DEVICE_PATH Hub
+  //
+  {
+    { MESSAGING_DEVICE_PATH, MSG_USB_DP, DP_NODE_LEN (USB_DEVICE_PATH) },
+    0, 0
+  },
+
+  //
+  // USB_DEVICE_PATH Dev
+  //
+  {
+    { MESSAGING_DEVICE_PATH, MSG_USB_DP, DP_NODE_LEN (USB_DEVICE_PATH) },
+    1, 0
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+    END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+#define SERIAL_DXE_FILE_GUID { \
+          0xD3987D4B, 0x971A, 0x435F, \
+          { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
+          }
+
+STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
+  //
+  // VENDOR_DEVICE_PATH SerialDxe
+  //
+  {
+    { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
+    SERIAL_DXE_FILE_GUID
+  },
+
+  //
+  // UART_DEVICE_PATH Uart
+  //
+  {
+    { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
+    0,                                      // Reserved
+    FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
+    FixedPcdGet8 (PcdUartDefaultDataBits),  // DataBits
+    FixedPcdGet8 (PcdUartDefaultParity),    // Parity
+    FixedPcdGet8 (PcdUartDefaultStopBits)   // StopBits
+  },
+
+  //
+  // VENDOR_DEFINED_DEVICE_PATH TermType
+  //
+  {
+    {
+      MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
+      DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
+    }
+    //
+    // Guid to be filled in dynamically
+    //
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+    END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+
+#pragma pack (1)
+typedef struct {
+  USB_CLASS_DEVICE_PATH    Keyboard;
+  EFI_DEVICE_PATH_PROTOCOL End;
+} PLATFORM_USB_KEYBOARD;
+#pragma pack ()
+
+STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
+  //
+  // USB_CLASS_DEVICE_PATH Keyboard
+  //
+  {
+    {
+      MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
+      DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
+    },
+    0xFFFF, // VendorId: any
+    0xFFFF, // ProductId: any
+    3,      // DeviceClass: HID
+    1,      // DeviceSubClass: boot
+    1       // DeviceProtocol: keyboard
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+    END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+
+/**
+  Check if the handle satisfies a particular condition.
+
+  @param[in] Handle      The handle to check.
+  @param[in] ReportText  A caller-allocated string passed in for reporting
+                         purposes. It must never be NULL.
+
+  @retval TRUE   The condition is satisfied.
+  @retval FALSE  Otherwise. This includes the case when the condition could not
+                 be fully evaluated due to an error.
+**/
+typedef
+BOOLEAN
+(EFIAPI *FILTER_FUNCTION) (
+  IN EFI_HANDLE   Handle,
+  IN CONST CHAR16 *ReportText
+  );
+
+
+/**
+  Process a handle.
+
+  @param[in] Handle      The handle to process.
+  @param[in] ReportText  A caller-allocated string passed in for reporting
+                         purposes. It must never be NULL.
+**/
+typedef
+VOID
+(EFIAPI *CALLBACK_FUNCTION)  (
+  IN EFI_HANDLE   Handle,
+  IN CONST CHAR16 *ReportText
+  );
+
+/**
+  Locate all handles that carry the specified protocol, filter them with a
+  callback function, and pass each handle that passes the filter to another
+  callback.
+
+  @param[in] ProtocolGuid  The protocol to look for.
+
+  @param[in] Filter        The filter function to pass each handle to. If this
+                           parameter is NULL, then all handles are processed.
+
+  @param[in] Process       The callback function to pass each handle to that
+                           clears the filter.
+**/
+STATIC
+VOID
+FilterAndProcess (
+  IN EFI_GUID          *ProtocolGuid,
+  IN FILTER_FUNCTION   Filter         OPTIONAL,
+  IN CALLBACK_FUNCTION Process
+  )
+{
+  EFI_STATUS Status;
+  EFI_HANDLE *Handles;
+  UINTN      NoHandles;
+  UINTN      Idx;
+
+  Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+                  NULL /* SearchKey */, &NoHandles, &Handles);
+  if (EFI_ERROR (Status)) {
+    //
+    // This is not an error, just an informative condition.
+    //
+    DEBUG ((EFI_D_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+      Status));
+    return;
+  }
+
+  ASSERT (NoHandles > 0);
+  for (Idx = 0; Idx < NoHandles; ++Idx) {
+    CHAR16        *DevicePathText;
+    STATIC CHAR16 Fallback[] = L"<device path unavailable>";
+
+    //
+    // The ConvertDevicePathToText() function handles NULL input transparently.
+    //
+    DevicePathText = ConvertDevicePathToText (
+                       DevicePathFromHandle (Handles[Idx]),
+                       FALSE, // DisplayOnly
+                       FALSE  // AllowShortcuts
+                       );
+    if (DevicePathText == NULL) {
+      DevicePathText = Fallback;
+    }
+
+    if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
+      Process (Handles[Idx], DevicePathText);
+    }
+
+    if (DevicePathText != Fallback) {
+      FreePool (DevicePathText);
+    }
+  }
+  gBS->FreePool (Handles);
+}
+
+/**
+  This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
+  handle, and adds it to ConOut and ErrOut.
+**/
+STATIC
+VOID
+EFIAPI
+AddOutput (
+  IN EFI_HANDLE   Handle,
+  IN CONST CHAR16 *ReportText
+  )
+{
+  EFI_STATUS               Status;
+  EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+  DevicePath = DevicePathFromHandle (Handle);
+  if (DevicePath == NULL) {
+    DEBUG ((EFI_D_ERROR, "%a: %s: handle %p: device path not found\n",
+      __FUNCTION__, ReportText, Handle));
+    return;
+  }
+
+  Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
+      ReportText, Status));
+    return;
+  }
+
+  Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
+      ReportText, Status));
+    return;
+  }
+
+  DEBUG ((EFI_D_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
+    ReportText));
+}
+
+STATIC
+VOID
+EFIAPI
+AddInput (
+  IN EFI_HANDLE   Handle,
+  IN CONST CHAR16 *ReportText
+  )
+{
+  EFI_STATUS               Status;
+  EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+  DevicePath = DevicePathFromHandle (Handle);
+  if (DevicePath == NULL) {
+    DEBUG ((EFI_D_ERROR, "%a: %s: handle %p: device path not found\n",
+      __FUNCTION__, ReportText, Handle));
+    return;
+  }
+
+  Status = EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "%a: %s: adding to ConIn: %r\n", __FUNCTION__,
+      ReportText, Status));
+    return;
+  }
+
+  DEBUG ((EFI_D_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
+    ReportText));
+}
+
+STATIC
+INTN
+PlatformRegisterBootOption (
+  EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+  CHAR16                   *Description,
+  UINT32                   Attributes
+  )
+{
+  EFI_STATUS                        Status;
+  INTN                              OptionIndex;
+  EFI_BOOT_MANAGER_LOAD_OPTION      NewOption;
+  EFI_BOOT_MANAGER_LOAD_OPTION      *BootOptions;
+  UINTN                             BootOptionCount;
+
+  Status = EfiBootManagerInitializeLoadOption (
+             &NewOption,
+             LoadOptionNumberUnassigned,
+             LoadOptionTypeBoot,
+             Attributes,
+             Description,
+             DevicePath,
+             NULL,
+             0
+             );
+  ASSERT_EFI_ERROR (Status);
+
+  BootOptions = EfiBootManagerGetLoadOptions (
+                  &BootOptionCount, LoadOptionTypeBoot
+                  );
+
+  OptionIndex = EfiBootManagerFindLoadOption (
+                  &NewOption, BootOptions, BootOptionCount
+                  );
+
+  if (OptionIndex == -1) {
+    Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
+    ASSERT_EFI_ERROR (Status);
+    OptionIndex = BootOptionCount;
+  }
+
+  EfiBootManagerFreeLoadOption (&NewOption);
+  EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
+
+  return OptionIndex;
+}
+
+STATIC
+INTN
+PlatformRegisterFvBootOption (
+  CONST EFI_GUID                   *FileGuid,
+  CHAR16                           *Description,
+  UINT32                           Attributes
+  )
+{
+  EFI_STATUS                        Status;
+  MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
+  EFI_LOADED_IMAGE_PROTOCOL         *LoadedImage;
+  EFI_DEVICE_PATH_PROTOCOL          *DevicePath;
+  INTN OptionIndex;
+
+  Status = gBS->HandleProtocol (
+                  gImageHandle,
+                  &gEfiLoadedImageProtocolGuid,
+                  (VOID **) &LoadedImage
+                  );
+  ASSERT_EFI_ERROR (Status);
+
+  EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
+  DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
+  ASSERT (DevicePath != NULL);
+  DevicePath = AppendDevicePathNode (
+                 DevicePath,
+                 (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
+                 );
+  ASSERT (DevicePath != NULL);
+
+  OptionIndex = PlatformRegisterBootOption (DevicePath,
+                                            Description,
+                                            Attributes);
+  FreePool (DevicePath);
+
+  return OptionIndex;
+}
+
+
+STATIC
+VOID
+PlatformRegisterOptionsAndKeys (
+  VOID
+  )
+{
+  INTN ShellOption;
+
+  ShellOption = PlatformRegisterFvBootOption(
+      &gUefiShellFileGuid, 
+      L"UEFI Shell",
+      LOAD_OPTION_ACTIVE
+  );
+}
+
+STATIC
+VOID
+PlatformRegisterSetupKey(
+  VOID
+)
+{
+  EFI_STATUS                   Status;
+  EFI_INPUT_KEY                PowerBtn;
+  EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
+
+  //
+  // Map Power to Boot Manager Menu
+  //
+  PowerBtn.ScanCode    = SCAN_NULL;
+  PowerBtn.UnicodeChar = CHAR_CARRIAGE_RETURN;
+  Status = EfiBootManagerGetBootManagerMenu(&BootOption);
+  ASSERT_EFI_ERROR(Status);
+  Status = EfiBootManagerAddKeyOptionVariable(
+      NULL, 
+      (UINT16) BootOption.OptionNumber, 
+      0, 
+      &PowerBtn, 
+      NULL
+  );
+  ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
+}
+
+
+//
+// BDS Platform Functions
+//
+/**
+  Do the platform init, can be customized by OEM/IBV
+  Possible things that can be done in PlatformBootManagerBeforeConsole:
+  > Update console variable: 1. include hot-plug devices;
+  >                          2. Clear ConIn and add SOL for AMT
+  > Register new Driver#### or Boot####
+  > Register new Key####: e.g.: F12
+  > Signal ReadyToLock event
+  > Authentication action: 1. connect Auth devices;
+  >                        2. Identify auto logon user.
+**/
+VOID
+EFIAPI
+PlatformBootManagerBeforeConsole (
+  VOID
+  )
+{
+  EFI_STATUS                    Status;
+  ESRT_MANAGEMENT_PROTOCOL      *EsrtManagement;
+
+  if (GetBootModeHob() == BOOT_ON_FLASH_UPDATE) {
+    DEBUG ((DEBUG_INFO, "ProcessCapsules Before EndOfDxe ......\n"));
+    Status = ProcessCapsules ();
+    DEBUG ((DEBUG_INFO, "ProcessCapsules returned %r\n", Status));
+  } else {
+    Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL,
+                    (VOID **)&EsrtManagement);
+    if (!EFI_ERROR (Status)) {
+      EsrtManagement->SyncEsrtFmp ();
+    }
+  }
+
+  //
+  // Now add the device path of all handles with GOP on them to ConOut and
+  // ErrOut.
+  //
+  FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
+
+  //
+  // Add the hardcoded short-form USB keyboard device path to ConIn.
+  //
+  EfiBootManagerUpdateConsoleVariable (ConIn,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
+
+  //
+  // Now add the device path of all handles with QcomKeypadDeviceProtocolGuid
+  // on them to ConIn.
+  //
+  FilterAndProcess (&gEFIDroidKeypadDeviceProtocolGuid, NULL, AddInput);
+  // Register setup key then
+  PlatformRegisterSetupKey();
+
+  //
+  // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
+  //
+  ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4);
+  CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
+
+  EfiBootManagerUpdateConsoleVariable (ConIn,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+  EfiBootManagerUpdateConsoleVariable (ConOut,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+  EfiBootManagerUpdateConsoleVariable (ErrOut,
+    (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+
+  //
+  // Signal EndOfDxe PI Event
+  //
+  EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
+
+  //
+  // Dispatch deferred images after EndOfDxe event and ReadyToLock installation.
+  //
+  EfiBootManagerDispatchDeferredImages ();
+}
+
+/**
+  Do the platform specific action after the console is ready
+  Possible things that can be done in PlatformBootManagerAfterConsole:
+  > Console post action:
+    > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
+    > Signal console ready platform customized event
+  > Run diagnostics like memory testing
+  > Connect certain devices
+  > Dispatch aditional option roms
+  > Special boot: e.g.: USB boot, enter UI
+**/
+VOID
+EFIAPI
+PlatformBootManagerAfterConsole (
+  VOID
+  )
+{
+  ESRT_MANAGEMENT_PROTOCOL      *EsrtManagement;
+  EFI_STATUS                    Status;
+
+  //
+  // Show the splash screen.
+  //
+  Status = BootLogoEnableLogo ();
+
+  //
+  // Connect the rest of the devices.
+  //
+  EfiBootManagerConnectAll ();
+
+  Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL,
+                  (VOID **)&EsrtManagement);
+  if (!EFI_ERROR (Status)) {
+    EsrtManagement->SyncEsrtFmp ();
+  }
+
+  if (GetBootModeHob() == BOOT_ON_FLASH_UPDATE) {
+    DEBUG((DEBUG_INFO, "ProcessCapsules After EndOfDxe ......\n"));
+    Status = ProcessCapsules ();
+    DEBUG((DEBUG_INFO, "ProcessCapsules returned %r\n", Status));
+  }
+
+  EfiBootManagerRefreshAllBootOption ();
+
+  PlatformRegisterOptionsAndKeys ();
+}
+
+/**
+  This function is called each second during the boot manager waits the
+  timeout.
+
+  @param TimeoutRemain  The remaining timeout.
+**/
+VOID
+EFIAPI
+PlatformBootManagerWaitCallback (
+  UINT16          TimeoutRemain
+  )
+{
+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black;
+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White;
+  UINT16                              Timeout;
+  EFI_STATUS                          Status;
+
+  Timeout = PcdGet16 (PcdPlatformBootTimeOut);
+
+  Black.Raw = 0x00000000;
+  White.Raw = 0x00FFFFFF;
+
+  Status = BootLogoUpdateProgress (
+             White.Pixel,
+             Black.Pixel,
+             L"Press Power Button for Setup Utility\n",
+             White.Pixel,
+             (Timeout - TimeoutRemain) * 100 / Timeout,
+             0
+             );
+  if (EFI_ERROR (Status)) {
+    Print (L".");
+  }
+}
+
+/**
+  The function is called when no boot option could be launched,
+  including platform recovery options and options pointing to applications
+  built into firmware volumes.
+
+  If this function returns, BDS attempts to enter an infinite loop.
+**/
+VOID
+EFIAPI
+PlatformBootManagerUnableToBoot (
+  VOID
+  )
+{
+  EFI_STATUS                   Status;
+  EFI_INPUT_KEY                Key;
+  EFI_BOOT_MANAGER_LOAD_OPTION BootManagerMenu;
+  UINTN                        Index;
+
+  //
+  // BootManagerMenu doesn't contain the correct information when return status
+  // is EFI_NOT_FOUND.
+  //
+  Status = EfiBootManagerGetBootManagerMenu (&BootManagerMenu);
+  if (EFI_ERROR (Status)) {
+    return;
+  }
+  //
+  // Normally BdsDxe does not print anything to the system console, but this is
+  // a last resort -- the end-user will likely not see any DEBUG messages
+  // logged in this situation.
+  //
+  // AsciiPrint() will NULL-check gST->ConOut internally. We check gST->ConIn
+  // here to see if it makes sense to request and wait for a keypress.
+  //
+  if (gST->ConIn != NULL) {
+    AsciiPrint (
+      "%a: No bootable option or device was found.\n"
+      "%a: Press any key to enter the Boot Manager Menu.\n",
+      gEfiCallerBaseName,
+      gEfiCallerBaseName
+      );
+    Status = gBS->WaitForEvent (1, &gST->ConIn->WaitForKey, &Index);
+    ASSERT_EFI_ERROR (Status);
+    ASSERT (Index == 0);
+
+    //
+    // Drain any queued keys.
+    //
+    while (!EFI_ERROR (gST->ConIn->ReadKeyStroke (gST->ConIn, &Key))) {
+      //
+      // just throw away Key
+      //
+    }
+  }
+
+  for (;;) {
+    EfiBootManagerBoot (&BootManagerMenu);
+  }
+}

MSM8916Pkg/Library/PlatformBootManagerLib/PlatformBm.h

@@ -0,0 +1,60 @@
+/** @file
+  Head file for BDS Platform specific code
+
+  Copyright (C) 2015-2016, Red Hat, Inc.
+  Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.
+  Copyright (c) 2016, Linaro Ltd. All rights reserved.
+  Copyright (c), 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution. The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PLATFORM_BM_H_
+#define _PLATFORM_BM_H_
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+
+/**
+  Use SystemTable Conout to stop video based Simple Text Out consoles from
+  going to the video device. Put up LogoFile on every video device that is a
+  console.
+
+  @param[in]  LogoFile   File name of logo to display on the center of the
+                         screen.
+
+  @retval EFI_SUCCESS     ConsoleControl has been flipped to graphics and logo
+                          displayed.
+  @retval EFI_UNSUPPORTED Logo not found
+**/
+EFI_STATUS
+EnableQuietBoot (
+  IN  EFI_GUID  *LogoFile
+  );
+
+/**
+  Use SystemTable Conout to turn on video based Simple Text Out consoles. The
+  Simple Text Out screens will now be synced up with all non video output
+  devices
+
+  @retval EFI_SUCCESS     UGA devices are back in text mode and synced up.
+**/
+EFI_STATUS
+DisableQuietBoot (
+  VOID
+  );
+
+#endif // _PLATFORM_BM_H_

MSM8916Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf

@@ -0,0 +1,92 @@
+## @file
+#  Implementation for PlatformBootManagerLib library class interfaces.
+#
+#  Copyright (C) 2015-2016, Red Hat, Inc.
+#  Copyright (c) 2014, ARM Ltd. All rights reserved.
+#  Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+#  Copyright (c) 2016, Linaro Ltd. All rights reserved.
+#  Copyright (c), 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+#  IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PlatformBootManagerLib
+  FILE_GUID                      = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PlatformBootManagerLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = ARM AARCH64
+#
+
+[Sources]
+  PlatformBm.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  ShellPkg/ShellPkg.dec
+  MSM8916Pkg/MSM8916Pkg.dec
+
+[BuildOptions.AARCH64]
+  GCC:*_*_*_CC_FLAGS = -Wno-unused-variable
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  BootLogoLib
+  CapsuleLib
+  DebugLib
+  DevicePathLib
+  DxeServicesLib
+  HobLib
+  MemoryAllocationLib
+  PcdLib
+  PrintLib
+  UefiBootManagerLib
+  UefiBootServicesTableLib
+  UefiLib
+
+[FeaturePcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
+
+[FixedPcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+  gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
+
+[Guids]
+  gEfiFileInfoGuid
+  gEfiFileSystemInfoGuid
+  gEfiFileSystemVolumeLabelInfoIdGuid
+  gEfiEndOfDxeEventGroupGuid
+  gEfiTtyTermGuid
+  gUefiShellFileGuid
+
+[Protocols]
+  gEfiDevicePathProtocolGuid
+  gEfiGraphicsOutputProtocolGuid
+  gEfiLoadedImageProtocolGuid
+  gEfiSimpleFileSystemProtocolGuid
+  gEsrtManagementProtocolGuid
+  gEfiUsb2HcProtocolGuid
+  gEFIDroidKeypadDeviceProtocolGuid
+

MSM8916Pkg/Library/PlatformPeiLib/PlatformPeiLib.c

@@ -0,0 +1,32 @@
+/** @file
+ *
+ *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+ *  Copyright (c) 2014, Linaro Limited. All rights reserved.
+ *
+ *  This program and the accompanying materials
+ *  are licensed and made available under the terms and conditions of the BSD
+ *License which accompanies this distribution.  The full text of the license may
+ *be found at http://opensource.org/licenses/bsd-license.php
+ *
+ *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+ *IMPLIED.
+ *
+ **/
+
+#include <PiPei.h>
+
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+
+EFI_STATUS
+EFIAPI
+PlatformPeim(VOID)
+{
+
+  BuildFvHob(PcdGet64(PcdFvBaseAddress), PcdGet32(PcdFvSize));
+
+  return EFI_SUCCESS;
+}

MSM8916Pkg/Library/PlatformPeiLib/PlatformPeiLib.inf

@@ -0,0 +1,45 @@
+#/** @file
+#
+#  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2014, Linaro Limited. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PlatformPeiLib
+  FILE_GUID                      = 59C11815-F8DA-4F49-B4FB-EC1E41ED1F06
+  MODULE_TYPE                    = SEC
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PlatformPeiLib
+
+[Sources]
+  PlatformPeiLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MSM8916Pkg/MSM8916Pkg.dec
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  HobLib
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFvSize
+
+[Pcd]
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+
+[Depex]
+  gEfiPeiMemoryDiscoveredPpiGuid

MSM8916Pkg/Library/QcomPlatformClockInitLib/QcomPlatformClockInitLib.inf

@@ -0,0 +1,24 @@
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = QcomPlatformClockInitLib
+  FILE_GUID                      = 6B439EE9-31E2-4486-A95F-0AF5FAA31599
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = QcomPlatformClockInitLib
+
+[Sources]
+  msm8916-clock.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPkg/ArmPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MSM8916Pkg/MSM8916Pkg.dec
+
+[LibraryClasses]
+  IoLib
+  ArmLib
+
+[BuildOptions.AARCH64]
+  GCC:*_*_*_CC_FLAGS = -Wno-pointer-to-int-cast -Wno-overflow -Wno-int-conversion
+

MSM8916Pkg/Library/QcomPlatformClockInitLib/msm8916-clock.c

@@ -0,0 +1,612 @@
+/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <Library/LKEnvLib.h>
+#include <Chipset/clock.h>
+#include <Chipset/clock_pll.h>
+#include <Chipset/clock_lib2.h>
+#include <Platform/clock.h>
+#include <Platform/iomap.h>
+
+
+/* Mux source select values */
+#define cxo_source_val    0
+#define gpll0_source_val  1
+#define cxo_mm_source_val 0
+#define gpll0_mm_source_val 5
+#define gpll1_mm_source_val 1
+struct clk_freq_tbl rcg_dummy_freq = F_END;
+
+
+/* Clock Operations */
+static struct clk_ops clk_ops_branch =
+{
+	.enable     = clock_lib2_branch_clk_enable,
+	.disable    = clock_lib2_branch_clk_disable,
+	.set_rate   = clock_lib2_branch_set_rate,
+};
+
+static struct clk_ops clk_ops_rcg_mnd =
+{
+	.enable     = clock_lib2_rcg_enable,
+	.set_rate   = clock_lib2_rcg_set_rate,
+};
+
+static struct clk_ops clk_ops_rcg =
+{
+	.enable     = clock_lib2_rcg_enable,
+	.set_rate   = clock_lib2_rcg_set_rate,
+};
+
+static struct clk_ops clk_ops_cxo =
+{
+	.enable     = cxo_clk_enable,
+	.disable    = cxo_clk_disable,
+};
+
+static struct clk_ops clk_ops_pll_vote =
+{
+	.enable     = pll_vote_clk_enable,
+	.disable    = pll_vote_clk_disable,
+	.auto_off   = pll_vote_clk_disable,
+	.is_enabled = pll_vote_clk_is_enabled,
+};
+
+static struct clk_ops clk_ops_vote =
+{
+	.enable     = clock_lib2_vote_clk_enable,
+	.disable    = clock_lib2_vote_clk_disable,
+};
+
+/* Clock Sources */
+static struct fixed_clk cxo_clk_src =
+{
+	.c = {
+		.rate     = 19200000,
+		.dbg_name = "cxo_clk_src",
+		.ops      = &clk_ops_cxo,
+	},
+};
+
+static struct pll_vote_clk gpll0_clk_src =
+{
+	.en_reg       = (void *) APCS_GPLL_ENA_VOTE,
+	.en_mask      = BIT(0),
+	.status_reg   = (void *) GPLL0_STATUS,
+	.status_mask  = BIT(17),
+	.parent       = &cxo_clk_src.c,
+
+	.c = {
+		.rate     = 800000000,
+		.dbg_name = "gpll0_clk_src",
+		.ops      = &clk_ops_pll_vote,
+	},
+};
+
+/* SDCC Clocks */
+static struct clk_freq_tbl ftbl_gcc_sdcc1_2_apps_clk[] =
+{
+	F(   144000,    cxo,  16,   3,  25),
+	F(   400000,    cxo,  12,   1,   4),
+	F( 20000000,  gpll0,  10,   1,   4),
+	F( 25000000,  gpll0,  16,   1,   2),
+	F( 50000000,  gpll0,  16,   0,   0),
+	F(100000000,  gpll0,   8,   0,   0),
+	F(177770000,  gpll0, 4.5,   0,   0),
+	F(200000000,  gpll0,   4,   0,   0),
+	F_END
+};
+
+static struct rcg_clk sdcc1_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) SDCC1_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) SDCC1_CFG_RCGR,
+	.m_reg        = (uint32_t *) SDCC1_M,
+	.n_reg        = (uint32_t *) SDCC1_N,
+	.d_reg        = (uint32_t *) SDCC1_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_sdcc1_2_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "sdc1_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+/* BLSP1_QUP2 Clocks */
+static struct clk_freq_tbl ftbl_gcc_blsp1_qup2_i2c_apps_clk_src[] =
+{
+	F(      96000,    cxo,  10,   1,  2),
+	F(    4800000,    cxo,   4,   0,  0),
+	F(    9600000,    cxo,   2,   0,  0),
+	F(   16000000,  gpll0,  10,   1,  5),
+	F(   19200000,  gpll0,   1,   0,  0),
+	F(   25000000,  gpll0,  16,   1,  2),
+	F(   50000000,  gpll0,  16,   0,  0),
+	F_END
+};
+
+static struct branch_clk gcc_sdcc1_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC1_APPS_CBCR,
+	.parent       = &sdcc1_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_sdcc1_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk gcc_sdcc1_ahb_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC1_AHB_CBCR,
+	.has_sibling  = 1,
+
+	.c = {
+		.dbg_name = "gcc_sdcc1_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct rcg_clk sdcc2_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) SDCC2_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) SDCC2_CFG_RCGR,
+	.m_reg        = (uint32_t *) SDCC2_M,
+	.n_reg        = (uint32_t *) SDCC2_N,
+	.d_reg        = (uint32_t *) SDCC2_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_sdcc1_2_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "sdc2_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC2_APPS_CBCR,
+	.parent       = &sdcc2_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_sdcc2_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk =
+{
+	.cbcr_reg     = (uint32_t *) SDCC2_AHB_CBCR,
+	.has_sibling  = 1,
+
+	.c = {
+		.dbg_name = "gcc_sdcc2_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+/* UART Clocks */
+static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_6_apps_clk[] =
+{
+	F( 3686400,  gpll0,    1,  72,  15625),
+	F( 7372800,  gpll0,    1, 144,  15625),
+	F(14745600,  gpll0,    1, 288,  15625),
+	F(16000000,  gpll0,   10,   1,      5),
+	F(19200000,    cxo,    1,   0,      0),
+	F(24000000,  gpll0,    1,   3,    100),
+	F(25000000,  gpll0,   16,   1,      2),
+	F(32000000,  gpll0,    1,   1,     25),
+	F(40000000,  gpll0,    1,   1,     20),
+	F(46400000,  gpll0,    1,  29,    500),
+	F(48000000,  gpll0,    1,   3,     50),
+	F(51200000,  gpll0,    1,   8,    125),
+	F(56000000,  gpll0,    1,   7,    100),
+	F(58982400,  gpll0,    1,1152,  15625),
+	F(60000000,  gpll0,    1,   3,     40),
+	F_END
+};
+
+static struct rcg_clk blsp1_uart1_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) BLSP1_UART1_APPS_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) BLSP1_UART1_APPS_CFG_RCGR,
+	.m_reg        = (uint32_t *) BLSP1_UART1_APPS_M,
+	.n_reg        = (uint32_t *) BLSP1_UART1_APPS_N,
+	.d_reg        = (uint32_t *) BLSP1_UART1_APPS_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "blsp1_uart1_apps_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+static struct branch_clk gcc_blsp1_uart1_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) BLSP1_UART1_APPS_CBCR,
+	.parent       = &blsp1_uart1_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_blsp1_uart1_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct rcg_clk blsp1_uart2_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) BLSP1_UART2_APPS_CFG_RCGR,
+	.m_reg        = (uint32_t *) BLSP1_UART2_APPS_M,
+	.n_reg        = (uint32_t *) BLSP1_UART2_APPS_N,
+	.d_reg        = (uint32_t *) BLSP1_UART2_APPS_D,
+
+	.set_rate     = clock_lib2_rcg_set_rate_mnd,
+	.freq_tbl     = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "blsp1_uart2_apps_clk",
+		.ops      = &clk_ops_rcg_mnd,
+	},
+};
+
+static struct branch_clk gcc_blsp1_uart2_apps_clk =
+{
+	.cbcr_reg     = (uint32_t *) BLSP1_UART2_APPS_CBCR,
+	.parent       = &blsp1_uart2_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_blsp1_uart2_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct vote_clk gcc_blsp1_ahb_clk = {
+	.cbcr_reg     = (uint32_t *) BLSP1_AHB_CBCR,
+	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask      = BIT(10),
+
+	.c = {
+		.dbg_name = "gcc_blsp1_ahb_clk",
+		.ops      = &clk_ops_vote,
+	},
+};
+
+/* USB Clocks */
+static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] =
+{
+	F(80000000,  gpll0,   10,   0,   0),
+	F_END
+};
+
+static struct rcg_clk usb_hs_system_clk_src =
+{
+	.cmd_reg      = (uint32_t *) USB_HS_SYSTEM_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) USB_HS_SYSTEM_CFG_RCGR,
+
+	.set_rate     = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl     = ftbl_gcc_usb_hs_system_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "usb_hs_system_clk",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct branch_clk gcc_usb_hs_system_clk =
+{
+	.cbcr_reg     = (uint32_t *) USB_HS_SYSTEM_CBCR,
+	.parent       = &usb_hs_system_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_usb_hs_system_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk gcc_usb_hs_ahb_clk =
+{
+	.cbcr_reg     = (uint32_t *) USB_HS_AHB_CBCR,
+	.has_sibling  = 1,
+
+	.c = {
+		.dbg_name = "gcc_usb_hs_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+/* Display clocks */
+static struct clk_freq_tbl ftbl_mdss_esc0_1_clk[] = {
+	F_MM(19200000,    cxo,   1,   0,   0),
+	F_END
+};
+
+static struct clk_freq_tbl ftbl_mdss_esc1_1_clk[] = {
+	F_MM(19200000,    cxo,   1,   0,   0),
+	F_END
+};
+
+static struct clk_freq_tbl ftbl_mdp_clk[] = {
+	F( 80000000,  gpll0,   10,    0,    0),
+	F( 100000000, gpll0,    8,    0,    0),
+	F( 200000000, gpll0,    4,    0,    0),
+	F( 320000000, gpll0,  2.5,    0,    0),
+	F_END
+};
+
+static struct rcg_clk dsi_esc0_clk_src = {
+	.cmd_reg  = (uint32_t *) DSI_ESC0_CMD_RCGR,
+	.cfg_reg  = (uint32_t *) DSI_ESC0_CFG_RCGR,
+	.set_rate = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl = ftbl_mdss_esc0_1_clk,
+
+	.c        = {
+		.dbg_name = "dsi_esc0_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct rcg_clk dsi_esc1_clk_src = {
+	.cmd_reg  = (uint32_t *) DSI_ESC1_CMD_RCGR,
+	.cfg_reg  = (uint32_t *) DSI_ESC1_CFG_RCGR,
+	.set_rate = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl = ftbl_mdss_esc1_1_clk,
+
+	.c        = {
+		.dbg_name = "dsi_esc1_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct clk_freq_tbl ftbl_mdss_vsync_clk[] = {
+	F_MM(19200000,    cxo,   1,   0,   0),
+	F_END
+};
+
+static struct rcg_clk vsync_clk_src = {
+	.cmd_reg  = (uint32_t *) VSYNC_CMD_RCGR,
+	.cfg_reg  = (uint32_t *) VSYNC_CFG_RCGR,
+	.set_rate = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl = ftbl_mdss_vsync_clk,
+
+	.c        = {
+		.dbg_name = "vsync_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct branch_clk mdss_esc0_clk = {
+	.cbcr_reg    = (uint32_t *) DSI_ESC0_CBCR,
+	.parent      = &dsi_esc0_clk_src.c,
+	.has_sibling = 0,
+
+	.c           = {
+		.dbg_name = "mdss_esc0_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk mdss_esc1_clk = {
+	.cbcr_reg    = (uint32_t *) DSI_ESC1_CBCR,
+	.parent      = &dsi_esc1_clk_src.c,
+	.has_sibling = 0,
+
+	.c           = {
+		.dbg_name = "mdss_esc1_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk mdss_axi_clk = {
+	.cbcr_reg    = (uint32_t *) MDP_AXI_CBCR,
+	.has_sibling = 1,
+
+	.c           = {
+		.dbg_name = "mdss_axi_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk mdp_ahb_clk = {
+	.cbcr_reg    = (uint32_t *) MDP_AHB_CBCR,
+	.has_sibling = 1,
+
+	.c           = {
+		.dbg_name = "mdp_ahb_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct rcg_clk mdss_mdp_clk_src = {
+	.cmd_reg      = (uint32_t *) MDP_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) MDP_CFG_RCGR,
+	.set_rate     = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl     = ftbl_mdp_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c            = {
+		.dbg_name = "mdss_mdp_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct branch_clk mdss_mdp_clk = {
+	.cbcr_reg    = (uint32_t *) MDP_CBCR,
+	.parent      = &mdss_mdp_clk_src.c,
+	.has_sibling = 0,
+
+	.c           = {
+		.dbg_name = "mdss_mdp_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct branch_clk mdss_vsync_clk = {
+	.cbcr_reg    = MDSS_VSYNC_CBCR,
+	.parent      = &vsync_clk_src.c,
+	.has_sibling = 0,
+
+	.c           = {
+		.dbg_name = "mdss_vsync_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+
+static struct clk_freq_tbl ftbl_gcc_ce1_clk[] = {
+	F(160000000,  gpll0,   5,   0,   0),
+	F_END
+};
+
+static struct rcg_clk ce1_clk_src = {
+	.cmd_reg      = (uint32_t *) GCC_CRYPTO_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) GCC_CRYPTO_CFG_RCGR,
+	.set_rate     = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl     = ftbl_gcc_ce1_clk,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "ce1_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct vote_clk gcc_ce1_clk = {
+	.cbcr_reg      = (uint32_t *) GCC_CRYPTO_CBCR,
+	.vote_reg      = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask       = BIT(2),
+
+	.c = {
+		.dbg_name  = "gcc_ce1_clk",
+		.ops       = &clk_ops_vote,
+	},
+};
+
+static struct vote_clk gcc_ce1_ahb_clk = {
+	.cbcr_reg     = (uint32_t *) GCC_CRYPTO_AHB_CBCR,
+	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask      = BIT(0),
+
+	.c = {
+		.dbg_name = "gcc_ce1_ahb_clk",
+		.ops      = &clk_ops_vote,
+	},
+};
+
+static struct vote_clk gcc_ce1_axi_clk = {
+	.cbcr_reg     = (uint32_t *) GCC_CRYPTO_AXI_CBCR,
+	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
+	.en_mask      = BIT(1),
+
+	.c = {
+		.dbg_name = "gcc_ce1_axi_clk",
+		.ops      = &clk_ops_vote,
+	},
+};
+
+
+static struct rcg_clk gcc_blsp1_qup2_i2c_apps_clk_src =
+{
+	.cmd_reg      = (uint32_t *) GCC_BLSP1_QUP2_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) GCC_BLSP1_QUP2_CFG_RCGR,
+	.set_rate     = clock_lib2_rcg_set_rate_hid,
+	.freq_tbl     = ftbl_gcc_blsp1_qup2_i2c_apps_clk_src,
+	.current_freq = &rcg_dummy_freq,
+
+	.c = {
+		.dbg_name = "gcc_blsp1_qup2_i2c_apps_clk_src",
+		.ops      = &clk_ops_rcg,
+	},
+};
+
+static struct branch_clk gcc_blsp1_qup2_i2c_apps_clk = {
+	.cbcr_reg = GCC_BLSP1_QUP2_APPS_CBCR,
+	.parent   = &gcc_blsp1_qup2_i2c_apps_clk_src.c,
+
+	.c = {
+		.dbg_name = "gcc_blsp1_qup2_i2c_apps_clk",
+		.ops      = &clk_ops_branch,
+	},
+};
+/* Clock lookup table */
+static struct clk_lookup msm_clocks_8916[] =
+{
+	CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
+	CLK_LOOKUP("sdc1_core_clk",  gcc_sdcc1_apps_clk.c),
+
+	CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
+	CLK_LOOKUP("sdc2_core_clk",  gcc_sdcc2_apps_clk.c),
+
+	CLK_LOOKUP("uart1_iface_clk", gcc_blsp1_ahb_clk.c),
+	CLK_LOOKUP("uart1_core_clk",  gcc_blsp1_uart1_apps_clk.c),
+
+	CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
+	CLK_LOOKUP("uart2_core_clk",  gcc_blsp1_uart2_apps_clk.c),
+
+	CLK_LOOKUP("usb_iface_clk",  gcc_usb_hs_ahb_clk.c),
+	CLK_LOOKUP("usb_core_clk",   gcc_usb_hs_system_clk.c),
+
+	CLK_LOOKUP("mdp_ahb_clk",          mdp_ahb_clk.c),
+	CLK_LOOKUP("mdss_esc0_clk",        mdss_esc0_clk.c),
+	CLK_LOOKUP("mdss_esc1_clk",        mdss_esc1_clk.c),
+	CLK_LOOKUP("mdss_axi_clk",         mdss_axi_clk.c),
+	CLK_LOOKUP("mdss_vsync_clk",       mdss_vsync_clk.c),
+	CLK_LOOKUP("mdss_mdp_clk_src",     mdss_mdp_clk_src.c),
+	CLK_LOOKUP("mdss_mdp_clk",         mdss_mdp_clk.c),
+
+	CLK_LOOKUP("ce1_ahb_clk",  gcc_ce1_ahb_clk.c),
+	CLK_LOOKUP("ce1_axi_clk",  gcc_ce1_axi_clk.c),
+	CLK_LOOKUP("ce1_core_clk", gcc_ce1_clk.c),
+	CLK_LOOKUP("ce1_src_clk",  ce1_clk_src.c),
+
+	CLK_LOOKUP("blsp1_qup2_ahb_iface_clk", gcc_blsp1_ahb_clk.c),
+	CLK_LOOKUP("gcc_blsp1_qup2_i2c_apps_clk_src", gcc_blsp1_qup2_i2c_apps_clk_src.c),
+	CLK_LOOKUP("gcc_blsp1_qup2_i2c_apps_clk", gcc_blsp1_qup2_i2c_apps_clk.c),
+};
+
+RETURN_STATUS
+EFIAPI
+LibQcomPlatformClockInit (
+  struct clk_lookup **clist,
+  unsigned *num
+  )
+{
+
+	*clist = msm_clocks_8916;
+	*num = ARRAY_SIZE(msm_clocks_8916);
+
+	return RETURN_SUCCESS;
+}

MSM8916Pkg/MSM8916Pkg.dec

@@ -12,7 +12,7 @@
 
 [Defines]
   DEC_SPECIFICATION              = 0x0001001a
-  PACKAGE_NAME                   = Pixel3XL
+  PACKAGE_NAME                   = MSM8916Pkg
   PACKAGE_GUID                   = 7eb1de03-3910-4d1d-84ce-c17b53636b9a
   PACKAGE_VERSION                = 0.1
 
@@ -29,11 +29,19 @@
   Include                        # Root include for the package
 
 [Guids.common]
-  gPixel3XLTokenSpaceGuid        = { 0x99a14446, 0xaad7, 0xe460, {0xb4, 0xe5, 0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } }
+  gMSM8916PkgTokenSpaceGuid        = { 0x99a14446, 0xaad7, 0xe460, {0xb4, 0xe5, 0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } }
+
+[Protocols]
+  gEFIDroidKeypadDeviceProtocolGuid = { 0xb27625b5, 0x0b6c, 0x4614, { 0xaa, 0x3c, 0x33, 0x13, 0xb5, 0x1d, 0x36, 0x46 } }
+  gQcomClockProtocolGuid = { 0x4fcc91c2, 0x9c4f, 0x4e3c, { 0xa6, 0x73, 0xc6, 0xdf, 0x62, 0xe0, 0x41, 0xd5 } }
+  gQcomBamProtocolGuid = { 0xacdd545a, 0xf1f6, 0x4272, { 0x81, 0xc5, 0x04, 0x93, 0xe3, 0x58, 0x05, 0x32 } }
 
 [PcdsFixedAtBuild.common]
   # Simple FrameBuffer
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress|0x00400000|UINT32|0x0000a400
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE|BOOLEAN|1
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferWidth|1080|UINT32|0x0000a401
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferAddress|0x0ec000000|UINT32|0x0000a400 # 0x7C400000
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferHeight|1920|UINT32|0x0000a402
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|720|UINT32|0x0000a401
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x0000a403
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|1520|UINT32|0x0000a402
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x0000a403
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth|1080|UINT32|0x0000a404
+  gMSM8916PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight|1920|UINT32|0x0000a405 

MSM8916Pkg/MSM8916Pkg.dsc

@@ -16,7 +16,7 @@
 #
 ################################################################################
 [Defines]
-  PLATFORM_NAME                  = Pixel3XL
+  PLATFORM_NAME                  = MSM8916Pkg
   PLATFORM_GUID                  = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee
   PLATFORM_VERSION               = 0.1
   DSC_SPECIFICATION              = 0x00010019
@@ -24,13 +24,23 @@
   SUPPORTED_ARCHITECTURES        = AARCH64
   BUILD_TARGETS                  = DEBUG|RELEASE
   SKUID_IDENTIFIER               = DEFAULT
-  FLASH_DEFINITION               = Pixel3XL/Pixel3XL.fdf
+  FLASH_DEFINITION               = MSM8916Pkg/MSM8916Pkg.fdf
 
-!include Pixel3XL/CommonDsc.dsc.inc
+!include MSM8916Pkg/CommonDsc.dsc.inc
+
+[LibraryClasses]
+  RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
+  VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
+  VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+  VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf
 
 [LibraryClasses.common]
+  OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
-  ArmPlatformLib|Pixel3XL/Library/Pixel3XLLib/Pixel3XLLib.inf
+  ArmPlatformLib|MSM8916Pkg/Library/MSM8916PkgLib/MSM8916PkgLib.inf
+  CompilerIntrinsicsLib|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
@@ -43,7 +53,7 @@
   DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
 
-  SerialPortLib|Pixel3XL/Library/InMemorySerialPortLib/InMemorySerialPortLib.inf
+  SerialPortLib|MSM8916Pkg/Library/InMemorySerialPortLib/InMemorySerialPortLib.inf
   RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
   TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
 
@@ -52,10 +62,10 @@
 
   # Network Libraries
   UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
-  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+  NetLib|NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
-  DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+  DpcLib|NetworkPkg/Library/DxeDpcLib/DxeDpcLib.inf
-  IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+  IpIoLib|NetworkPkg/Library/DxeIpIoLib/DxeIpIoLib.inf
-  UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+  UdpIoLib|NetworkPkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
 
   # VariableRuntimeDxe Requirements
   SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -64,17 +74,24 @@
   VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
 
   # SimpleFbDxe
-  FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
+  FrameBufferBltLib|MSM8916Pkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
+
+  SerialPortLib|MSM8916Pkg/Library/FrameBufferSerialPortLib/FrameBufferSerialPortLib.inf
+  PlatformBootManagerLib|MSM8916Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  MemoryInitPeiLib|MSM8916Pkg/Library/MemoryInitPeiLib/PeiMemoryAllocationLib.inf
+  PlatformPeiLib|MSM8916Pkg/Library/PlatformPeiLib/PlatformPeiLib.inf
+
+  # SoC Drivers
+  # QcomPlatformClockInitLib|MSM8916Pkg/Library/QcomPlatformClockInitLib/QcomPlatformClockInitLib.inf
 
 [LibraryClasses.common.SEC]
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
   ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
   HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
   MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
-  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
-  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
   PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
 
+
 ################################################################################
 #
 # Pcd Section - list of all EDK II PCD Entries defined by this Platform
@@ -87,29 +104,20 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
 
-
 [PcdsFixedAtBuild.common]
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Alpha"
 
-  # System Memory (4GB)
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0xe0000000
-
   # We only boot one processor here!
   gArmPlatformTokenSpaceGuid.PcdCoreCount|1
   gArmPlatformTokenSpaceGuid.PcdClusterCount|1
 
-  #
-  # ARM PrimeCell
-  #
-
   #
   # ARM General Interrupt Controller
   #
-  gArmTokenSpaceGuid.PcdGicDistributorBase|0x17a00000
+  gArmTokenSpaceGuid.PcdGicDistributorBase|0x123001000
-  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x17a60000
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x123001000
 
   gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x12
   gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x13
@@ -117,6 +125,8 @@
   # GUID of the UI app
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
 
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5
+
   gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
 
   gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
@@ -133,10 +143,6 @@
   #
   gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
 
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress|0x9d400000
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferWidth|1440
-  gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferHeight|2960
-
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
 
 ################################################################################
@@ -187,16 +193,22 @@
   MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 
   #
-  # GPIO
+  # SoC Drivers
   #
 
+  # MSM8916Pkg/Drivers/ClockDxe/ClockDxe.inf
+  # MSM8916Pkg/Drivers/BamDxe/BamDxe.inf
+
   #
   # Virtual Keyboard
   #
   EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
 
-  Pixel3XL/Pixel3XLDxe/Pixel3XLDxe.inf
+  #
-  Pixel3XL/SimpleFbDxe/SimpleFbDxe.inf
+  # Platform Dxes
+  #
+  MSM8916Pkg/Drivers/MSM8916PkgDxe/MSM8916PkgDxe.inf
+  MSM8916Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
 
   #
   # USB Host Support
@@ -233,24 +245,26 @@
   MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
   MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
   MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
-  Pixel3XL/AcpiTables/AcpiTables.inf
+  MSM8916Pkg/AcpiTables/AcpiTables.inf
 
   #
   # SMBIOS Support
   #
-  Pixel3XL/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+  MSM8916Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 
   #
   # Bds
   #
+  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
   MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
   MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf {
     <LibraryClasses>
       PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
   }
-  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   MdeModulePkg/Application/UiApp/UiApp.inf {
     <LibraryClasses>
@@ -259,3 +273,25 @@
       NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
       PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
   }
+  ShellPkg/Application/Shell/Shell.inf {
+    <LibraryClasses>
+      ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+      NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
+      HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+      PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+      BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
+      gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+      gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
+  }
+!ifdef $(INCLUDE_TFTP_COMMAND)
+  ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
+!endif #$(INCLUDE_TFTP_COMMAND)

MSM8916Pkg/MSM8916Pkg.fdf

@@ -24,14 +24,14 @@
 #
 ################################################################################
 
-[FD.PIXEL3XL_UEFI]
+[FD.MSM8916PKG_UEFI]
-BaseAddress   = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
+BaseAddress   = 0x80080000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
-Size          = 0x01000000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
+Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
 ErasePolarity = 1
 
 # This one is tricky, it must be: BlockSize * NumBlocks = Size
 BlockSize     = 0x00001000
-NumBlocks     = 0x1000
+NumBlocks     = 0x200
 
 ################################################################################
 #
@@ -68,7 +68,7 @@ DATA = {
   0x00, 0x00, 0x00, 0x00                          # res5
 }
 
-0x00008000|0xff8000
+0x00008000|0x001f8000
 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
 FV = FVMAIN_COMPACT
 
@@ -147,8 +147,11 @@ READ_LOCK_STATUS   = TRUE
   #
   INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
 
-  INF Pixel3XL/Pixel3XLDxe/Pixel3XLDxe.inf
+  #
-  INF Pixel3XL/SimpleFbDxe/SimpleFbDxe.inf
+  # Platform Dxes
+  #
+  INF MSM8916Pkg/Drivers/MSM8916PkgDxe/MSM8916PkgDxe.inf
+  INF MSM8916Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
 
 
   #
@@ -189,32 +192,33 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
   INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
   INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
-  INF RuleOverride = ACPITABLE Pixel3XL/AcpiTables/AcpiTables.inf
+  INF RuleOverride = ACPITABLE MSM8916Pkg/AcpiTables/AcpiTables.inf
 
   #
   # SMBIOS Support
   #
-  INF Pixel3XL/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+  INF MSM8916Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
   INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 
   #
   # UEFI applications
   #
+  INF ShellPkg/Application/Shell/Shell.inf
+!ifdef $(INCLUDE_TFTP_COMMAND)
+  INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
+!endif #$(INCLUDE_TFTP_COMMAND)
 
   #
   # Bds
   #
+  INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
   INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+  INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   INF MdeModulePkg/Application/UiApp/UiApp.inf
 
-  # Linux (pretends to be uefi shell)
-  FILE APPLICATION = 7C04A583-9E3E-4f1c-AD65-E05268D0B4D1 {
-    SECTION PE32 = Pixel3XL/linux.efi
-  }
-
 [FV.FVMAIN_COMPACT]
 FvAlignment        = 8
 ERASE_POLARITY     = 1
@@ -241,4 +245,4 @@ READ_LOCK_STATUS   = TRUE
     }
   }
 
-!include Pixel3XL/CommonFdf.fdf.inc
+!include MSM8916Pkg/CommonFdf.fdf.inc

README.md

@@ -1,12 +1,7 @@
-Attempt to create a minimal EDK2 for Pixel 3 XL.
+Attempt to create a minimal EDK2 for MSM8916 devices
-
-[![Build Status](https://dev.azure.com/zhuoweizhang/edk2-pixel3/_apis/build/status/Pixel3Dev.edk2-pixel3?branchName=master)](https://dev.azure.com/zhuoweizhang/edk2-pixel3/_build/latest?definitionId=1&branchName=master)
 
 ## Status
-
+Boots to efi shell.
-Can partially boot the Fedora 29 aarch64 kernel: the kernel gets graphical output then panics when calling EFI runtime services.
-
-Since there's no internal storage support yet, Use the addlinux branch to embed a Linux kernel in the UEFI firmware.
 
 ## Building
 Tested on Ubuntu 18.04.
@@ -31,10 +26,16 @@ sudo apt install build-essential uuid-dev iasl git nasm python3-distutils gcc-aa
 
 Also see [EDK2 website](https://github.com/tianocore/tianocore.github.io/wiki/Using-EDK-II-with-Native-GCC#Install_required_software_from_apt)
 
+Then ./firstrun.sh
+
 Finally, ./build.sh.
 
-Then fastboot boot uefi.img.
+Then fastboot boot uefi.img from lk2nd.
 
 # Credits
 
 SimpleFbDxe screen driver is from imbushuo's [Lumia950XLPkg](https://github.com/WOA-Project/Lumia950XLPkg).
+
+Zhuowei for making edk2-pixel3
+
+all my friends for supporting me (yes also mis012 :)

build.sh

@@ -3,6 +3,6 @@
 set -e
 . build_common.sh
 # not actually GCC5; it's GCC7 on Ubuntu 18.04.
-GCC5_AARCH64_PREFIX=aarch64-linux-gnu- build -s -n 0 -a AARCH64 -t GCC5 -p Pixel3XL/Pixel3XL.dsc
+GCC5_AARCH64_PREFIX=aarch64-linux-gnu- build -s -n 0 -a AARCH64 -t GCC5 -p MSM8916Pkg/Devices/j5lte.dsc
-gzip -c < workspace/Build/Pixel3XL/DEBUG_GCC5/FV/PIXEL3XL_UEFI.fd >uefi.img
+gzip -c < workspace/Build/MSM8916Pkg/DEBUG_GCC5/FV/MSM8916PKG_UEFI.fd >uefi.img
-cat crosshatch.dtb >>uefi.img
+cat device_specific/j5lte.dtb >>uefi.img

build_j5xlte.sh

@@ -0,0 +1,8 @@
+#!/bin/bash
+# based on the instructions from edk2-platform
+set -e
+. build_common.sh
+# not actually GCC5; it's GCC7 on Ubuntu 18.04.
+GCC5_AARCH64_PREFIX=aarch64-linux-gnu- build -s -n 0 -a AARCH64 -t GCC5 -p MSM8916Pkg/Devices/j5lte.dsc
+gzip -c < workspace/Build/MSM8916Pkg/DEBUG_GCC5/FV/MSM8916PKG_UEFI.fd >uefi.img
+cat device_specific/j5xlte.dtb >>uefi.img

device_specific/reference.dts

@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/dts-v1/;
+
+/ {
+	// This is used by the bootloader to find the correct DTB
+	qcom,msm-id = <206 0>; // qcom,msm-id = <247 0>; for APQ8016
+	qcom,board-id = <0xCE08FF01 4>; /* FIXME: Check your downstream device tree */
+
+	model = "Samsung Galaxy J5 2016"; // FIXME
+	compatible = "samsung,j510f", "qcom,msm8916"; // FIXME
+	
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	// The bootloader gets really sad if it cannot find those nodes
+	chosen { };
+
+	memory@0 {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the reg */
+		reg = <0 0 0 0>;
+	};
+};