diff --git a/Pixel3XL/Library/InMemorySerialPortLib/InMemorySerialPortLib.c b/Pixel3XL/Library/InMemorySerialPortLib/InMemorySerialPortLib.c index 72e3ed5..54ed03b 100644 --- a/Pixel3XL/Library/InMemorySerialPortLib/InMemorySerialPortLib.c +++ b/Pixel3XL/Library/InMemorySerialPortLib/InMemorySerialPortLib.c @@ -34,19 +34,17 @@ SerialPortInitialize ( VOID ) { -#if 0 - UINT8* base = (UINT8*)0xa1a10000ull; + UINT8* base = (UINT8*)0x8d100000ull; for (UINTN i = 0; i < 0x200000; i++) { base[i] = 0; } -#endif return RETURN_SUCCESS; } static void mem_putchar(UINT8 c) { static const UINTN size = 0x200000; static UINTN offset = 0; - UINT8* base = (UINT8*)0xa1a10000ull; + UINT8* base = (UINT8*)0x8d100000ull; base[offset++] = c; if (offset >= size) { offset = 0; diff --git a/Pixel3XL/Library/Pixel3XLLib/Pixel3XLHelper.S b/Pixel3XL/Library/Pixel3XLLib/Pixel3XLHelper.S index b85223b..eb85f67 100644 --- a/Pixel3XL/Library/Pixel3XLLib/Pixel3XLHelper.S +++ b/Pixel3XL/Library/Pixel3XLLib/Pixel3XLHelper.S @@ -18,31 +18,7 @@ .align 3 ASM_FUNC(ArmPlatformPeiBootAction) -startlabel: - // check if we're located at expected location - adr x4, . - ldr x5, =ArmPlatformPeiBootAction - cmp x4, x5 - bne docopy ret -docopy: - // find our start address by getting our expected offset, then subtracting it from our actual address - ldr x6, =FixedPcdGet64 (PcdFdBaseAddress) - sub x5, x5, x6 // x5 now holds offset of ArmPlatformPeiBootAction from start of FD base - sub x4, x4, x5 // x4 now holds address of actual FD base - // tweak the return address - // note: x30 is lr; gcc5 doesn't have the alias - sub x30, x30, x4 - add x30, x30, x6 - ldr x5, =FixedPcdGet64 (PcdFdSize) - // crap memcpy -loop: - ldp x2, x3, [x4], #16 - stp x2, x3, [x6], #16 - subs x5, x5, #16 - b.ne loop - ret -.ltorg //UINTN //ArmPlatformIsPrimaryCore ( diff --git a/Pixel3XL/Library/Pixel3XLLib/Pixel3XLMem.c b/Pixel3XL/Library/Pixel3XLLib/Pixel3XLMem.c index 6d7cfa7..5b77212 100644 --- a/Pixel3XL/Library/Pixel3XLLib/Pixel3XLMem.c +++ b/Pixel3XL/Library/Pixel3XLLib/Pixel3XLMem.c @@ -27,7 +27,7 @@ #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED #define SDM845_PERIPH_BASE 0x00000000 -#define SDM845_PERIPH_SZ 0x80000000 +#define SDM845_PERIPH_SZ 0x60000000 #define HIKEY960_MEMORY_SIZE 0x0000000100000000 @@ -35,10 +35,17 @@ STATIC struct Pixel3XLReservedMemory { EFI_PHYSICAL_ADDRESS Offset; EFI_PHYSICAL_ADDRESS Size; } Pixel3XLReservedMemoryBuffer [] = { - { 0x85700000, 0x00600000 }, // hyp_region - { 0x85e00000, 0x00100000 }, // xbl_region - { 0x85fc0000, 0x02f40000 }, // removed_region - { 0x8ab00000, 0x01400000 }, // qseecom_region +/** { 0x86000000, 0x00300000 }, // tz_apps_region + { 0x86300000, 0x00100000 }, // smem_region + { 0x86400000, 0x00280000 }, // tz/hyp_region + { 0x86700000, 0x06C00000 }, // MPSS/EFS/DHMS/PIL_region +**/ +/* + { 0x85A00000, 0x00E00000 }, // tz-apps_region + { 0x86800000, 0x05400000 }, // mpss_region + { 0x8bc00000, 0x00200000 }, // gps_region + { 0x8be00000, 0x00600000 }, // wcnss_region + { 0x8c400000, 0x00600000 }, // venus_region*/ }; /** diff --git a/Pixel3XL/Pixel3XL.dec b/Pixel3XL/Pixel3XL.dec index d858f35..0ee8374 100644 --- a/Pixel3XL/Pixel3XL.dec +++ b/Pixel3XL/Pixel3XL.dec @@ -33,7 +33,7 @@ [PcdsFixedAtBuild.common] # Simple FrameBuffer - gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress|0x00400000|UINT32|0x0000a400 + gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress|0x00400000|UINT32|0x0000a400 # 0x7C400000 gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferWidth|1080|UINT32|0x0000a401 gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferHeight|1920|UINT32|0x0000a402 gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x0000a403 diff --git a/Pixel3XL/Pixel3XL.dsc b/Pixel3XL/Pixel3XL.dsc index 69ba90c..793e844 100644 --- a/Pixel3XL/Pixel3XL.dsc +++ b/Pixel3XL/Pixel3XL.dsc @@ -93,9 +93,9 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Alpha" - # System Memory (4GB) + # System Memory (1.5GB) gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 - gArmTokenSpaceGuid.PcdSystemMemorySize|0xe0000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x60000000 # We only boot one processor here! gArmPlatformTokenSpaceGuid.PcdCoreCount|1 @@ -108,8 +108,8 @@ # # ARM General Interrupt Controller # - gArmTokenSpaceGuid.PcdGicDistributorBase|0x17a00000 - gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x17a60000 + gArmTokenSpaceGuid.PcdGicDistributorBase|0x0b000000 + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0b002000 gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x12 gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x13 @@ -133,9 +133,9 @@ # gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE - gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress|0x9d400000 - gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferWidth|1440 - gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferHeight|2960 + gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferAddress|0x8e000000 + gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferWidth|720 + gPixel3XLTokenSpaceGuid.PcdMipiFrameBufferHeight|1280 gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 diff --git a/Pixel3XL/Pixel3XL.fdf b/Pixel3XL/Pixel3XL.fdf index f4734cc..42de6ed 100644 --- a/Pixel3XL/Pixel3XL.fdf +++ b/Pixel3XL/Pixel3XL.fdf @@ -25,7 +25,7 @@ ################################################################################ [FD.PIXEL3XL_UEFI] -BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +BaseAddress = 0x80080000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device ErasePolarity = 1 diff --git a/Pixel3XL/Pixel3XLDxe/Pixel3XLDxe.c b/Pixel3XL/Pixel3XLDxe/Pixel3XLDxe.c index 46cbd7a..7e1ece9 100644 --- a/Pixel3XL/Pixel3XLDxe/Pixel3XLDxe.c +++ b/Pixel3XL/Pixel3XLDxe/Pixel3XLDxe.c @@ -43,6 +43,7 @@ InitPeripherals ( IN VOID ) { + // MmioWrite32(0x004ab000, 0); /* This also crashes. Do you really hate memory attributes or something? EFI_STATUS Status; // https://lists.01.org/pipermail/edk2-devel/2017-August/013417.html diff --git a/basic.dts b/basic.dts new file mode 100644 index 0000000..81395ec --- /dev/null +++ b/basic.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; + +/ { + // This is used by the bootloader to find the correct DTB + qcom,msm-id = <206 0>; // qcom,msm-id = <247 0>; for APQ8016 + qcom,board-id = <0xCE08FF01 5>; /* FIXME: Check your downstream device tree */ + + model = "Samsung Galaxy J5 2015"; // FIXME + compatible = "samsung,j500f", "qcom,msm8916"; // FIXME + + #address-cells = <2>; + #size-cells = <2>; + + // The bootloader gets really sad if it cannot find those nodes + chosen { }; + + memory@0 { + device_type = "memory"; + /* We expect the bootloader to fill in the reg */ + reg = <0 0 0 0>; + }; +}; diff --git a/build.sh b/build.sh index 5f36221..8cc357a 100755 --- a/build.sh +++ b/build.sh @@ -5,4 +5,4 @@ set -e # not actually GCC5; it's GCC7 on Ubuntu 18.04. GCC5_AARCH64_PREFIX=aarch64-linux-gnu- build -s -n 0 -a AARCH64 -t GCC5 -p Pixel3XL/Pixel3XL.dsc gzip -c < workspace/Build/Pixel3XL/DEBUG_GCC5/FV/PIXEL3XL_UEFI.fd >uefi.img -cat crosshatch.dtb >>uefi.img +cat j5.dtb >>uefi.img diff --git a/j5.dtb b/j5.dtb new file mode 100644 index 0000000..6b42efa Binary files /dev/null and b/j5.dtb differ