From b40bb0039d9504ef4680ef21286aa6abad14d042 Mon Sep 17 00:00:00 2001 From: Zhuowei Zhang Date: Thu, 21 Feb 2019 16:42:17 -0800 Subject: [PATCH] Initial commit --- Pixel3XL/HiKey960.dec | 35 ++ Pixel3XL/HiKey960.dsc | 288 +++++++++++ Pixel3XL/HiKey960.fdf | 221 +++++++++ Pixel3XL/HiKey960Dxe/HiKey960Dxe.c | 467 ++++++++++++++++++ Pixel3XL/HiKey960Dxe/HiKey960Dxe.h | 31 ++ Pixel3XL/HiKey960Dxe/HiKey960Dxe.inf | 59 +++ Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.c | 83 ++++ Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.inf | 35 ++ Pixel3XL/Library/HiKey960Lib/HiKey960.c | 144 ++++++ Pixel3XL/Library/HiKey960Lib/HiKey960Helper.S | 52 ++ Pixel3XL/Library/HiKey960Lib/HiKey960Lib.inf | 44 ++ Pixel3XL/Library/HiKey960Lib/HiKey960Mem.c | 163 ++++++ 12 files changed, 1622 insertions(+) create mode 100644 Pixel3XL/HiKey960.dec create mode 100644 Pixel3XL/HiKey960.dsc create mode 100644 Pixel3XL/HiKey960.fdf create mode 100644 Pixel3XL/HiKey960Dxe/HiKey960Dxe.c create mode 100644 Pixel3XL/HiKey960Dxe/HiKey960Dxe.h create mode 100644 Pixel3XL/HiKey960Dxe/HiKey960Dxe.inf create mode 100644 Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.c create mode 100644 Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.inf create mode 100644 Pixel3XL/Library/HiKey960Lib/HiKey960.c create mode 100644 Pixel3XL/Library/HiKey960Lib/HiKey960Helper.S create mode 100644 Pixel3XL/Library/HiKey960Lib/HiKey960Lib.inf create mode 100644 Pixel3XL/Library/HiKey960Lib/HiKey960Mem.c diff --git a/Pixel3XL/HiKey960.dec b/Pixel3XL/HiKey960.dec new file mode 100644 index 0000000..aa5a0ca --- /dev/null +++ b/Pixel3XL/HiKey960.dec @@ -0,0 +1,35 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + DEC_SPECIFICATION = 0x0001001a + PACKAGE_NAME = HiKey960 + PACKAGE_GUID = 1892b5b5-d18d-47a3-8fab-e3ae6b4226b0 + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Guids.common] + gHiKey960TokenSpaceGuid = { 0x99a14446, 0xaad7, 0xe460, {0xb4, 0xe5, 0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } } + +[PcdsFixedAtBuild.common] + gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath|L""|VOID*|0x00000001 + gHiKey960TokenSpaceGuid.PcdAndroidBootFile|{ 0x36, 0x8b, 0x73, 0x3a, 0xc5, 0xb9, 0x63, 0x47, 0xab, 0xbd, 0x6c, 0xbd, 0x4b, 0x25, 0xf9, 0xff }|VOID*|0x00000002 + gHiKey960TokenSpaceGuid.PcdAndroidFastbootFile|{ 0x2a, 0x50, 0x88, 0x95, 0x70, 0x53, 0xe3, 0x11, 0x86, 0x31, 0xd7, 0xc5, 0x95, 0x13, 0x64, 0xc8 }|VOID*|0x00000003 + gHiKey960TokenSpaceGuid.PcdSdBootDevicePath|L""|VOID*|0x00000004 diff --git a/Pixel3XL/HiKey960.dsc b/Pixel3XL/HiKey960.dsc new file mode 100644 index 0000000..a4a1a37 --- /dev/null +++ b/Pixel3XL/HiKey960.dsc @@ -0,0 +1,288 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = HiKey960 + PLATFORM_GUID = bd1a557e-4423-466a-a462-38439588fd37 + PLATFORM_VERSION = 0.2 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf + + DEFINE CONFIG_NO_DEBUGLIB = TRUE + +!include Silicon/Hisilicon/Hisilicon.dsc.inc + +[LibraryClasses.common] + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf + ArmPlatformLib|Platform/Hisilicon/HiKey960/Library/HiKey960Lib/HiKey960Lib.inf + + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf + + # UiApp dependencies + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf + + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf + RealTimeClockLib|ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.inf + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf + + # USB Requirements + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + + # Network Libraries + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf + NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf + DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf + IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf + UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf + + # VariableRuntimeDxe Requirements + SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf + AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf + +[LibraryClasses.common.SEC] + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. + # It could be set FALSE to save size. + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE + +[PcdsFixedAtBuild.common] + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 + + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Alpha" + + # System Memory (3GB) + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0xC0000000 + + # HiKey960 Dual-Cluster profile + gArmPlatformTokenSpaceGuid.PcdCoreCount|8 + gArmPlatformTokenSpaceGuid.PcdClusterCount|2 + + # + # ARM PrimeCell + # + + ## PL011 - Serial Terminal + DEFINE SERIAL_BASE = 0xFFF32000 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|$(SERIAL_BASE) + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 + gArmPlatformTokenSpaceGuid.PL011UartInteger|10 + gArmPlatformTokenSpaceGuid.PL011UartFractional|26 + + ## PL031 RealTimeClock + gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0xFFF05000 + + # + # ARM General Interrupt Controller + # + gArmTokenSpaceGuid.PcdGicDistributorBase|0xE82B1000 + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE82B2000 + + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|10 + + # GUID of the UI app + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + + gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000 + + # + # + # Fastboot + # + gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbVendorId|0x18d1 + gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbProductId|0xd00d + + # + # Android Loader + # + gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,00003BFF0000000000)/UFS(0x0,0x3)/HD(7,GPT,D3340696-9B95-4C64-8DF6-E6D4548FBA41,0x12100,0x4000)/\\EFI\\BOOT\\GRUBAA64.EFI" + gHiKey960TokenSpaceGuid.PcdSdBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,00F037FF0000000000)/SD(0x0)" + + # + # Make VariableRuntimeDxe work at emulated non-volatile variable mode. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common] + # + # PEI Phase modules + # + ArmPlatformPkg/PrePi/PeiUniCore.inf + + # + # DXE + # + MdeModulePkg/Core/Dxe/DxeMain.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf + } + + # + # Architectural Protocols + # + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + # + # GPIO + # + Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf + ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + + # + # Virtual Keyboard + # + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf + + # + # USB Host Support + # + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + + # + # UEFI Network Stack + # + MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf + MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf + MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf + MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf + MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf + MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf + MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf + NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf + NetworkPkg/TcpDxe/TcpDxe.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf { + + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + } + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + } + ShellPkg/Application/Shell/Shell.inf { + + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf + + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 + } +!ifdef $(INCLUDE_TFTP_COMMAND) + ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) diff --git a/Pixel3XL/HiKey960.fdf b/Pixel3XL/HiKey960.fdf new file mode 100644 index 0000000..1b07284 --- /dev/null +++ b/Pixel3XL/HiKey960.fdf @@ -0,0 +1,221 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.BL33_AP_UEFI] +BaseAddress = 0x1AC98000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x000F0000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0xF0 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +0x00000000|0x000F0000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + APRIORI DXE { + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + } + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + # + # GPIO + # + INF Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf + INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf + + # + # USB Host Support + # + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + # + # UEFI Network Stack + # + INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf + INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf + INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf + INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf + INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf + INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf + INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf + INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf + INF NetworkPkg/TcpDxe/TcpDxe.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf +!ifdef $(INCLUDE_TFTP_COMMAND) + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include Silicon/Hisilicon/Hisilicon.fdf.inc diff --git a/Pixel3XL/HiKey960Dxe/HiKey960Dxe.c b/Pixel3XL/HiKey960Dxe/HiKey960Dxe.c new file mode 100644 index 0000000..47ec879 --- /dev/null +++ b/Pixel3XL/HiKey960Dxe/HiKey960Dxe.c @@ -0,0 +1,467 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "HiKey960Dxe.h" + +STATIC EMBEDDED_GPIO *mGpio; + +STATIC +VOID +InitSdCard ( + IN VOID + ) +{ + UINT32 Data; + + // + // LDO16 + // 000: 1.75V, 001: 1.8V, 010: 2.4V, 011: 2.6V, 100: 2.7V, + // 101: 2.85V, 110: 2.95V, 111: 3.0V. + // + Data = MmioRead32 (PMIC_LDO16_VSET_REG) & LDO16_VSET_MASK; + Data |= 6; + MmioWrite32 (PMIC_LDO16_VSET_REG, Data); + MmioOr32 (PMIC_LDO16_ONOFF_ECO_REG, LDO16_ONOFF_ECO_LDO16_ENABLE); + // + // wait regulator stable + // + MicroSecondDelay (100); + + // + // LDO9 + // 000: 1.75V, 001: 1.8V, 010: 1.825V, 011: 2.8V, 100: 2.85V, + // 101: 2.95V, 110: 3.0V, 111: 3.3V. + // + Data = MmioRead32 (PMIC_LDO9_VSET_REG) & LDO9_VSET_MASK; + Data |= 5; + MmioWrite32 (PMIC_LDO9_VSET_REG, Data); + MmioOr32 (PMU_REG_BASE + (0x6a << 2), 2); + // + // wait regulator stable + // + MicroSecondDelay (100); + + // + // GPIO203 + // + MmioWrite32 (IOMG_AO_REG_BASE + (24 << 2), 0); // GPIO function + + // + // SD pinmux + // + MmioWrite32 (IOMG_MMC0_000_REG, IOMG_FUNC1); // SD_CLK + MmioWrite32 (IOMG_MMC0_001_REG, IOMG_FUNC1); // SD_CMD + MmioWrite32 (IOMG_MMC0_002_REG, IOMG_FUNC1); // SD_DATA0 + MmioWrite32 (IOMG_MMC0_003_REG, IOMG_FUNC1); // SD_DATA1 + MmioWrite32 (IOMG_MMC0_004_REG, IOMG_FUNC1); // SD_DATA2 + MmioWrite32 (IOMG_MMC0_005_REG, IOMG_FUNC1); // SD_DATA3 + MmioWrite32 (IOCG_MMC0_000_REG, IOCG_DRIVE (15)); // SD_CLK float with 32mA + MmioWrite32 (IOCG_MMC0_001_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_CMD + MmioWrite32 (IOCG_MMC0_002_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA0 + MmioWrite32 (IOCG_MMC0_003_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA1 + MmioWrite32 (IOCG_MMC0_004_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA2 + MmioWrite32 (IOCG_MMC0_005_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA3 + + // + // SC_SEL_SD: + // 0xx: 3.2MHz, 100: PPLL0, 101: PPLL1, 11x: PPLL2. + // SC_DIV_SD: + // divider = value + 1 + // + do { + MmioOr32 ( + CRG_CLKDIV4, + CLKDIV4_SC_SEL_SD (7) | + (CLKDIV4_SC_SEL_SD_MASK << CLKDIV4_SC_MASK_SHIFT) + ); + Data = MmioRead32 (CRG_CLKDIV4) & CLKDIV4_SC_SEL_SD_MASK; + } while (Data != CLKDIV4_SC_SEL_SD (7)); + + // + // Unreset SD controller + // + MmioWrite32 (CRG_PERRSTDIS4, PERRSTEN4_SD); + do { + Data = MmioRead32 (CRG_PERRSTSTAT4); + } while ((Data & PERRSTEN4_SD) == PERRSTEN4_SD); + // + // Enable SD controller clock + // + MmioOr32 (CRG_PEREN0, PEREN0_GT_HCLK_SD); + MmioOr32 (CRG_PEREN4, PEREN4_GT_CLK_SD); + do { + Data = MmioRead32 (CRG_PERCLKEN4); + } while ((Data & PEREN4_GT_CLK_SD) != PEREN4_GT_CLK_SD); +} + +VOID +InitPeripherals ( + IN VOID + ) +{ + // + // Enable FPLL0 + // + MmioOr32 (SCTRL_SCFPLLCTRL0, SCTRL_SCFPLLCTRL0_FPLL0_EN); + + InitSdCard (); + + // + // Enable wifi clock + // + MmioOr32 (PMIC_HARDWARE_CTRL0, PMIC_HARDWARE_CTRL0_WIFI_CLK); + MmioOr32 (PMIC_OSC32K_ONOFF_CTRL, PMIC_OSC32K_ONOFF_CTRL_EN_32K); +} + +/** + Notification function of the event defined as belonging to the + EFI_END_OF_DXE_EVENT_GROUP_GUID event group that was created in + the entry point of the driver. + + This function is called when an event belonging to the + EFI_END_OF_DXE_EVENT_GROUP_GUID event group is signalled. Such an + event is signalled once at the end of the dispatching of all + drivers (end of the so called DXE phase). + + @param[in] Event Event declared in the entry point of the driver whose + notification function is being invoked. + @param[in] Context NULL +**/ +STATIC +VOID +OnEndOfDxe ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINT32 BootMode; + VOID *RecoveryStr; + VOID *SwitchStr; + + BootMode = MmioRead32 (SCTRL_BAK_DATA0) & BOOT_MODE_MASK; + if (BootMode == BOOT_MODE_RECOVERY) { + RecoveryStr = "WARNING: CAN NOT BOOT KERNEL IN RECOVERY MODE!\r\n"; + SwitchStr = "Switch to normal boot mode, then reboot to boot kernel.\r\n"; + SerialPortWrite (RecoveryStr, AsciiStrLen (RecoveryStr)); + SerialPortWrite (SwitchStr, AsciiStrLen (SwitchStr)); + } +} + +STATIC +EFI_STATUS +CreatePlatformBootOptionFromPath ( + IN CHAR16 *PathStr, + IN CHAR16 *Description, + IN OUT EFI_BOOT_MANAGER_LOAD_OPTION *BootOption + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH *DevicePath; + + DevicePath = (EFI_DEVICE_PATH *)ConvertTextToDevicePath (PathStr); + ASSERT (DevicePath != NULL); + Status = EfiBootManagerInitializeLoadOption ( + BootOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + LOAD_OPTION_ACTIVE, + Description, + DevicePath, + NULL, + 0 + ); + FreePool (DevicePath); + return Status; +} + +STATIC +EFI_STATUS +CreatePlatformBootOptionFromGuid ( + IN EFI_GUID *FileGuid, + IN CHAR16 *Description, + IN OUT EFI_BOOT_MANAGER_LOAD_OPTION *BootOption + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH *DevicePath; + EFI_DEVICE_PATH *TempDevicePath; + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode; + + Status = gBS->HandleProtocol ( + gImageHandle, + &gEfiLoadedImageProtocolGuid, + (VOID **) &LoadedImage + ); + ASSERT_EFI_ERROR (Status); + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid); + TempDevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle); + ASSERT (TempDevicePath != NULL); + DevicePath = AppendDevicePathNode ( + TempDevicePath, + (EFI_DEVICE_PATH_PROTOCOL *) &FileNode + ); + ASSERT (DevicePath != NULL); + Status = EfiBootManagerInitializeLoadOption ( + BootOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + LOAD_OPTION_ACTIVE, + Description, + DevicePath, + NULL, + 0 + ); + FreePool (DevicePath); + return Status; +} + +STATIC +EFI_STATUS +GetPlatformBootOptionsAndKeys ( + OUT UINTN *BootCount, + OUT EFI_BOOT_MANAGER_LOAD_OPTION **BootOptions, + OUT EFI_INPUT_KEY **BootKeys + ) +{ + EFI_GUID *FileGuid; + CHAR16 *PathStr; + EFI_STATUS Status; + UINTN Size; + + Size = sizeof (EFI_BOOT_MANAGER_LOAD_OPTION) * HIKEY960_BOOT_OPTION_NUM; + *BootOptions = (EFI_BOOT_MANAGER_LOAD_OPTION *)AllocateZeroPool (Size); + if (*BootOptions == NULL) { + DEBUG ((DEBUG_ERROR, "Failed to allocate memory for BootOptions\n")); + return EFI_OUT_OF_RESOURCES; + } + Size = sizeof (EFI_INPUT_KEY) * HIKEY960_BOOT_OPTION_NUM; + *BootKeys = (EFI_INPUT_KEY *)AllocateZeroPool (Size); + if (*BootKeys == NULL) { + DEBUG ((DEBUG_ERROR, "Failed to allocate memory for BootKeys\n")); + Status = EFI_OUT_OF_RESOURCES; + goto Error; + } + + PathStr = (CHAR16 *)PcdGetPtr (PcdSdBootDevicePath); + ASSERT (PathStr != NULL); + Status = CreatePlatformBootOptionFromPath ( + PathStr, + L"Boot from SD", + &(*BootOptions)[0] + ); + ASSERT_EFI_ERROR (Status); + + PathStr = (CHAR16 *)PcdGetPtr (PcdAndroidBootDevicePath); + ASSERT (PathStr != NULL); + Status = CreatePlatformBootOptionFromPath ( + PathStr, + L"Grub", + &(*BootOptions)[1] + ); + ASSERT_EFI_ERROR (Status); + + FileGuid = PcdGetPtr (PcdAndroidBootFile); + ASSERT (FileGuid != NULL); + Status = CreatePlatformBootOptionFromGuid ( + FileGuid, + L"Android Boot", + &(*BootOptions)[2] + ); + ASSERT_EFI_ERROR (Status); + + FileGuid = PcdGetPtr (PcdAndroidFastbootFile); + ASSERT (FileGuid != NULL); + Status = CreatePlatformBootOptionFromGuid ( + FileGuid, + L"Android Fastboot", + &(*BootOptions)[3] + ); + ASSERT_EFI_ERROR (Status); + (*BootKeys)[3].ScanCode = SCAN_NULL; + (*BootKeys)[3].UnicodeChar = 'f'; + + *BootCount = 4; + + return EFI_SUCCESS; +Error: + FreePool (*BootOptions); + return Status; +} + +PLATFORM_BOOT_MANAGER_PROTOCOL mPlatformBootManager = { + GetPlatformBootOptionsAndKeys +}; + +EFI_STATUS +EFIAPI +VirtualKeyboardRegister ( + IN VOID + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gEmbeddedGpioProtocolGuid, + NULL, + (VOID **) &mGpio + ); + if (EFI_ERROR (Status)) { + return Status; + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardReset ( + IN VOID + ) +{ + EFI_STATUS Status; + + if (mGpio == NULL) { + return EFI_INVALID_PARAMETER; + } + // + // Configure GPIO68 as GPIO function + // + MmioWrite32 (0xe896c108, 0); + Status = mGpio->Set (mGpio, DETECT_SW_FASTBOOT, GPIO_MODE_INPUT); + return Status; +} + +BOOLEAN +EFIAPI +VirtualKeyboardQuery ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + EFI_STATUS Status; + UINTN Value = 0; + + if ((VirtualKey == NULL) || (mGpio == NULL)) { + return FALSE; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + goto Done; + } else { + Status = mGpio->Get (mGpio, DETECT_SW_FASTBOOT, &Value); + if (EFI_ERROR (Status) || (Value != 0)) { + return FALSE; + } + } +Done: + VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE; + VirtualKey->Key.ScanCode = SCAN_NULL; + VirtualKey->Key.UnicodeChar = L'f'; + return TRUE; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardClear ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + if (VirtualKey == NULL) { + return EFI_INVALID_PARAMETER; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE); + WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4); + } + return EFI_SUCCESS; +} + +PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = { + VirtualKeyboardRegister, + VirtualKeyboardReset, + VirtualKeyboardQuery, + VirtualKeyboardClear +}; + +EFI_STATUS +EFIAPI +HiKey960EntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_EVENT EndOfDxeEvent; + + InitPeripherals (); + + // + // Create an event belonging to the "gEfiEndOfDxeEventGroupGuid" group. + // The "OnEndOfDxe()" function is declared as the call back function. + // It will be called at the end of the DXE phase when an event of the + // same group is signalled to inform about the end of the DXE phase. + // Install the INSTALL_FDT_PROTOCOL protocol. + // + Status = gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, + OnEndOfDxe, + NULL, + &gEfiEndOfDxeEventGroupGuid, + &EndOfDxeEvent + ); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformVirtualKeyboardProtocolGuid, + EFI_NATIVE_INTERFACE, + &mVirtualKeyboard + ); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformBootManagerProtocolGuid, + EFI_NATIVE_INTERFACE, + &mPlatformBootManager + ); + return Status; +} diff --git a/Pixel3XL/HiKey960Dxe/HiKey960Dxe.h b/Pixel3XL/HiKey960Dxe/HiKey960Dxe.h new file mode 100644 index 0000000..630aabc --- /dev/null +++ b/Pixel3XL/HiKey960Dxe/HiKey960Dxe.h @@ -0,0 +1,31 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HIKEY960DXE_H__ +#define __HIKEY960DXE_H__ + +#define ADB_REBOOT_ADDRESS 0x32100000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + +#define DETECT_SW_FASTBOOT 68 // GPIO8_4 + +#define HIKEY960_BOOT_OPTION_NUM 4 + +enum { + BOOT_MODE_RECOVERY = 0, + BOOT_MODE_MASK = 1, +}; + +#endif /* __HIKEY960DXE_H__ */ diff --git a/Pixel3XL/HiKey960Dxe/HiKey960Dxe.inf b/Pixel3XL/HiKey960Dxe/HiKey960Dxe.inf new file mode 100644 index 0000000..54105bd --- /dev/null +++ b/Pixel3XL/HiKey960Dxe/HiKey960Dxe.inf @@ -0,0 +1,59 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x0001001a + BASE_NAME = HiKey960Dxe + FILE_GUID = 6d824b2c-640e-4643-b9f2-9c09e8bff429 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKey960EntryPoint + +[Sources.common] + HiKey960Dxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/Hisilicon/HiKey960/HiKey960.dec + Silicon/Hisilicon/Hi3660/Hi3660.dec + +[LibraryClasses] + BaseMemoryLib + CacheMaintenanceLib + DxeServicesTableLib + IoLib + PcdLib + TimerLib + UefiBootManagerLib + UefiDriverEntryPoint + UefiLib + +[Protocols] + gEfiDevicePathFromTextProtocolGuid + gEfiLoadedImageProtocolGuid + gEmbeddedGpioProtocolGuid + gPlatformBootManagerProtocolGuid + gPlatformVirtualKeyboardProtocolGuid + +[Pcd] + gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath + gHiKey960TokenSpaceGuid.PcdAndroidBootFile + gHiKey960TokenSpaceGuid.PcdAndroidFastbootFile + gHiKey960TokenSpaceGuid.PcdSdBootDevicePath + +[Guids] + gEfiEndOfDxeEventGroupGuid + +[Depex] + TRUE diff --git a/Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.c b/Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.c new file mode 100644 index 0000000..b196455 --- /dev/null +++ b/Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.c @@ -0,0 +1,83 @@ +/** @file +* +* Copyright (c) 2018, Linaro. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include + +GPIO_CONTROLLER gGpioDevice[] = { + // + // { base address, gpio index, gpio count } + // + { 0xe8a0b000, 0, 8 }, // GPIO0 + { 0xe8a0c000, 8, 8 }, // GPIO1 + { 0xe8a0d000, 16, 8 }, // GPIO2 + { 0xe8a0e000, 24, 8 }, // GPIO3 + { 0xe8a0f000, 32, 8 }, // GPIO4 + { 0xe8a10000, 40, 8 }, // GPIO5 + { 0xe8a11000, 48, 8 }, // GPIO6 + { 0xe8a12000, 56, 8 }, // GPIO7 + { 0xe8a13000, 64, 8 }, // GPIO8 + { 0xe8a14000, 72, 8 }, // GPIO9 + { 0xe8a15000, 80, 8 }, // GPIO10 + { 0xe8a16000, 88, 8 }, // GPIO11 + { 0xe8a17000, 96, 8 }, // GPIO12 + { 0xe8a18000, 104, 8 }, // GPIO13 + { 0xe8a19000, 112, 8 }, // GPIO14 + { 0xe8a1a000, 120, 8 }, // GPIO15 + { 0xe8a1b000, 128, 8 }, // GPIO16 + { 0xe8a1c000, 136, 8 }, // GPIO17 + { 0xff3b4000, 144, 8 }, // GPIO18 + { 0xff3b5000, 152, 8 }, // GPIO19 + { 0xe8a1f000, 160, 8 }, // GPIO20 + { 0xe8a20000, 168, 8 }, // GPIO21 + { 0xfff0b000, 176, 8 }, // GPIO22 + { 0xfff0c000, 184, 8 }, // GPIO23 + { 0xfff0d000, 192, 8 }, // GPIO24 + { 0xfff0e000, 200, 8 }, // GPIO25 + { 0xfff0f000, 208, 8 }, // GPIO26 + { 0xfff10000, 216, 8 }, // GPIO27 + { 0xfff1d000, 224, 8 }, // GPIO28 +}; + +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { + // + // { global gpio count, gpio controller count, GPIO_CONTROLLER } + // + 232, 29, gGpioDevice +}; + +EFI_STATUS +EFIAPI +HiKey960GpioEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle; + + // Install the Embedded Platform GPIO Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, + NULL + ); + if (EFI_ERROR(Status)) { + Status = EFI_OUT_OF_RESOURCES; + } + + return Status; +} diff --git a/Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.inf b/Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.inf new file mode 100644 index 0000000..5ea3747 --- /dev/null +++ b/Pixel3XL/HiKey960GpioDxe/HiKey960GpioDxe.inf @@ -0,0 +1,35 @@ +# +# Copyright (c) 2018, Linaro. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x0001001a + BASE_NAME = HiKey960GpioDxe + FILE_GUID = 6aa12592-7e36-4aec-acf8-2ac2fd13815c + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKey960GpioEntryPoint + +[Sources] + HiKey960GpioDxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + UefiDriverEntryPoint + +[Protocols] + gPlatformGpioProtocolGuid + +[Depex] + TRUE diff --git a/Pixel3XL/Library/HiKey960Lib/HiKey960.c b/Pixel3XL/Library/HiKey960Lib/HiKey960.c new file mode 100644 index 0000000..9ae4610 --- /dev/null +++ b/Pixel3XL/Library/HiKey960Lib/HiKey960.c @@ -0,0 +1,144 @@ +/** @file +* +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include + +#include + +ARM_CORE_INFO mHiKey960InfoTable[] = { + { + // Cluster 0, Core 0 + 0x0, 0x0, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 1 + 0x0, 0x1, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 2 + 0x0, 0x2, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 3 + 0x0, 0x3, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 1, Core 0 + 0x1, 0x0, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 1, Core 1 + 0x1, 0x1, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 1, Core 2 + 0x1, 0x2, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + }, + { + // Cluster 1, Core 3 + 0x1, 0x3, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (UINT64)0xFFFFFFFF + } +}; + +/** + Return the current Boot Mode + + This function returns the boot reason on the platform + + @return Return the current Boot Mode of the platform + +**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +/** + Initialize controllers that must setup in the normal world + + This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim + in the PEI phase. + +**/ +RETURN_STATUS +ArmPlatformInitialize ( + IN UINTN MpId + ) +{ + return RETURN_SUCCESS; +} + +EFI_STATUS +PrePeiCoreGetMpCoreInfo ( + OUT UINTN *CoreCount, + OUT ARM_CORE_INFO **ArmCoreTable + ) +{ + // Only support one cluster + *CoreCount = sizeof(mHiKey960InfoTable) / sizeof(ARM_CORE_INFO); + *ArmCoreTable = mHiKey960InfoTable; + return EFI_SUCCESS; +} + +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; + +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &mArmMpCoreInfoPpiGuid, + &mMpCoreInfoPpi + } +}; + +VOID +ArmPlatformGetPlatformPpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ) +{ + *PpiListSize = sizeof(gPlatformPpiTable); + *PpiList = gPlatformPpiTable; +} diff --git a/Pixel3XL/Library/HiKey960Lib/HiKey960Helper.S b/Pixel3XL/Library/HiKey960Lib/HiKey960Helper.S new file mode 100644 index 0000000..eb85f67 --- /dev/null +++ b/Pixel3XL/Library/HiKey960Lib/HiKey960Helper.S @@ -0,0 +1,52 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# + +#include +#include + +.text +.align 3 + +ASM_FUNC(ArmPlatformPeiBootAction) + ret + +//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_FUNC(ArmPlatformIsPrimaryCore) + MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask)) + and x0, x0, x1 + MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore)) + cmp w0, w1 + cset x0, eq + ret + +//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) + MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore)) + ret + +//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos = (ClusterId * 4) + CoreId +ASM_FUNC(ArmPlatformGetCorePosition) + and x1, x0, #ARM_CORE_MASK + and x0, x0, #ARM_CLUSTER_MASK + add x0, x1, x0, LSR #6 + ret diff --git a/Pixel3XL/Library/HiKey960Lib/HiKey960Lib.inf b/Pixel3XL/Library/HiKey960Lib/HiKey960Lib.inf new file mode 100644 index 0000000..e16e5a6 --- /dev/null +++ b/Pixel3XL/Library/HiKey960Lib/HiKey960Lib.inf @@ -0,0 +1,44 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = HiKey960Lib + FILE_GUID = 28873463-debb-4573-8382-1036f74bfcca + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[LibraryClasses] + ArmLib + HobLib + IoLib + MemoryAllocationLib + SerialPortLib + +[Sources.common] + HiKey960.c + HiKey960Helper.S + HiKey960Mem.c + +[FixedPcd] + gArmTokenSpaceGuid.PcdArmPrimaryCore + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Pixel3XL/Library/HiKey960Lib/HiKey960Mem.c b/Pixel3XL/Library/HiKey960Lib/HiKey960Mem.c new file mode 100644 index 0000000..0c37c37 --- /dev/null +++ b/Pixel3XL/Library/HiKey960Lib/HiKey960Mem.c @@ -0,0 +1,163 @@ +/** @file +* +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include +#include +#include + +// The total number of descriptors, including the final "end-of-table" descriptor. +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 12 + +// DDR attributes +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED + +#define HI3660_PERIPH_BASE 0xE0000000 +#define HI3660_PERIPH_SZ 0x20000000 + +#define HIKEY960_EXTRA_SYSTEM_MEMORY_BASE 0x0000000100000000 +#define HIKEY960_EXTRA_SYSTEM_MEMORY_SIZE 0x0000000020000000 + +#define HIKEY960_MEMORY_SIZE 0x0000000100000000 + +STATIC struct HiKey960ReservedMemory { + EFI_PHYSICAL_ADDRESS Offset; + EFI_PHYSICAL_ADDRESS Size; +} HiKey960ReservedMemoryBuffer [] = { + { 0x1AC00000, 0x00098000 }, // ARM-TF reserved + { 0x32000000, 0x00100000 }, // PSTORE/RAMOOPS + { 0x32100000, 0x00001000 }, // ADB REBOOT "REASON" + { 0x3E000000, 0x02000000 }, // TEE OS + { 0x89B80000, 0x00100000 }, // MCU Code reserved + { 0x89C80000, 0x00040000 } // MCU reserved +}; + +/** + Return the Virtual Memory Map of your platform + + This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- + Virtual Memory mapping. This array must be ended by a zero-filled + entry + +**/ +VOID +ArmPlatformGetVirtualMemoryMap ( + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap + ) +{ + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + UINTN Index = 0, Count, ReservedTop; + EFI_PEI_HOB_POINTERS NextHob; + UINT64 ResourceLength; + EFI_PHYSICAL_ADDRESS ResourceTop; + + ResourceAttributes = ( + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED + ); + + // Create initial Base Hob for system memory. + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + PcdGet64 (PcdSystemMemoryBase), + PcdGet64 (PcdSystemMemorySize) + ); + + NextHob.Raw = GetHobList (); + Count = sizeof (HiKey960ReservedMemoryBuffer) / sizeof (struct HiKey960ReservedMemory); + while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) + { + if (Index >= Count) + break; + if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) && + (HiKey960ReservedMemoryBuffer[Index].Offset >= NextHob.ResourceDescriptor->PhysicalStart) && + ((HiKey960ReservedMemoryBuffer[Index].Offset + HiKey960ReservedMemoryBuffer[Index].Size) <= + NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength)) + { + ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute; + ResourceLength = NextHob.ResourceDescriptor->ResourceLength; + ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength; + ReservedTop = HiKey960ReservedMemoryBuffer[Index].Offset + HiKey960ReservedMemoryBuffer[Index].Size; + + // Create the System Memory HOB for the reserved buffer + BuildResourceDescriptorHob ( + EFI_RESOURCE_MEMORY_RESERVED, + EFI_RESOURCE_ATTRIBUTE_PRESENT, + HiKey960ReservedMemoryBuffer[Index].Offset, + HiKey960ReservedMemoryBuffer[Index].Size + ); + // Update the HOB + NextHob.ResourceDescriptor->ResourceLength = HiKey960ReservedMemoryBuffer[Index].Offset - + NextHob.ResourceDescriptor->PhysicalStart; + + // If there is some memory available on the top of the reserved memory then create a HOB + if (ReservedTop < ResourceTop) + { + BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + ReservedTop, + ResourceTop - ReservedTop); + } + Index++; + } + NextHob.Raw = GET_NEXT_HOB (NextHob); + } + + ASSERT (VirtualMemoryMap != NULL); + + VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages ( + EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS) + ); + if (VirtualMemoryTable == NULL) { + return; + } + + CacheAttributes = DDR_ATTRIBUTES_CACHED; + + Index = 0; + + // DDR - 3.0GB section + VirtualMemoryTable[Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase); + VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase); + VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize); + VirtualMemoryTable[Index].Attributes = CacheAttributes; + + // Hi3660 SOC peripherals + VirtualMemoryTable[++Index].PhysicalBase = HI3660_PERIPH_BASE; + VirtualMemoryTable[Index].VirtualBase = HI3660_PERIPH_BASE; + VirtualMemoryTable[Index].Length = HI3660_PERIPH_SZ; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + + // End of Table + VirtualMemoryTable[++Index].PhysicalBase = 0; + VirtualMemoryTable[Index].VirtualBase = 0; + VirtualMemoryTable[Index].Length = 0; + VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; + + ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); + + *VirtualMemoryMap = VirtualMemoryTable; +}