mirror of
https://github.com/ziglang/zig.git
synced 2025-02-02 12:11:56 +00:00
260 lines
10 KiB
Zig
260 lines
10 KiB
Zig
//! Implementation of ARM specific builtins for Run-time ABI
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//! This file includes all ARM-only functions.
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const std = @import("std");
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const builtin = @import("builtin");
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const arch = builtin.cpu.arch;
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const common = @import("common.zig");
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pub const panic = common.panic;
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comptime {
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if (!builtin.is_test) {
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if (arch.isArmOrThumb()) {
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@export(__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_ldivmod, .{ .name = "__aeabi_ldivmod", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_uldivmod, .{ .name = "__aeabi_uldivmod", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_idivmod, .{ .name = "__aeabi_idivmod", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_uidivmod, .{ .name = "__aeabi_uidivmod", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memcpy, .{ .name = "__aeabi_memcpy", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memcpy4, .{ .name = "__aeabi_memcpy4", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memcpy8, .{ .name = "__aeabi_memcpy8", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memmove, .{ .name = "__aeabi_memmove", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memmove4, .{ .name = "__aeabi_memmove4", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memmove8, .{ .name = "__aeabi_memmove8", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memset, .{ .name = "__aeabi_memset", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memset4, .{ .name = "__aeabi_memset4", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memset8, .{ .name = "__aeabi_memset8", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memclr, .{ .name = "__aeabi_memclr", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memclr4, .{ .name = "__aeabi_memclr4", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_memclr8, .{ .name = "__aeabi_memclr8", .linkage = common.linkage, .visibility = common.visibility });
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if (builtin.os.tag == .linux) {
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@export(__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = common.linkage, .visibility = common.visibility });
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}
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// floating-point helper functions (single+double-precision reverse subtraction, y – x), see subdf3.zig
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@export(__aeabi_frsub, .{ .name = "__aeabi_frsub", .linkage = common.linkage, .visibility = common.visibility });
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@export(__aeabi_drsub, .{ .name = "__aeabi_drsub", .linkage = common.linkage, .visibility = common.visibility });
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}
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}
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}
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const __divmodsi4 = @import("int.zig").__divmodsi4;
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const __udivmodsi4 = @import("int.zig").__udivmodsi4;
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const __divmoddi4 = @import("int.zig").__divmoddi4;
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const __udivmoddi4 = @import("int.zig").__udivmoddi4;
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extern fn memset(dest: ?[*]u8, c: i32, n: usize) ?[*]u8;
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extern fn memcpy(noalias dest: ?[*]u8, noalias src: ?[*]const u8, n: usize) ?[*]u8;
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extern fn memmove(dest: ?[*]u8, src: ?[*]const u8, n: usize) ?[*]u8;
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pub fn __aeabi_memcpy(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memcpy(dest, src, n);
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}
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pub fn __aeabi_memcpy4(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memcpy(dest, src, n);
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}
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pub fn __aeabi_memcpy8(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memcpy(dest, src, n);
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}
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pub fn __aeabi_memmove(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memmove(dest, src, n);
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}
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pub fn __aeabi_memmove4(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memmove(dest, src, n);
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}
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pub fn __aeabi_memmove8(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memmove(dest, src, n);
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}
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pub fn __aeabi_memset(dest: [*]u8, n: usize, c: i32) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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// This is dentical to the standard `memset` definition but with the last
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// two arguments swapped
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_ = memset(dest, c, n);
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}
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pub fn __aeabi_memset4(dest: [*]u8, n: usize, c: i32) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memset(dest, c, n);
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}
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pub fn __aeabi_memset8(dest: [*]u8, n: usize, c: i32) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memset(dest, c, n);
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}
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pub fn __aeabi_memclr(dest: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memset(dest, 0, n);
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}
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pub fn __aeabi_memclr4(dest: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memset(dest, 0, n);
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}
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pub fn __aeabi_memclr8(dest: [*]u8, n: usize) callconv(.AAPCS) void {
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@setRuntimeSafety(false);
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_ = memset(dest, 0, n);
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}
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// Dummy functions to avoid errors during the linking phase
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pub fn __aeabi_unwind_cpp_pr0() callconv(.AAPCS) void {}
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pub fn __aeabi_unwind_cpp_pr1() callconv(.AAPCS) void {}
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pub fn __aeabi_unwind_cpp_pr2() callconv(.AAPCS) void {}
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// This function can only clobber r0 according to the ABI
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pub fn __aeabi_read_tp() callconv(.Naked) void {
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@setRuntimeSafety(false);
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asm volatile (
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\\ mrc p15, 0, r0, c13, c0, 3
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\\ bx lr
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);
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unreachable;
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}
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// The following functions are wrapped in an asm block to ensure the required
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// calling convention is always respected
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pub fn __aeabi_uidivmod() callconv(.Naked) void {
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@setRuntimeSafety(false);
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// Divide r0 by r1; the quotient goes in r0, the remainder in r1
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asm volatile (
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\\ push {lr}
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\\ sub sp, #4
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\\ mov r2, sp
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\\ bl __udivmodsi4
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\\ ldr r1, [sp]
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\\ add sp, #4
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\\ pop {pc}
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::: "memory");
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unreachable;
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}
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pub fn __aeabi_uldivmod() callconv(.Naked) void {
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@setRuntimeSafety(false);
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// Divide r1:r0 by r3:r2; the quotient goes in r1:r0, the remainder in r3:r2
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asm volatile (
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\\ push {r4, lr}
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\\ sub sp, #16
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\\ add r4, sp, #8
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\\ str r4, [sp]
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\\ bl __udivmoddi4
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\\ ldr r2, [sp, #8]
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\\ ldr r3, [sp, #12]
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\\ add sp, #16
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\\ pop {r4, pc}
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::: "memory");
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unreachable;
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}
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pub fn __aeabi_idivmod() callconv(.Naked) void {
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@setRuntimeSafety(false);
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// Divide r0 by r1; the quotient goes in r0, the remainder in r1
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asm volatile (
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\\ push {lr}
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\\ sub sp, #4
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\\ mov r2, sp
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\\ bl __divmodsi4
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\\ ldr r1, [sp]
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\\ add sp, #4
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\\ pop {pc}
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::: "memory");
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unreachable;
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}
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pub fn __aeabi_ldivmod() callconv(.Naked) void {
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@setRuntimeSafety(false);
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// Divide r1:r0 by r3:r2; the quotient goes in r1:r0, the remainder in r3:r2
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asm volatile (
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\\ push {r4, lr}
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\\ sub sp, #16
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\\ add r4, sp, #8
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\\ str r4, [sp]
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\\ bl __divmoddi4
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\\ ldr r2, [sp, #8]
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\\ ldr r3, [sp, #12]
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\\ add sp, #16
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\\ pop {r4, pc}
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::: "memory");
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unreachable;
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}
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// Float Arithmetic
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fn __aeabi_frsub(a: f32, b: f32) callconv(.AAPCS) f32 {
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const neg_a: f32 = @bitCast(@as(u32, @bitCast(a)) ^ (@as(u32, 1) << 31));
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return b + neg_a;
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}
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fn __aeabi_drsub(a: f64, b: f64) callconv(.AAPCS) f64 {
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const neg_a: f64 = @bitCast(@as(u64, @bitCast(a)) ^ (@as(u64, 1) << 63));
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return b + neg_a;
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}
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test "__aeabi_frsub" {
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if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
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const inf32 = std.math.inf(f32);
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const maxf32 = std.math.floatMax(f32);
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const frsub_data = [_][3]f32{
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[_]f32{ 0.0, 0.0, -0.0 },
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[_]f32{ 0.0, -0.0, -0.0 },
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[_]f32{ -0.0, 0.0, 0.0 },
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[_]f32{ -0.0, -0.0, -0.0 },
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[_]f32{ 0.0, 1.0, 1.0 },
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[_]f32{ 1.0, 0.0, -1.0 },
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[_]f32{ 1.0, 1.0, 0.0 },
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[_]f32{ 1234.56789, 9876.54321, 8641.97532 },
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[_]f32{ 9876.54321, 1234.56789, -8641.97532 },
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[_]f32{ -8641.97532, 1234.56789, 9876.54321 },
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[_]f32{ 8641.97532, 9876.54321, 1234.56789 },
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[_]f32{ -maxf32, -maxf32, 0.0 },
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[_]f32{ maxf32, maxf32, 0.0 },
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[_]f32{ maxf32, -maxf32, -inf32 },
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[_]f32{ -maxf32, maxf32, inf32 },
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};
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if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
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for (frsub_data) |data| {
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try std.testing.expectApproxEqAbs(data[2], __aeabi_frsub(data[0], data[1]), 0.001);
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}
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}
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test "__aeabi_drsub" {
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if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
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const inf64 = std.math.inf(f64);
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const maxf64 = std.math.floatMax(f64);
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const frsub_data = [_][3]f64{
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[_]f64{ 0.0, 0.0, -0.0 },
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[_]f64{ 0.0, -0.0, -0.0 },
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[_]f64{ -0.0, 0.0, 0.0 },
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[_]f64{ -0.0, -0.0, -0.0 },
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[_]f64{ 0.0, 1.0, 1.0 },
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[_]f64{ 1.0, 0.0, -1.0 },
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[_]f64{ 1.0, 1.0, 0.0 },
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[_]f64{ 1234.56789, 9876.54321, 8641.97532 },
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[_]f64{ 9876.54321, 1234.56789, -8641.97532 },
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[_]f64{ -8641.97532, 1234.56789, 9876.54321 },
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[_]f64{ 8641.97532, 9876.54321, 1234.56789 },
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[_]f64{ -maxf64, -maxf64, 0.0 },
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[_]f64{ maxf64, maxf64, 0.0 },
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[_]f64{ maxf64, -maxf64, -inf64 },
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[_]f64{ -maxf64, maxf64, inf64 },
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};
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if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
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for (frsub_data) |data| {
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try std.testing.expectApproxEqAbs(data[2], __aeabi_drsub(data[0], data[1]), 0.000001);
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}
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}
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