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llvm: Fix ilp32e/lp64e and ilp32f/lp64f ABI selection for riscv.
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@ -427,17 +427,14 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
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// Once our self-hosted linker can handle both ABIs, this hack should go away.
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if (target.cpu.arch == .powerpc64) return "elfv2";
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const have_float = switch (target.abi) {
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.gnueabihf, .musleabihf, .eabihf => true,
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else => false,
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};
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switch (target.cpu.arch) {
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.riscv64 => {
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const featureSetHas = std.Target.riscv.featureSetHas;
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if (featureSetHas(target.cpu.features, .d)) {
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if (featureSetHas(target.cpu.features, .e)) {
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return "lp64e";
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} else if (featureSetHas(target.cpu.features, .d)) {
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return "lp64d";
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} else if (have_float) {
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} else if (featureSetHas(target.cpu.features, .f)) {
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return "lp64f";
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} else {
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return "lp64";
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@ -445,12 +442,12 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
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},
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.riscv32 => {
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const featureSetHas = std.Target.riscv.featureSetHas;
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if (featureSetHas(target.cpu.features, .d)) {
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return "ilp32d";
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} else if (have_float) {
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return "ilp32f";
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} else if (featureSetHas(target.cpu.features, .e)) {
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if (featureSetHas(target.cpu.features, .e)) {
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return "ilp32e";
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} else if (featureSetHas(target.cpu.features, .d)) {
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return "ilp32d";
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} else if (featureSetHas(target.cpu.features, .f)) {
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return "ilp32f";
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} else {
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return "ilp32";
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}
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