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Get codegen.zig to compile - use '{d}' format for Air.Inst.Index values

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This commit is contained in:
Lewis Gaul 2021-07-18 23:26:02 +01:00 committed by Andrew Kelley
parent 7381431e68
commit bf8e347b1b
1 changed files with 3 additions and 3 deletions
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6
src/codegen.zig
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@ -1048,7 +1048,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void {
const stack_mcv = try self.allocRegOrMem(inst, false);
log.debug("spilling {*} to stack mcv {any}", .{ inst, stack_mcv });
log.debug("spilling {d} to stack mcv {any}", .{ inst, stack_mcv });
const reg_mcv = self.getResolvedInstValue(inst);
assert(reg == toCanonicalReg(reg_mcv.register));
const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
@ -3115,7 +3115,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
}
}
};
log.debug("consolidating else_entry {*} {}=>{}", .{ else_key, else_value, canon_mcv });
log.debug("consolidating else_entry {d} {}=>{}", .{ else_key, else_value, canon_mcv });
// TODO make sure the destination stack offset / register does not already have something
// going on there.
try self.setRegOrMem(self.air.typeOfIndex(else_key), canon_mcv, else_value);
@ -3142,7 +3142,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
}
}
};
log.debug("consolidating then_entry {*} {}=>{}", .{ then_key, parent_mcv, then_value });
log.debug("consolidating then_entry {d} {}=>{}", .{ then_key, parent_mcv, then_value });
// TODO make sure the destination stack offset / register does not already have something
// going on there.
try self.setRegOrMem(self.air.typeOfIndex(then_key), parent_mcv, then_value);