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Merge 793bf3a2ef
into f845fa04a0
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commit
7164d259ac
@ -9975,8 +9975,14 @@ pub const FuncGen = struct {
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const ptr_ty = self.typeOf(atomic_load.ptr);
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const info = ptr_ty.ptrInfo(zcu);
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const elem_ty = Type.fromInterned(info.child);
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if (!elem_ty.hasRuntimeBitsIgnoreComptime(zcu)) return .none;
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const ordering = toLlvmAtomicOrdering(atomic_load.order);
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// Zero-sized loads should still result in a fence.
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if (!elem_ty.isFnOrHasRuntimeBitsIgnoreComptime(zcu)) {
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_ = try self.wip.fence(self.sync_scope, ordering);
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return .none;
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}
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const llvm_abi_ty = try o.getAtomicAbiType(elem_ty, false);
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const ptr_alignment = (if (info.flags.alignment != .none)
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@as(InternPool.Alignment, info.flags.alignment)
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@ -10021,7 +10027,13 @@ pub const FuncGen = struct {
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const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op;
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const ptr_ty = self.typeOf(bin_op.lhs);
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const operand_ty = ptr_ty.childType(zcu);
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if (!operand_ty.isFnOrHasRuntimeBitsIgnoreComptime(zcu)) return .none;
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// Zero-sized stores should still result in a fence.
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if (!operand_ty.isFnOrHasRuntimeBitsIgnoreComptime(zcu)) {
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_ = try self.wip.fence(self.sync_scope, ordering);
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return .none;
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}
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const ptr = try self.resolveInst(bin_op.lhs);
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var element = try self.resolveInst(bin_op.rhs);
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const llvm_abi_ty = try o.getAtomicAbiType(operand_ty, false);
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