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zig.h: Improve portability of zig_*_windows_teb() helpers.
* Make it work for thumb and aarch64. * Clean up std.os.windows.teb() a bit. I also updated stage1/zig.h since the changes are backwards-compatible and are necessary due to the std.os.windows changes that call the newly-added functions.
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@ -2101,39 +2101,41 @@ pub fn UnlockFile(
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/// This is a workaround for the C backend until zig has the ability to put
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/// C code in inline assembly.
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extern fn zig_thumb_windows_teb() callconv(.c) *anyopaque;
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extern fn zig_aarch64_windows_teb() callconv(.c) *anyopaque;
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extern fn zig_x86_windows_teb() callconv(.c) *anyopaque;
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extern fn zig_x86_64_windows_teb() callconv(.c) *anyopaque;
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pub fn teb() *TEB {
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return switch (native_arch) {
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.x86 => blk: {
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if (builtin.zig_backend == .stage2_c) {
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break :blk @ptrCast(@alignCast(zig_x86_windows_teb()));
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} else {
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break :blk asm (
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\\ movl %%fs:0x18, %[ptr]
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: [ptr] "=r" (-> *TEB),
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);
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}
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},
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.x86_64 => blk: {
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if (builtin.zig_backend == .stage2_c) {
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break :blk @ptrCast(@alignCast(zig_x86_64_windows_teb()));
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} else {
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break :blk asm (
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\\ movq %%gs:0x30, %[ptr]
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: [ptr] "=r" (-> *TEB),
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);
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}
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},
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.thumb => asm (
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\\ mrc p15, 0, %[ptr], c13, c0, 2
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: [ptr] "=r" (-> *TEB),
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),
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.aarch64 => asm (
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\\ mov %[ptr], x18
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: [ptr] "=r" (-> *TEB),
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),
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.thumb => if (builtin.zig_backend == .stage2_c)
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@ptrCast(@alignCast(zig_thumb_windows_teb()))
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else
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asm (
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\\ mrc p15, 0, %[ptr], c13, c0, 2
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: [ptr] "=r" (-> *TEB),
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),
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.aarch64 => if (builtin.zig_backend == .stage2_c)
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@ptrCast(@alignCast(zig_aarch64_windows_teb()))
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else
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asm (
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\\ mov %[ptr], x18
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: [ptr] "=r" (-> *TEB),
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),
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.x86 => if (builtin.zig_backend == .stage2_c)
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@ptrCast(@alignCast(zig_x86_windows_teb()))
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else
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asm (
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\\ movl %%fs:0x18, %[ptr]
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: [ptr] "=r" (-> *TEB),
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),
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.x86_64 => if (builtin.zig_backend == .stage2_c)
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@ptrCast(@alignCast(zig_x86_64_windows_teb()))
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else
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asm (
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\\ movq %%gs:0x30, %[ptr]
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: [ptr] "=r" (-> *TEB),
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),
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else => @compileError("unsupported arch"),
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};
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}
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54
lib/zig.h
54
lib/zig.h
@ -3926,28 +3926,52 @@ static inline void zig_msvc_atomic_store_i128(zig_i128 volatile* obj, zig_i128 a
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/* ======================== Special Case Intrinsics ========================= */
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#if (_MSC_VER && _M_X64) || defined(__x86_64__)
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#if defined(_M_ARM) || defined(__thumb__)
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static inline void* zig_x86_64_windows_teb(void) {
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#if _MSC_VER
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return (void*)__readgsqword(0x30);
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#else
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void* teb;
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__asm volatile(" movq %%gs:0x30, %[ptr]": [ptr]"=r"(teb)::);
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return teb;
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static inline void* zig_thumb_windows_teb(void) {
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)_MoveFromCoprocessor(15, 0, 13, 0, 2);
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#elif defined(__GNUC__)
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__asm__ ("mrc p15, 0, %[ptr], c13, c0, 2" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#elif (_MSC_VER && _M_IX86) || defined(__i386__) || defined(__X86__)
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#elif defined(_M_ARM64) || defined(__arch64__)
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static inline void* zig_aarch64_windows_teb(void) {
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)__readx18qword(0x0);
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#elif defined(__GNUC__)
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__asm__ ("mov %[ptr], x18" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#elif defined(_M_IX86) || defined(__i386__)
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static inline void* zig_x86_windows_teb(void) {
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#if _MSC_VER
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return (void*)__readfsdword(0x18);
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#else
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void* teb;
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__asm volatile(" movl %%fs:0x18, %[ptr]": [ptr]"=r"(teb)::);
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return teb;
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)__readfsdword(0x18);
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#elif defined(__GNUC__)
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__asm__ ("movl %%fs:0x18, %[ptr]" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#elif defined(_M_X64) || defined(__x86_64__)
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static inline void* zig_x86_64_windows_teb(void) {
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)__readgsqword(0x30);
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#elif defined(__GNUC__)
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__asm__ ("movq %%gs:0x30, %[ptr]" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#endif
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54
stage1/zig.h
54
stage1/zig.h
@ -3926,28 +3926,52 @@ static inline void zig_msvc_atomic_store_i128(zig_i128 volatile* obj, zig_i128 a
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/* ======================== Special Case Intrinsics ========================= */
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#if (_MSC_VER && _M_X64) || defined(__x86_64__)
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#if defined(_M_ARM) || defined(__thumb__)
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static inline void* zig_x86_64_windows_teb(void) {
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#if _MSC_VER
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return (void*)__readgsqword(0x30);
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#else
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void* teb;
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__asm volatile(" movq %%gs:0x30, %[ptr]": [ptr]"=r"(teb)::);
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return teb;
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static inline void* zig_thumb_windows_teb(void) {
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)_MoveFromCoprocessor(15, 0, 13, 0, 2);
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#elif defined(__GNUC__)
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__asm__ ("mrc p15, 0, %[ptr], c13, c0, 2" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#elif (_MSC_VER && _M_IX86) || defined(__i386__) || defined(__X86__)
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#elif defined(_M_ARM64) || defined(__arch64__)
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static inline void* zig_aarch64_windows_teb(void) {
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)__readx18qword(0x0);
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#elif defined(__GNUC__)
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__asm__ ("mov %[ptr], x18" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#elif defined(_M_IX86) || defined(__i386__)
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static inline void* zig_x86_windows_teb(void) {
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#if _MSC_VER
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return (void*)__readfsdword(0x18);
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#else
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void* teb;
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__asm volatile(" movl %%fs:0x18, %[ptr]": [ptr]"=r"(teb)::);
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return teb;
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)__readfsdword(0x18);
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#elif defined(__GNUC__)
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__asm__ ("movl %%fs:0x18, %[ptr]" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#elif defined(_M_X64) || defined(__x86_64__)
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static inline void* zig_x86_64_windows_teb(void) {
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void* teb = 0;
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#if defined(_MSC_VER)
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teb = (void*)__readgsqword(0x30);
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#elif defined(__GNUC__)
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__asm__ ("movq %%gs:0x30, %[ptr]" : [ptr] "=r" (teb));
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#endif
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return teb;
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}
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#endif
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