Commit Graph

61 Commits

Author SHA1 Message Date
Ryan Kurtz
c1f8312c56 Merge remote-tracking branch 'origin/GP-4719_ghidra1_StandaloneDTMUndoRedo--SQUASHED' 2024-07-01 14:46:43 -04:00
ghidra1
ff032bee4b GP-4719 Added support for undo/redo for datatype archives. 2024-07-01 13:52:07 -04:00
ghidra1
036ef9d0db GP-4737 - Improve ELF relocation handling of unresolved symbol 2024-07-01 13:06:54 -04:00
mumbel
9a22180efa Add issing ELF reloc 2024-03-05 22:19:27 -06:00
ghidra1
3ead54f0ac GP-4239 Transitioned to new AbstractElfRelocationHandler implementation which uses ElfRelocationType enums specific to each handler. 2024-02-12 10:52:25 -05:00
ghidorahrex
79d775e6a5 GP-4055: Corrected AVR 8 Hflag usage in DES instruction 2023-11-21 14:06:23 +00:00
ghidorahrex
3d1b865543 GP-3879: Implemented lzcount in several instructions 2023-11-03 12:30:51 -04:00
emteere
c977c05768 GP-3746 remove LDS/STS instructions only on AVRtiny 2023-08-29 10:05:30 -04:00
emteere
08b20d5d21 GP-2308 Refactored parsing dialog adding includepaths and Achitecture,
handle noreturn tags
2023-04-20 14:01:41 -04:00
caheckman
6c761536ba Language fixes for inconsistent 0 size exports 2023-03-13 15:08:39 -04:00
ghidra1
5b433f35ca GP-3013 Refactor of Relocation API (created V6 DB adapter) to include
status and stored length when original FileBytes are used.
2023-02-03 08:01:04 -05:00
ghidra1
6b9bd6c220 GP-2703 revised ELF relocation processing to handle statically linked
binaries and adjusted post-relocation read-only memory fixup.
2022-10-17 18:43:27 -04:00
Ryan Kurtz
e42c1f1f32 Merge remote-tracking branch
'origin/GP-1979_emteere_CParserChanges--SQUASHED' (Closes #2885,
Closes #2119, Closes #716, Closes #3996, Closes #4184, Closes #4517,
Closes #4377, Closes #1784,  Closes #1455, Closes #1940)
2022-10-13 01:08:43 -04:00
emteere
ffae7232cb GP-1979_emteere better error reporting and handling of newer cspec idioms NoReturn, anonymous function arrays and parameters, #pragma use, Thread_local, Alignas, allow '#' comment out filename, added parsing scripts 2022-10-12 21:50:02 -04:00
Ryan Kurtz
627a7f6c9c Merge remote-tracking branch
'origin/GP-2538_ghidorahrex_atmega256_ports_fix' (Closes #4592)
2022-10-12 13:29:11 -04:00
ghidorahrex
8aa8a3c7ec GP-2538: Corrected port addresses for atmega256 2022-09-12 17:42:46 +00:00
ghidorahrex
3ca6b5d2de GP-2499 renamed avr8 W register to R25R24 2022-08-26 13:14:29 +00:00
Ryan Kurtz
0123c85d9f Merge remote-tracking branch 'origin/patch' 2022-07-20 01:27:48 -04:00
emteere
becb5b8b13 GP-2213 Avr8 compiler spec fixes, function start patterns. 2022-07-19 16:28:54 -04:00
Ryan Kurtz
3b7f5b4f30 Merge remote-tracking branch 'origin/patch' 2022-07-11 09:53:27 -04:00
emteere
b34f43e685 GP-2213_emteere support for 24-bit spaces, byte addressed code space, hex importer fixes, AVR8 relocations 2022-07-11 08:06:06 -04:00
Ryan Kurtz
4f59e90b39 Merge remote-tracking branch 'origin/GP-1426_Dan_asmWoW64--SQUASHED' 2022-03-29 01:27:33 -04:00
Dan
760a9ca462 GP-1426: Refactor assembler. Fix issue where Sleigh passes context to the right. 2022-03-28 14:59:46 -04:00
ghidorahrex
7e62b796a9 GP-1165: Corrected minor issue with integer ABS functions using
floating-point abs pcode.
2022-02-17 11:39:27 -05:00
Ryan Kurtz
3a0ae8ee39 GP-849: Gradle 7 support 2021-05-12 13:45:16 -04:00
ghidra1
162f203395 Updated certification headers 2021-03-17 18:22:50 -04:00
emteere
599dc0a1d1 GT-2909_emteere_Xmega made memory access registers non-volatile so
references could be made
2020-08-27 14:00:48 -04:00
emteere
6bbcbf0277 GT-2909_emteere_Xmega minor typo changes 2020-08-25 11:39:34 -04:00
emteere
99e385da6a GT-2909 refactored IO_START implementation, added load/store of real
flags register
2020-08-05 13:47:51 -04:00
ghidra1
81f5776555 GT-2909 AVR8 ELF import and pcode test improvements 2020-07-29 14:29:46 -04:00
emteere
1f8ced9b8d GT-2909_emteere fixing pcodeunit tests from removal of register 2020-07-24 17:47:03 -04:00
emteere
2a8a3d6ba6 GT-2909_emteere_Xmega fixed comment 2020-07-24 17:47:02 -04:00
emteere
0f8bd6b036 GT-2909_emteere_Xmega added xmega processor and missing pcode 2020-07-24 17:47:01 -04:00
ghidorahrex
9e568c9de3 Merge remote-tracking branch 'origin/GT-3276_ghidorahrex_avr8_flag_fixup' 2020-03-18 13:58:04 -04:00
ghidorahrex
4c7c3adf5a GT-3276: Fixed AVR8 addition/subtraction flag macros 2020-03-18 13:54:36 -04:00
ghidorahrex
ddc63770b9 Merge remote-tracking branch 'origin/GT-3466_ghidorahrex_fix_export_const' 2020-03-04 14:26:27 -05:00
ghidorahrex
3c8f2bdeff Merge remote-tracking branch 'origin/GT-933_ghidorahrex_correct_atmega256_pspec' 2020-02-13 08:06:45 -05:00
ghidorahrex
dcd5296041 GT-933: Code review fixes for atmega SP memory addresses in .pspec 2020-02-07 14:55:16 -05:00
ghidorahrex
b06ca0c971 GT-3466: fixed exporting const local vars in avr32 2020-02-07 13:32:34 -05:00
comet
af50a7e615 update 2020-01-29 11:26:10 -05:00
mumbel
dce6e9f6a8 Cleaning up warnings and errors, mostly looking for:
temporary is written but not read in constructor
2020-01-22 19:51:45 -06:00
ghidorahrex
6ca9eafd1d GT-933: Corrected AVR8 atmega256 memory layout in .pspec 2020-01-17 11:38:46 -05:00
Austin Roach
2dd6b50a38 Fix typo in AVR8.idx 2020-01-14 07:46:05 -05:00
ghidorahrex
2272627787 GT-3311: Merged changes to operand sizing 2019-12-02 12:41:34 -05:00
Austin Roach
3bad6f753f AVR8: Improve operands for load/store instructions
Currently, the operators for post-incremented or offset source operands
associated with various memory access instructions are separators
rather than components of the operand. As a result, inferred references
split the register and the operator when rendered in the listing, making
it easy to overlook the operator. For example:

lpm R0,Z=>DAT_code_000455+

This patch mimics logic already in place for the st and std
instructions, which include the post-increment operator or offset as
part of the operand. For example:

st X+=>DAT_mem_0100,R0
2019-12-02 09:58:39 -05:00
ghidra1
ee25a7d0cc Merge remote-tracking branch 'origin/patch' 2019-11-26 12:37:20 -05:00
Roi Martin
7946ec5f62 AVR8: Fix lpm/elpm implementation in SLEIGH specification
When Z & 0x1 == 1, the dereferenced data must be right-shifted 8 bits
before assigning val:1 to the target register.

When Z & 0x0 == 0, val:1 is assigned to the target register straight
away.

In short, we can reduce these conditions to:

	tmp:2 = *[code]:2 (ptr >> 1);
	val:2 = (tmp >> (8 * (Z & 0x1)));
	R0 = val:1;

NOTE: Author's original commit was modified to address conflicts and a necessary rebase. -ryanmkurtz
2019-11-25 09:59:51 -05:00
ghidra1
1b1240a41b GT-3328 corrected sleighArgs.txt use with module dependency paths 2019-11-19 15:11:30 -05:00
Ryan Kurtz
fa48768e77 GT-3106: Fixing avr8.opinion XML parse error 2019-11-05 12:27:40 -05:00
Ryan Kurtz
0a56eae9f6 Merge remote-tracking branch 'origin/GT-3106_ghidorahrex_AVR8_pcodetests' 2019-11-01 10:03:33 -04:00