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Merge remote-tracking branch
'origin/GP-1112_ghidorahrex_PR-3170_agatti_65c02' (Closes #1261, Closes #3170)
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commit
8da56f71ae
@ -4,4 +4,6 @@ data/languages/6502.cspec||GHIDRA||||END|
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data/languages/6502.ldefs||GHIDRA||||END|
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data/languages/6502.pspec||GHIDRA||||END|
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data/languages/6502.slaspec||GHIDRA||||END|
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data/languages/65c02.slaspec||GHIDRA||||END|
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data/manuals/6502.idx||GHIDRA||||END|
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data/manuals/65c02.idx||GHIDRA||||END|
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@ -14,24 +14,20 @@
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<description>6502 Microcontroller Family</description>
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<compiler name="default" spec="6502.cspec" id="default"/>
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<external_name tool="IDA-PRO" name="m6502"/>
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<external_name tool="IDA-PRO" name="m65c02"/>
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</language>
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<!-- The following entry has a very misleading language id but
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can not be removed since it may have already been referenced.
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This entry has been marked deprecated to avoid its use in the future.
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-->
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<language deprecated="true"
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processor="6502"
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<language processor="65C02"
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endian="little"
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size="16"
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variant="default"
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version="1.0"
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slafile="6502.sla"
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slafile="65c02.sla"
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processorspec="6502.pspec"
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id="6502:BE:16:default">
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<description>6502 Microcontroller Family</description>
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manualindexfile="../manuals/65c02.idx"
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id="65C02:LE:16:default">
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<description>65C02 Microcontroller Family</description>
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<compiler name="default" spec="6502.cspec" id="default"/>
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<external_name tool="IDA-PRO" name="m65c02"/>
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</language>
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</language_definitions>
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220
Ghidra/Processors/6502/data/languages/65c02.slaspec
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220
Ghidra/Processors/6502/data/languages/65c02.slaspec
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@ -0,0 +1,220 @@
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@include "6502.slaspec"
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define token bitopbyte (8)
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bitop = (0,7)
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action = (7,7)
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bitindex = (4,6) dec
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optype = (0,3)
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;
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define token testopbyte (8)
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top = (0, 7)
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taaa = (5, 7)
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td = (4, 4)
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tbb = (2, 3)
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tcc = (0, 1)
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;
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################################################################
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# Zero Page Indirect
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ZIOP: (imm8) is bbb=4; imm8 { addr:2 = imm8; tmp:2 = *:2 addr; export *:1 tmp; }
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OPTB: imm8 is tbb=1; imm8 { export *:1 imm8; }
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OPTB: imm16 is tbb=3; imm16 { export *:1 imm16; }
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# Absolute Indexed Indirect
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ADDRIX: (imm16,X) is X; imm16 { addr:2 = imm16 + zext(X); tmp:2 = *:2 addr; export tmp; }
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# Instructions
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:ADC ZIOP is (cc=2 & aaa=3) ... & ZIOP
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{
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local op1 = ZIOP;
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local tmpC = C;
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C = carry(A, op1);
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A = A + op1 + tmpC;
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resultFlags(A);
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V = C;
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}
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:AND ZIOP is (cc=2 & aaa=1) ... & ZIOP
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{
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A = A & ZIOP;
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resultFlags(A);
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}
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:BBR "#"bitindex, imm8, REL is (action=0 & optype=0xF) & bitindex ; imm8 ; REL {
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local ptr:2 = imm8;
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local value:1 = *:1 ptr;
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local jump = (value & (1 << bitindex)) == 0;
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if (jump) goto REL;
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}
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:BBS "#"bitindex, imm8, REL is (action=1 & optype=0xF) & bitindex ; imm8 ; REL {
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local ptr:2 = imm8;
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local value:1 = *:1 ptr;
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local jump = (value & (1 << bitindex)) != 0;
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if (jump) goto REL;
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}
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:BIT "#"imm8 is op=0x89; imm8
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{
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local value:1 = imm8;
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N = (value & 0x80) == 0x80;
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V = (value & 0x40) == 0x40;
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value = A & value;
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Z = (value == 0);
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}
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:BIT OP2 is (op=0x34 | op=0x3C) ... & OP2
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{
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N = (OP2 & 0x80) == 0x80;
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V = (OP2 & 0x40) == 0x40;
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local value = A & OP2;
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Z = (value == 0);
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}
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:BRA REL is op=0x80; REL
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{
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goto REL;
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}
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:CMP ZIOP is (cc=2 & aaa=6) ... & ZIOP
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{
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local op1 = ZIOP;
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local tmp = A - op1;
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resultFlags(tmp);
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C = (A >= op1);
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}
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:DEC A is op=0x3A & A
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{
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local tmp = A - 1;
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A = tmp;
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resultFlags(tmp);
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}
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:EOR ZIOP is (cc=2 & aaa=2) ... & ZIOP
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{
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local op1 = ZIOP;
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A = A ^ op1;
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resultFlags(A);
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}
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:INC A is op=0x1A & A
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{
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A = A + 1;
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resultFlags(A);
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}
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:JMP ADDRIX is (op=0x7C); ADDRIX
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{
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goto [ADDRIX];
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}
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:LDA ZIOP is (cc=2 & aaa=5) ... & ZIOP
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{
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A = ZIOP;
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resultFlags(A);
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}
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:ORA ZIOP is (cc=2 & aaa=0) ... & ZIOP
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{
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A = A | ZIOP;
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resultFlags(A);
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}
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:PHX is op=0xDA
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{
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*:1 (SP) = X;
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SP = SP - 1;
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}
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:PLX is op=0xFA
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{
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SP = SP + 1;
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X = *:1 (SP);
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resultFlags(X);
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}
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:PHY is op=0x5A
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{
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*:1 (SP) = Y;
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SP = SP - 1;
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}
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:PLY is op=0x7A
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{
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SP = SP + 1;
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Y = *:1 (SP);
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resultFlags(Y);
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}
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:RMB "#"bitindex, imm8 is (action=0 & optype=7) & bitindex ; imm8 {
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local ptr:2 = imm8;
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local value:1 = *:1 ptr;
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value = value & ~(1 << bitindex);
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*:1 ptr = value;
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}
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:SBC ZIOP is (cc=2 & aaa=7) ... & ZIOP
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{
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local op1 = ZIOP;
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local result = A - op1 - !C;
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subtraction_flags1(A, op1, result);
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A = result;
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}
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:SMB "#"bitindex, imm8 is (action=1 & optype=7) & bitindex ; imm8 {
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local ptr:2 = imm8;
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local value:1 = *:1 ptr;
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value = value | (1 << bitindex);
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*:1 ptr = value;
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}
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:STA ZIOP is (cc=2 & aaa=4) ... & ZIOP
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{
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ZIOP = A;
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}
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:STZ imm8 is op=0x64 ; imm8
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{
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local tmp:2 = imm8;
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*:1 tmp = 0;
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}
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:STZ imm8,X is op=0x74 & X ; imm8
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{
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local tmp:2 = zext(imm8 + X);
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*:1 tmp = 0;
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}
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:STZ imm16 is op=0x9C ; imm16
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{
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local tmp:2 = imm16;
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*:1 tmp = 0;
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}
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:STZ imm16,X is op=0x9E & X ; imm16
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{
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local tmp:2 = imm16 + zext(X);
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*:1 tmp = 0;
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}
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:TRB OPTB is (tcc=0 & taaa=0 & td=1) ... & OPTB
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{
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local op1 = OPTB;
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local result = A & ~op1;
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Z = result == 0;
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}
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:TSB OPTB is (tcc=0 & taaa=0 & td=0) ... & OPTB
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{
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local op1 = OPTB;
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local result = A | op1;
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Z = result == 0;
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}
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69
Ghidra/Processors/6502/data/manuals/65c02.idx
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69
Ghidra/Processors/6502/data/manuals/65c02.idx
Normal file
@ -0,0 +1,69 @@
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@wdc_65816_programming_manual.pdf [Programming the 65816 - Including the 6502, 65C02 and 65802, 2007]
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ADC, 327
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AND, 328
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ASL, 329
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BBR, 457
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BBS, 458
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BCC, 330
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BCS, 331
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BEQ, 332
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BIT, 333
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BMI, 334
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BNE, 335
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BPL, 336
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BRA, 337
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BRK, 338
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BVC, 341
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BVS, 342
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CLC, 343
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CLD, 344
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CLI, 345
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CLV, 346
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CMP, 347
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CPX, 350
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CPY, 351
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DEC, 352
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DEX, 353
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DEY, 354
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EOR, 355
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INC, 357
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INX, 358
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INY, 359
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JMP, 360
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JSR, 362
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LDA, 363
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LDX, 364
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LDY, 365
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LSR, 366
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NOP, 369
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ORA, 370
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PHA, 375
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PHP, 379
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PHX, 380
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PHY, 381
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PLA, 382
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PLP, 385
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PLX, 386
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PLY, 387
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RMB, 459
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ROL, 389
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ROR, 390
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RTI, 391
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RTS, 393
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SBC, 395
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SEC, 397
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SED, 398
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SEI, 399
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SMB, 460
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STA, 401
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STX, 403
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STY, 404
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STZ, 405
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TAX, 406
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TAY, 407
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TRB, 411
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TSB, 412
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TSX, 414
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TXA, 415
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TXS, 416
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TYA, 418
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