Merge branch 'GP-0_ryanmkurtz_PR-6979_hippietrail_sleigh-doc-fixes'

This commit is contained in:
Ryan Kurtz 2024-10-03 11:25:54 -04:00
commit 5f4c1824e2
3 changed files with 6 additions and 6 deletions

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@ -83,7 +83,7 @@ plugins are installed. From Eclipse:</p>
<ol> <ol>
<p>To build the Sleigh Editor, follow the instructions in ghidra/DevGuide.md to setup eclipse <p>To build the Sleigh Editor, follow the instructions in ghidra/DevGuide.md to setup eclipse
for development. Then follow the directions in for development. Then follow the directions in
<i>ghidra/GhidraBuild/EclipsePlugins/GhidraSleighEditor/ghidra.xtext.sleigh.feature/build_README.txt</i>.</p> <i>ghidra/GhidraBuild/EclipsePlugins/GhidraSleighEditor/ghidra.xtext.sleigh/build_README.txt</i>.</p>
</ol> </ol>
<h2><a name="Uninstall"></a>Uninstalling</h2> <h2><a name="Uninstall"></a>Uninstalling</h2>

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@ -234,7 +234,7 @@ Many processors define registers that either consist of a single bit
or otherwise don't use an integral number of bytes. A recurring or otherwise don't use an integral number of bytes. A recurring
example in many processors is the status register which is further example in many processors is the status register which is further
subdivided into the overflow and result flags for the arithmetic subdivided into the overflow and result flags for the arithmetic
instructions. These flags are typically have labels like ZF for the instructions. These flags typically have labels like ZF for the
zero flag or CF for the carry flag and can be considered logical zero flag or CF for the carry flag and can be considered logical
registers contained within the status register. SLEIGH allows registers contained within the status register. SLEIGH allows
registers to be defined like this using registers to be defined like this using

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@ -194,10 +194,10 @@ We list all of the symbols that are predefined by SLEIGH.
<p> <p>
The most important of these to be aware of The most important of these to be aware of
are <span class="emphasis"><em>inst_start</em></span> are <span class="emphasis"><em>inst_start</em></span>
and <span class="emphasis"><em>inst_next</em></span>. These are family symbols which map and <span class="emphasis"><em>inst_next</em></span>. These are family
in the context of particular instruction to the integer offset of symbols that map to the integer offset of either the instruction's
either the address of the instruction or the address of the next address or the next instruction's address, depending on the context
instruction respectively. These are used in any relative branching of a particular instruction. These are used in any relative branching
situation. The <span class="emphasis"><em>inst_next2</em></span> is intended for conditional situation. The <span class="emphasis"><em>inst_next2</em></span> is intended for conditional
skip instruction situations. The remaining symbols are rarely skip instruction situations. The remaining symbols are rarely
used. The <span class="emphasis"><em>const</em></span> and <span class="emphasis"><em>unique</em></span> used. The <span class="emphasis"><em>const</em></span> and <span class="emphasis"><em>unique</em></span>