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AArch32: fixed A32 mode rn pc offset
* rn has an offset of 8bytes for A32 when rn == 15 and not CONSTRAINED UNPREDICTABLE (eg, thumb mode)
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@ -3463,22 +3463,22 @@ vldmDdList: "{"^buildVldmDdList^"}" is TMode=1 & thv_D22 & thv_c1215 & thv_c0007
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@if defined(VERSION_8)
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with : TMode=0 {
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fldmSet1: Dd_1 is Rn & Dd_1 { Dd_1 = * Rn; }
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fldmSet2: Dd_2 is Rn & Dd_2 & fldmSet1 { build fldmSet1; Dd_2 = *:8 (Rn + 8:4); }
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fldmSet3: Dd_3 is Rn & Dd_3 & fldmSet2 { build fldmSet2; Dd_3 = *:8 (Rn + 16:4); }
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fldmSet4: Dd_4 is Rn & Dd_4 & fldmSet3 { build fldmSet3; Dd_4 = *:8 (Rn + 24:4); }
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fldmSet5: Dd_5 is Rn & Dd_5 & fldmSet4 { build fldmSet4; Dd_5 = *:8 (Rn + 32:4); }
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fldmSet6: Dd_6 is Rn & Dd_6 & fldmSet5 { build fldmSet5; Dd_6 = *:8 (Rn + 40:4); }
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fldmSet7: Dd_7 is Rn & Dd_7 & fldmSet6 { build fldmSet6; Dd_7 = *:8 (Rn + 48:4); }
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fldmSet8: Dd_8 is Rn & Dd_8 & fldmSet7 { build fldmSet7; Dd_8 = *:8 (Rn + 56:4); }
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fldmSet9: Dd_9 is Rn & Dd_9 & fldmSet8 { build fldmSet8; Dd_9 = *:8 (Rn + 64:4); }
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fldmSet10: Dd_10 is Rn & Dd_10 & fldmSet9 { build fldmSet9; Dd_10 = *:8 (Rn + 72:4); }
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fldmSet11: Dd_11 is Rn & Dd_11 & fldmSet10 { build fldmSet10; Dd_11 = *:8 (Rn + 80:4); }
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fldmSet12: Dd_12 is Rn & Dd_12 & fldmSet11 { build fldmSet11; Dd_12 = *:8 (Rn + 88:4); }
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fldmSet13: Dd_13 is Rn & Dd_13 & fldmSet12 { build fldmSet12; Dd_13 = *:8 (Rn + 96:4); }
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fldmSet14: Dd_14 is Rn & Dd_14 & fldmSet13 { build fldmSet13; Dd_14 = *:8 (Rn + 104:4); }
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fldmSet15: Dd_15 is Rn & Dd_15 & fldmSet14 { build fldmSet14; Dd_15 = *:8 (Rn + 112:4); }
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fldmSet16: Dd_16 is Rn & Dd_16 & fldmSet15 { build fldmSet15; Dd_16 = *:8 (Rn + 120:4); }
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fldmSet1: Dd_1 is rn & Dd_1 { Dd_1 = * rn; }
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fldmSet2: Dd_2 is rn & Dd_2 & fldmSet1 { build fldmSet1; Dd_2 = *:8 (rn + 8:4); }
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fldmSet3: Dd_3 is rn & Dd_3 & fldmSet2 { build fldmSet2; Dd_3 = *:8 (rn + 16:4); }
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fldmSet4: Dd_4 is rn & Dd_4 & fldmSet3 { build fldmSet3; Dd_4 = *:8 (rn + 24:4); }
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fldmSet5: Dd_5 is rn & Dd_5 & fldmSet4 { build fldmSet4; Dd_5 = *:8 (rn + 32:4); }
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fldmSet6: Dd_6 is rn & Dd_6 & fldmSet5 { build fldmSet5; Dd_6 = *:8 (rn + 40:4); }
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fldmSet7: Dd_7 is rn & Dd_7 & fldmSet6 { build fldmSet6; Dd_7 = *:8 (rn + 48:4); }
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fldmSet8: Dd_8 is rn & Dd_8 & fldmSet7 { build fldmSet7; Dd_8 = *:8 (rn + 56:4); }
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fldmSet9: Dd_9 is rn & Dd_9 & fldmSet8 { build fldmSet8; Dd_9 = *:8 (rn + 64:4); }
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fldmSet10: Dd_10 is rn & Dd_10 & fldmSet9 { build fldmSet9; Dd_10 = *:8 (rn + 72:4); }
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fldmSet11: Dd_11 is rn & Dd_11 & fldmSet10 { build fldmSet10; Dd_11 = *:8 (rn + 80:4); }
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fldmSet12: Dd_12 is rn & Dd_12 & fldmSet11 { build fldmSet11; Dd_12 = *:8 (rn + 88:4); }
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fldmSet13: Dd_13 is rn & Dd_13 & fldmSet12 { build fldmSet12; Dd_13 = *:8 (rn + 96:4); }
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fldmSet14: Dd_14 is rn & Dd_14 & fldmSet13 { build fldmSet13; Dd_14 = *:8 (rn + 104:4); }
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fldmSet15: Dd_15 is rn & Dd_15 & fldmSet14 { build fldmSet14; Dd_15 = *:8 (rn + 112:4); }
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fldmSet16: Dd_16 is rn & Dd_16 & fldmSet15 { build fldmSet15; Dd_16 = *:8 (rn + 120:4); }
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fldmSet: "{"^Dd_1^"}" is Dd_1 & c0007=3 & fldmSet1 { build fldmSet1; }
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fldmSet: "{"^Dd_1^"-"^fldmSet2^"}" is Dd_1 & c0007=5 & fldmSet2 { build fldmSet2; }
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@ -3569,22 +3569,22 @@ fldmWback: thv_Rn is thv_bit21=0 & thv_Rn { }
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}
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with : TMode=0 {
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fstmSet1: Dd_1 is Rn & Dd_1 { * Rn = Dd_1; }
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fstmSet2: Dd_2 is Rn & Dd_2 & fstmSet1 { build fstmSet1; *:8 (Rn + 8:4) = Dd_2; }
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fstmSet3: Dd_3 is Rn & Dd_3 & fstmSet2 { build fstmSet2; *:8 (Rn + 16:4) = Dd_3; }
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fstmSet4: Dd_4 is Rn & Dd_4 & fstmSet3 { build fstmSet3; *:8 (Rn + 24:4) = Dd_4; }
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fstmSet5: Dd_5 is Rn & Dd_5 & fstmSet4 { build fstmSet4; *:8 (Rn + 32:4) = Dd_5; }
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fstmSet6: Dd_6 is Rn & Dd_6 & fstmSet5 { build fstmSet5; *:8 (Rn + 40:4) = Dd_6; }
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fstmSet7: Dd_7 is Rn & Dd_7 & fstmSet6 { build fstmSet6; *:8 (Rn + 48:4) = Dd_7; }
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fstmSet8: Dd_8 is Rn & Dd_8 & fstmSet7 { build fstmSet7; *:8 (Rn + 56:4) = Dd_8; }
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fstmSet9: Dd_9 is Rn & Dd_9 & fstmSet8 { build fstmSet8; *:8 (Rn + 64:4) = Dd_9; }
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fstmSet10: Dd_10 is Rn & Dd_10 & fstmSet9 { build fstmSet9; *:8 (Rn + 72:4) = Dd_10; }
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fstmSet11: Dd_11 is Rn & Dd_11 & fstmSet10 { build fstmSet10; *:8 (Rn + 80:4) = Dd_11; }
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fstmSet12: Dd_12 is Rn & Dd_12 & fstmSet11 { build fstmSet11; *:8 (Rn + 88:4) = Dd_12; }
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fstmSet13: Dd_13 is Rn & Dd_13 & fstmSet12 { build fstmSet12; *:8 (Rn + 96:4) = Dd_13; }
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fstmSet14: Dd_14 is Rn & Dd_14 & fstmSet13 { build fstmSet13; *:8 (Rn + 104:4) = Dd_14; }
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fstmSet15: Dd_15 is Rn & Dd_15 & fstmSet14 { build fstmSet14; *:8 (Rn + 112:4) = Dd_15; }
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fstmSet16: Dd_16 is Rn & Dd_16 & fstmSet15 { build fstmSet15; *:8 (Rn + 120:4) = Dd_16; }
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fstmSet1: Dd_1 is rn & Dd_1 { * rn = Dd_1; }
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fstmSet2: Dd_2 is rn & Dd_2 & fstmSet1 { build fstmSet1; *:8 (rn + 8:4) = Dd_2; }
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fstmSet3: Dd_3 is rn & Dd_3 & fstmSet2 { build fstmSet2; *:8 (rn + 16:4) = Dd_3; }
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fstmSet4: Dd_4 is rn & Dd_4 & fstmSet3 { build fstmSet3; *:8 (rn + 24:4) = Dd_4; }
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fstmSet5: Dd_5 is rn & Dd_5 & fstmSet4 { build fstmSet4; *:8 (rn + 32:4) = Dd_5; }
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fstmSet6: Dd_6 is rn & Dd_6 & fstmSet5 { build fstmSet5; *:8 (rn + 40:4) = Dd_6; }
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fstmSet7: Dd_7 is rn & Dd_7 & fstmSet6 { build fstmSet6; *:8 (rn + 48:4) = Dd_7; }
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fstmSet8: Dd_8 is rn & Dd_8 & fstmSet7 { build fstmSet7; *:8 (rn + 56:4) = Dd_8; }
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fstmSet9: Dd_9 is rn & Dd_9 & fstmSet8 { build fstmSet8; *:8 (rn + 64:4) = Dd_9; }
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fstmSet10: Dd_10 is rn & Dd_10 & fstmSet9 { build fstmSet9; *:8 (rn + 72:4) = Dd_10; }
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fstmSet11: Dd_11 is rn & Dd_11 & fstmSet10 { build fstmSet10; *:8 (rn + 80:4) = Dd_11; }
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fstmSet12: Dd_12 is rn & Dd_12 & fstmSet11 { build fstmSet11; *:8 (rn + 88:4) = Dd_12; }
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fstmSet13: Dd_13 is rn & Dd_13 & fstmSet12 { build fstmSet12; *:8 (rn + 96:4) = Dd_13; }
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fstmSet14: Dd_14 is rn & Dd_14 & fstmSet13 { build fstmSet13; *:8 (rn + 104:4) = Dd_14; }
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fstmSet15: Dd_15 is rn & Dd_15 & fstmSet14 { build fstmSet14; *:8 (rn + 112:4) = Dd_15; }
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fstmSet16: Dd_16 is rn & Dd_16 & fstmSet15 { build fstmSet15; *:8 (rn + 120:4) = Dd_16; }
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fstmSet: "{"^Dd_1^"}" is Dd_1 & c0007=3 & fstmSet1 { build fstmSet1; }
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fstmSet: "{"^Dd_1^"-"^fstmSet2^"}" is Dd_1 & c0007=5 & fstmSet2 { build fstmSet2; }
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