From 165334c9c9a46508e3e8f1cde3d0c63983e2f043 Mon Sep 17 00:00:00 2001 From: Alessandro Gatti Date: Wed, 13 May 2020 22:25:31 +0200 Subject: [PATCH] Use just one memory access for SDBD reads/writes. --- .../CP1600/data/languages/CP1600.slaspec | 24 ++++++++++--------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/Ghidra/Processors/CP1600/data/languages/CP1600.slaspec b/Ghidra/Processors/CP1600/data/languages/CP1600.slaspec index 94b7495a54..5003b321f6 100644 --- a/Ghidra/Processors/CP1600/data/languages/CP1600.slaspec +++ b/Ghidra/Processors/CP1600/data/languages/CP1600.slaspec @@ -78,25 +78,27 @@ impliedval16: reg3_5 is reg3_5 & target3_5=6 & doublebyte=0 { } impliedval16: reg3_5 is reg3_5 & (target3_5=4 | target3_5=5) & doublebyte=1 { - local tmp:2 = zext(*:1 reg3_5); - reg3_5 = reg3_5 + 1; - tmp = tmp | (zext(*:1 reg3_5) << 8); - reg3_5 = reg3_5 + 1; + local val:4 = *:4 reg3_5; + local low:1 = val(2); + local high:1 = val(0); + local tmp:2 = (zext(high) << 8) | zext(low); + reg3_5 = reg3_5 + 2; export tmp; } impliedval16: reg3_5 is reg3_5 & target3_5=6 & doublebyte=1 { - reg3_5 = reg3_5 - 1; - local tmp:2 = zext(*:1 reg3_5); - reg3_5 = reg3_5 - 1; - tmp = tmp | (zext(*:1 reg3_5) << 8); + reg3_5 = reg3_5 - 2; + local val:4 = *:4 reg3_5; + local low:1 = val(2); + local high:1 = val(0); + local tmp:2 = (zext(high) << 8) | zext(low); export tmp; } impliedval16: reg3_5 is reg3_5 & (target3_5=0 | target3_5=1 | target3_5=2 | target3_5=3 | target3_5=7) & doublebyte=1 { - local tmp:2 = zext(*:1 reg3_5); - tmp = tmp | (zext(*:1 reg3_5) << 8); - export tmp; + local val:2 = *:1 reg3_5; + val = (zext(val) << 8) | zext(val); + export val; } checkbranch: is reg0_2=7 { goto [R7]; }