rvc/dts.dts
Stefan 7f47c7655d Add rust_payload and fixes to allow running it as supervisor
Note that the 'riscv32ima-unknown-none-elf' target is not available by
default in rustc, you need a patched version.

I'm also pretty sure just converting the ELF binary to raw using objdump
messes with stack and heap addresses, but it seems to work fine for now.
2021-06-09 18:38:46 +02:00

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/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "riscv-virtio";
model = "generic,rvc";
chosen {
bootargs = "ttyS0";
stdout-path = "/uart@10000000";
};
uart@10000000 {
interrupts = <0x1>;
interrupt-parent = <0x2>;
clock-frequency = <0x384000>;
reg = <0x0 0x10000000 0x0 0x100>;
compatible = "ns16550a";
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
timebase-frequency = <0x989680>;
cpu-map {
cluster0 {
core0 {
cpu = <0x1>;
};
};
};
cpu@0 {
phandle = <0x1>;
device_type = "cpu";
reg = <0x0>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imasu";
interrupt-controller {
phandle = <0x2>;
#interrupt-cells = <0x1>;
interrupt-controller;
compatible = "riscv,cpu-intc";
};
};
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x8000000>;
};
soc {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
clint@2000000 {
interrupts-extended = <0x2 0x3 0x2 0x7>;
reg = <0x0 0x2000000 0x0 0x10000>;
compatible = "riscv,clint0";
};
};
};