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A 32 bit RISC-V emulator made using a shader
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Stefan 64e2d0b45c initial commit 
passes all RV32IM tests (run './test.sh all')

instructions.txt is extracted from takahirox/riscv-rust
2021-05-28 15:10:51 +02:00
elfy initial commit 2021-05-28 15:10:51 +02:00
riscv-opcodes@7d1a0e3153 initial commit 2021-05-28 15:10:51 +02:00
riscv-tests@09cfdaacd9 initial commit 2021-05-28 15:10:51 +02:00
src initial commit 2021-05-28 15:10:51 +02:00
.gitignore initial commit 2021-05-28 15:10:51 +02:00
.gitmodules initial commit 2021-05-28 15:10:51 +02:00
instructions.txt initial commit 2021-05-28 15:10:51 +02:00
Makefile initial commit 2021-05-28 15:10:51 +02:00
parse_ins.pl initial commit 2021-05-28 15:10:51 +02:00
test.sh initial commit 2021-05-28 15:10:51 +02:00