mirror of
https://github.com/PiMaker/rvc.git
synced 2024-11-24 21:20:09 +00:00
fixups and CSR memcpy test in bare_metal_test
This commit is contained in:
parent
4bf645734e
commit
1f614a46b5
26
Makefile
26
Makefile
@ -17,16 +17,6 @@ CFLAGS=-g
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$(TARGET): $(OBJS)
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$(TARGET): $(OBJS)
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$(CC) $(LDFLAGS) -I./elfy/elfy.h $(OBJS) -o $@ $(LOADLIBES) $(LDLIBS) -L./elfy/target/release/ -Wl,--no-as-needed -ldl -lpthread -lelfy
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$(CC) $(LDFLAGS) -I./elfy/elfy.h $(OBJS) -o $@ $(LOADLIBES) $(LDLIBS) -L./elfy/target/release/ -Wl,--no-as-needed -ldl -lpthread -lelfy
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.PHONY: clean
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clean:
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$(RM) $(TARGET) $(OBJS) $(DEPS)
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.PHONY: distclean
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distclean: clean
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$(RM) $(TARGET) $(OBJS) $(DEPS) *_payload.*
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$(MAKE) -C opensbi clean
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$(MAKE) -C linux clean
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-include $(DEPS)
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-include $(DEPS)
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# build device tree
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# build device tree
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@ -39,9 +29,9 @@ LINUX_PAYLOAD=linux/arch/riscv/boot/Image
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BUILDROOT_MARKER=buildroot-2021.05/build.marker
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BUILDROOT_MARKER=buildroot-2021.05/build.marker
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$(BUILDROOT_MARKER):
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$(BUILDROOT_MARKER):
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$(MAKE) -C buildroot-2021.05 make
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$(MAKE) -C buildroot-2021.05
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cd buildroot-2021.05 && cp init output/target/ && cp pi.js output/target/
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cd buildroot-2021.05 && cp init output/target/ && cp pi.js output/target/
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$(MAKE) -C buildroot-2021.05 make
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$(MAKE) -C buildroot-2021.05
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touch $@
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touch $@
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$(PAYLOAD): $(shell find rust_payload/src -type f)
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$(PAYLOAD): $(shell find rust_payload/src -type f)
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@ -101,3 +91,15 @@ run: fw_payload.bin $(TARGET) dts.dtb
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run-v1: fw_payload.bin $(TARGET) dts.dtb
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run-v1: fw_payload.bin $(TARGET) dts.dtb
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./rvc -b fw_payload.bin -d dts.dtb -v1
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./rvc -b fw_payload.bin -d dts.dtb -v1
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.PHONY: clean
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clean:
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$(RM) $(TARGET) $(OBJS) $(DEPS)
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.PHONY: distclean
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distclean: clean
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$(RM) $(TARGET) $(OBJS) $(DEPS) *_payload.*
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$(MAKE) -C opensbi clean
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$(MAKE) -C linux clean
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$(RM) $(BUILDROOT_MARKER)
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@ -15,7 +15,7 @@ DEPS := $(OBJS:.o=.d)
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INC_DIRS := $(shell find $(SRC_DIRS) -type d)
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INC_DIRS := $(shell find $(SRC_DIRS) -type d)
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INC_FLAGS := $(addprefix -I,$(INC_DIRS))
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INC_FLAGS := $(addprefix -I,$(INC_DIRS))
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CFLAGS += -O3 -march=rv32ima -mabi=ilp32 -fno-stack-protector -fno-pie
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CFLAGS += -O2 -march=rv32ima -mabi=ilp32 -fno-stack-protector -fno-pie
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ASFLAGS += -march=rv32ima -mabi=ilp32
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ASFLAGS += -march=rv32ima -mabi=ilp32
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LDFLAGS += -static -nostdlib -nostartfiles -nodefaultlibs -Triscv32.ld -Wl,--no-as-needed
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LDFLAGS += -static -nostdlib -nostartfiles -nodefaultlibs -Triscv32.ld -Wl,--no-as-needed
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Binary file not shown.
@ -16,26 +16,89 @@ void print(const char* str) {
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}
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}
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}
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}
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void print_hex(unsigned int number) {
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for (int i = 0; i < 8; i++) {
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switch (number & 0xF0000000) {
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case 0x00000000: uart_putc('0'); break;
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case 0x10000000: uart_putc('1'); break;
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case 0x20000000: uart_putc('2'); break;
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case 0x30000000: uart_putc('3'); break;
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case 0x40000000: uart_putc('4'); break;
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case 0x50000000: uart_putc('5'); break;
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case 0x60000000: uart_putc('6'); break;
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case 0x70000000: uart_putc('7'); break;
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case 0x80000000: uart_putc('8'); break;
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case 0x90000000: uart_putc('9'); break;
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case 0xA0000000: uart_putc('A'); break;
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case 0xB0000000: uart_putc('B'); break;
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case 0xC0000000: uart_putc('C'); break;
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case 0xD0000000: uart_putc('D'); break;
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case 0xE0000000: uart_putc('E'); break;
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case 0xF0000000: uart_putc('F'); break;
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}
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number <<= 4;
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}
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}
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static bool got_ssip = false;
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static bool got_ssip = false;
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volatile static long long a = 0xaaaaffffffff;
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volatile static long long a = 0xaaaaffffffff;
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static int pattern_good = 0x12345678;
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static int pattern_bad = 0xdeadbeef;
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static char print_buf[256];
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// runs in supervisor mode via mideleg (machine-mode trap delegation)
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// runs in supervisor mode via mideleg (machine-mode trap delegation)
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void handle_trap(void) {
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void handle_trap(void) {
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print("[bare/trap] got SSIP!\n");
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print("[bare/trap] got SSIP!\n");
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got_ssip = true;
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got_ssip = true;
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}
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}
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// byte-for-byte memcpy
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void memcpy_manual(unsigned char *dst, const unsigned char* src, int n) {
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for (int i = 0; i < n; i++) {
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dst[i] = src[i];
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}
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}
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// CSR-based memcpy
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void memcpy_csr(unsigned char *dst, const unsigned char* src, int n) {
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print("[bare/memcpy_csr] src=0x");
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print_hex((unsigned int)src);
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print(" dst=0x");
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print_hex((unsigned int)dst);
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print("\n");
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__asm volatile ("csrw 0x0b1, %0" :: "r" (src));
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__asm volatile ("csrw 0x0b2, %0" :: "r" (dst));
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__asm volatile ("csrw 0x0b3, %0" :: "r" (n));
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__asm volatile ("csrw 0x0b0, %0" :: "r" (1) : "memory");
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}
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// called from assembly, runs in supervisor mode (via sret)
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// called from assembly, runs in supervisor mode (via sret)
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int main(void) {
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int main(void) {
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print("[bare] in main()\n");
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print("[bare] in main()\n");
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print("[bare] testing printing...\n[bare] 0x");
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print_hex(0xabcd1234);
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uart_putc('\n');
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print("[bare] testing arithmetic...\n");
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print("[bare] testing arithmetic...\n");
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long long b = a * 400LLU * -1;
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long long b = a * 400LLU * -1;
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if (b != -0x10AAB2FFFFFFE70LL) {
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if (b != -0x10AAB2FFFFFFE70LL) {
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print("[bare] got wrong result :(\n");
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print("[bare/error] got wrong result :(\n[bare/error] low=0x");
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print_hex((unsigned int)b);
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print("\n[bare/error] high=0x");
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print_hex((unsigned int)(b >> 32));
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print("\n");
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__asm volatile ("ebreak");
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while (true) {}
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} else {
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} else {
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print("[bare] got correct result!\n");
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print("[bare] got correct result!\n[bare] low=0x");
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print_hex((unsigned int)b);
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print("\n[bare] high=0x");
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print_hex((unsigned int)(b >> 32));
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print("\n");
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}
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}
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print("[bare] testing trap handler...\n");
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print("[bare] testing trap handler...\n");
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@ -43,6 +106,52 @@ int main(void) {
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while (!got_ssip) {}
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while (!got_ssip) {}
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print("[bare] testing memcpy...\n");
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int src[128];
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int dst_man[128];
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int dst_csr[128];
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for (int i = 0; i < 128; i++) {
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src[i] = pattern_good;
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dst_man[i] = pattern_bad;
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dst_csr[i] = pattern_bad;
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}
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memcpy_manual((unsigned char*)dst_man,
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(const unsigned char*)src,
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sizeof(src));
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memcpy_csr((unsigned char*)dst_csr,
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(const unsigned char*)src,
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sizeof(src));
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for (int i = 0; i < 128; i++) {
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int bad = ~0;
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if (dst_man[i] != src[i] || dst_man[i] != pattern_good) {
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print("[bare/error] memcpy (manual) failed\n");
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bad = dst_man[i];
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}
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if (dst_csr[i] != src[i] || dst_csr[i] != pattern_good) {
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print("[bare/error] memcpy (CSR) failed\n");
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bad = dst_csr[i];
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}
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if (bad != (~0)) {
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print("[bare/error] dst[0x");
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print_hex(i);
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print("] = 0x");
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print_hex(bad);
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print(" src[0x");
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print_hex(i);
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print("] = 0x");
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print_hex(src[i]);
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print("\n");
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__asm volatile ("ebreak");
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while (true) {}
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}
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}
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print("[bare] selftest done!\n");
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print("[bare] selftest done!\n");
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print("[bare] now go run something more exciting...\n");
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print("[bare] now go run something more exciting...\n");
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@ -88,7 +88,7 @@ _s_trap_entry:
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STORE t2, 34*REGBYTES(x2)
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STORE t2, 34*REGBYTES(x2)
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STORE t3, 35*REGBYTES(x2)
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STORE t3, 35*REGBYTES(x2)
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move a0, sp
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mv a0, sp
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jal handle_trap
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jal handle_trap
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mv a0, sp
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mv a0, sp
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@ -101,7 +101,6 @@ _s_trap_entry:
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# restore x registers
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# restore x registers
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LOAD x1,1*REGBYTES(a0)
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LOAD x1,1*REGBYTES(a0)
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LOAD x2,2*REGBYTES(a0)
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LOAD x3,3*REGBYTES(a0)
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LOAD x3,3*REGBYTES(a0)
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LOAD x4,4*REGBYTES(a0)
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LOAD x4,4*REGBYTES(a0)
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LOAD x5,5*REGBYTES(a0)
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LOAD x5,5*REGBYTES(a0)
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@ -1,44 +1,45 @@
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From fbba62aff7a727723aa75715e1d1838b484ba842 Mon Sep 17 00:00:00 2001
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From 30022eebb78abc5a8a9289aecbd30a155fafcff0 Mon Sep 17 00:00:00 2001
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From: Stefan <stefan@pimaker.at>
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From: Stefan <stefan@pimaker.at>
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Date: Sun, 1 Aug 2021 20:58:20 +0200
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Date: Sun, 1 Aug 2021 20:58:20 +0200
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Subject: [PATCH] _pi_ patches for rvc
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Subject: [PATCH] _pi_ patches for rvc
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* use MEMOP extension for faster memcpy (disabled atm)
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* use MEMOP extension for faster memcpy
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* don't poison init kernel area, we don't care about security
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* don't poison init kernel area, we don't care about security
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* print more messages about initramfs loading, since otherwise it just
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* print more messages about initramfs loading, since otherwise it just
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looks like it got stuck
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looks like it got stuck
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Signed-off-by: Stefan <stefan@pimaker.at>
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Signed-off-by: Stefan <stefan@pimaker.at>
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---
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---
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arch/riscv/lib/memcpy.S | 13 +++++++++++++
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arch/riscv/lib/memcpy.S | 14 ++++++++++++++
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include/linux/mm.h | 2 +-
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include/linux/mm.h | 2 +-
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init/initramfs.c | 19 +++++++++++++++++--
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init/initramfs.c | 19 +++++++++++++++++--
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3 files changed, 31 insertions(+), 3 deletions(-)
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3 files changed, 32 insertions(+), 3 deletions(-)
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diff --git a/arch/riscv/lib/memcpy.S b/arch/riscv/lib/memcpy.S
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diff --git a/arch/riscv/lib/memcpy.S b/arch/riscv/lib/memcpy.S
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index 51ab716253fa..67636579413d 100644
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index 51ab716253fa..67e3cf24d9d0 100644
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--- a/arch/riscv/lib/memcpy.S
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--- a/arch/riscv/lib/memcpy.S
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+++ b/arch/riscv/lib/memcpy.S
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+++ b/arch/riscv/lib/memcpy.S
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@@ -41,6 +41,18 @@ WEAK(memcpy)
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@@ -41,6 +41,19 @@ WEAK(memcpy)
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beqz a4, 4f
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beqz a4, 4f
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add a3, a1, a4
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add a3, a1, a4
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3:
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3:
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+ #lla t0, 10f
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+ # fast memcpy for page-sized chunks
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+ #li t2, 1025
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+ lla t0, 10f
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+ #bltu a2, t2, 11f
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+ li t2, 4096
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+ bne a2, t2, 11f
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+
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+
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+ #csrw 0x0b1, a1 # src
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+ csrw 0x0b1, a1 # src
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+ #csrw 0x0b2, t6 # dst
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+ csrw 0x0b2, t6 # dst
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+ #csrw 0x0b3, a2 # n
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+ csrw 0x0b3, a2 # n
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+ #li t2, 0x1
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+ li t2, 0x1
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+ #csrw 0x0b0, t2 # memcpy
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+ csrw 0x0b0, t2 # memcpy
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+ #j 10f
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+ j 10f
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+
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+
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+11:
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+11:
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REG_L a4, 0(a1)
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REG_L a4, 0(a1)
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REG_L a5, SZREG(a1)
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REG_L a5, SZREG(a1)
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REG_L a6, 2*SZREG(a1)
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REG_L a6, 2*SZREG(a1)
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@@ -76,6 +88,7 @@ WEAK(memcpy)
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@@ -76,6 +89,7 @@ WEAK(memcpy)
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REG_S t1, 15*SZREG(t6)
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REG_S t1, 15*SZREG(t6)
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addi t6, t6, 16*SZREG
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addi t6, t6, 16*SZREG
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bltu a1, a3, 3b
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bltu a1, a3, 3b
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@ -57,7 +57,7 @@ void uart_tick(cpu_t *cpu) {
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uint thr = UART_GET1(THR);
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uint thr = UART_GET1(THR);
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if ((cpu->clock % 0x16) == 0 && thr != 0) {
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if ((cpu->clock % 0x16) == 0 && thr != 0) {
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printf(" %d", (unsigned char)thr);
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printf("%c", (unsigned char)thr);
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fflush(stdout);
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fflush(stdout);
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UART_SET1(THR, 0);
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UART_SET1(THR, 0);
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UART_SET2(LSR, (UART_GET2(LSR) | LSR_THR_EMPTY));
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UART_SET2(LSR, (UART_GET2(LSR) | LSR_THR_EMPTY));
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