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4a598907ef
'is31fl3190_regmap_config' and 'is31fl3196_regmap_config' are not modified in this diver and are only used as a const struct regmap_config. Constifying these structures moves some data to a read-only section, so increase overall security. On a x86_64, with allmodconfig: Before: text data bss dec hex filename 13827 2002 32 15861 3df5 drivers/leds/leds-is31fl319x.o After: text data bss dec hex filename 14467 1370 32 15869 3dfd drivers/leds/leds-is31fl319x.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/82a5cb26ff8af1865a790286bdbc3c4a2bd149f1.1714892598.git.christophe.jaillet@wanadoo.fr Signed-off-by: Lee Jones <lee@kernel.org>
615 lines
17 KiB
C
615 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2015-16 Golden Delicious Computers
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*
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* Author: Nikolaus Schaller <hns@goldelico.com>
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*
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* LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light
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* effect LEDs.
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*/
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/leds.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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/* register numbers */
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#define IS31FL319X_SHUTDOWN 0x00
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/* registers for 3190, 3191 and 3193 */
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#define IS31FL3190_BREATHING 0x01
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#define IS31FL3190_LEDMODE 0x02
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#define IS31FL3190_CURRENT 0x03
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#define IS31FL3190_PWM(channel) (0x04 + channel)
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#define IS31FL3190_DATA_UPDATE 0x07
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#define IS31FL3190_T0(channel) (0x0a + channel)
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#define IS31FL3190_T1T2(channel) (0x10 + channel)
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#define IS31FL3190_T3T4(channel) (0x16 + channel)
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#define IS31FL3190_TIME_UPDATE 0x1c
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#define IS31FL3190_LEDCONTROL 0x1d
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#define IS31FL3190_RESET 0x2f
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#define IS31FL3190_CURRENT_uA_MIN 5000
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#define IS31FL3190_CURRENT_uA_DEFAULT 42000
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#define IS31FL3190_CURRENT_uA_MAX 42000
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#define IS31FL3190_CURRENT_SHIFT 2
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#define IS31FL3190_CURRENT_MASK GENMASK(4, 2)
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#define IS31FL3190_CURRENT_5_mA 0x02
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#define IS31FL3190_CURRENT_10_mA 0x01
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#define IS31FL3190_CURRENT_17dot5_mA 0x04
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#define IS31FL3190_CURRENT_30_mA 0x03
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#define IS31FL3190_CURRENT_42_mA 0x00
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/* registers for 3196 and 3199 */
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#define IS31FL3196_CTRL1 0x01
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#define IS31FL3196_CTRL2 0x02
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#define IS31FL3196_CONFIG1 0x03
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#define IS31FL3196_CONFIG2 0x04
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#define IS31FL3196_RAMP_MODE 0x05
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#define IS31FL3196_BREATH_MARK 0x06
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#define IS31FL3196_PWM(channel) (0x07 + channel)
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#define IS31FL3196_DATA_UPDATE 0x10
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#define IS31FL3196_T0(channel) (0x11 + channel)
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#define IS31FL3196_T123_1 0x1a
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#define IS31FL3196_T123_2 0x1b
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#define IS31FL3196_T123_3 0x1c
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#define IS31FL3196_T4(channel) (0x1d + channel)
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#define IS31FL3196_TIME_UPDATE 0x26
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#define IS31FL3196_RESET 0xff
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#define IS31FL3196_REG_CNT (IS31FL3196_RESET + 1)
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#define IS31FL319X_MAX_LEDS 9
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/* CS (Current Setting) in CONFIG2 register */
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#define IS31FL3196_CONFIG2_CS_SHIFT 4
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#define IS31FL3196_CONFIG2_CS_MASK GENMASK(2, 0)
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#define IS31FL3196_CONFIG2_CS_STEP_REF 12
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#define IS31FL3196_CURRENT_uA_MIN 5000
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#define IS31FL3196_CURRENT_uA_MAX 40000
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#define IS31FL3196_CURRENT_uA_STEP 5000
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#define IS31FL3196_CURRENT_uA_DEFAULT 20000
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/* Audio gain in CONFIG2 register */
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#define IS31FL3196_AUDIO_GAIN_DB_MAX ((u32)21)
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#define IS31FL3196_AUDIO_GAIN_DB_STEP 3
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/*
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* regmap is used as a cache of chip's register space,
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* to avoid reading back brightness values from chip,
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* which is known to hang.
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*/
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struct is31fl319x_chip {
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const struct is31fl319x_chipdef *cdef;
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struct i2c_client *client;
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struct gpio_desc *shutdown_gpio;
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struct regmap *regmap;
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struct mutex lock;
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u32 audio_gain_db;
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struct is31fl319x_led {
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struct is31fl319x_chip *chip;
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struct led_classdev cdev;
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u32 max_microamp;
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bool configured;
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} leds[IS31FL319X_MAX_LEDS];
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};
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struct is31fl319x_chipdef {
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int num_leds;
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u8 reset_reg;
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const struct regmap_config *is31fl319x_regmap_config;
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int (*brightness_set)(struct led_classdev *cdev, enum led_brightness brightness);
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u32 current_default;
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u32 current_min;
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u32 current_max;
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bool is_3196or3199;
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};
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static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg)
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{
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/* we have no readable registers */
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return false;
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}
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static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg)
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{
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/* volatile registers are not cached */
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switch (reg) {
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case IS31FL3190_DATA_UPDATE:
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case IS31FL3190_TIME_UPDATE:
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case IS31FL3190_RESET:
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return true; /* always write-through */
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default:
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return false;
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}
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}
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static const struct reg_default is31fl3190_reg_defaults[] = {
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{ IS31FL3190_LEDMODE, 0x00 },
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{ IS31FL3190_CURRENT, 0x00 },
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{ IS31FL3190_PWM(0), 0x00 },
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{ IS31FL3190_PWM(1), 0x00 },
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{ IS31FL3190_PWM(2), 0x00 },
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};
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static const struct regmap_config is31fl3190_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = IS31FL3190_RESET,
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.cache_type = REGCACHE_FLAT,
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.readable_reg = is31fl319x_readable_reg,
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.volatile_reg = is31fl3190_volatile_reg,
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.reg_defaults = is31fl3190_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(is31fl3190_reg_defaults),
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};
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static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg)
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{
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/* volatile registers are not cached */
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switch (reg) {
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case IS31FL3196_DATA_UPDATE:
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case IS31FL3196_TIME_UPDATE:
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case IS31FL3196_RESET:
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return true; /* always write-through */
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default:
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return false;
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}
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}
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static const struct reg_default is31fl3196_reg_defaults[] = {
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{ IS31FL3196_CONFIG1, 0x00 },
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{ IS31FL3196_CONFIG2, 0x00 },
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{ IS31FL3196_PWM(0), 0x00 },
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{ IS31FL3196_PWM(1), 0x00 },
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{ IS31FL3196_PWM(2), 0x00 },
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{ IS31FL3196_PWM(3), 0x00 },
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{ IS31FL3196_PWM(4), 0x00 },
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{ IS31FL3196_PWM(5), 0x00 },
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{ IS31FL3196_PWM(6), 0x00 },
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{ IS31FL3196_PWM(7), 0x00 },
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{ IS31FL3196_PWM(8), 0x00 },
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};
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static const struct regmap_config is31fl3196_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = IS31FL3196_REG_CNT,
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.cache_type = REGCACHE_FLAT,
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.readable_reg = is31fl319x_readable_reg,
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.volatile_reg = is31fl3196_volatile_reg,
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.reg_defaults = is31fl3196_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(is31fl3196_reg_defaults),
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};
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static int is31fl3190_brightness_set(struct led_classdev *cdev,
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enum led_brightness brightness)
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{
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struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
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struct is31fl319x_chip *is31 = led->chip;
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int chan = led - is31->leds;
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int ret;
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int i;
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u8 ctrl = 0;
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dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
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mutex_lock(&is31->lock);
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/* update PWM register */
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ret = regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness);
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if (ret < 0)
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goto out;
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/* read current brightness of all PWM channels */
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for (i = 0; i < is31->cdef->num_leds; i++) {
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unsigned int pwm_value;
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bool on;
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/*
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* since neither cdev nor the chip can provide
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* the current setting, we read from the regmap cache
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*/
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ret = regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value);
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on = ret >= 0 && pwm_value > LED_OFF;
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ctrl |= on << i;
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}
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if (ctrl > 0) {
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dev_dbg(&is31->client->dev, "power up %02x\n", ctrl);
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regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl);
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/* update PWMs */
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regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00);
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/* enable chip from shut down and enable all channels */
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ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20);
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} else {
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dev_dbg(&is31->client->dev, "power down\n");
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/* shut down (no need to clear LEDCONTROL) */
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ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
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}
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out:
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mutex_unlock(&is31->lock);
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return ret;
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}
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static int is31fl3196_brightness_set(struct led_classdev *cdev,
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enum led_brightness brightness)
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{
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struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
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struct is31fl319x_chip *is31 = led->chip;
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int chan = led - is31->leds;
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int ret;
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int i;
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u8 ctrl1 = 0, ctrl2 = 0;
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dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
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mutex_lock(&is31->lock);
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/* update PWM register */
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ret = regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness);
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if (ret < 0)
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goto out;
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/* read current brightness of all PWM channels */
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for (i = 0; i < is31->cdef->num_leds; i++) {
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unsigned int pwm_value;
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bool on;
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/*
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* since neither cdev nor the chip can provide
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* the current setting, we read from the regmap cache
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*/
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ret = regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value);
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on = ret >= 0 && pwm_value > LED_OFF;
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if (i < 3)
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ctrl1 |= on << i; /* 0..2 => bit 0..2 */
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else if (i < 6)
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ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */
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else
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ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */
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}
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if (ctrl1 > 0 || ctrl2 > 0) {
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dev_dbg(&is31->client->dev, "power up %02x %02x\n",
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ctrl1, ctrl2);
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regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1);
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regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2);
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/* update PWMs */
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regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00);
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/* enable chip from shut down */
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ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
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} else {
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dev_dbg(&is31->client->dev, "power down\n");
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/* shut down (no need to clear CTRL1/2) */
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ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00);
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}
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out:
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mutex_unlock(&is31->lock);
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return ret;
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}
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static const struct is31fl319x_chipdef is31fl3190_cdef = {
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.num_leds = 1,
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.reset_reg = IS31FL3190_RESET,
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.is31fl319x_regmap_config = &is31fl3190_regmap_config,
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.brightness_set = is31fl3190_brightness_set,
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.current_default = IS31FL3190_CURRENT_uA_DEFAULT,
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.current_min = IS31FL3190_CURRENT_uA_MIN,
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.current_max = IS31FL3190_CURRENT_uA_MAX,
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.is_3196or3199 = false,
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};
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static const struct is31fl319x_chipdef is31fl3193_cdef = {
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.num_leds = 3,
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.reset_reg = IS31FL3190_RESET,
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.is31fl319x_regmap_config = &is31fl3190_regmap_config,
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.brightness_set = is31fl3190_brightness_set,
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.current_default = IS31FL3190_CURRENT_uA_DEFAULT,
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.current_min = IS31FL3190_CURRENT_uA_MIN,
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.current_max = IS31FL3190_CURRENT_uA_MAX,
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.is_3196or3199 = false,
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};
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static const struct is31fl319x_chipdef is31fl3196_cdef = {
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.num_leds = 6,
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.reset_reg = IS31FL3196_RESET,
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.is31fl319x_regmap_config = &is31fl3196_regmap_config,
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.brightness_set = is31fl3196_brightness_set,
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.current_default = IS31FL3196_CURRENT_uA_DEFAULT,
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.current_min = IS31FL3196_CURRENT_uA_MIN,
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.current_max = IS31FL3196_CURRENT_uA_MAX,
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.is_3196or3199 = true,
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};
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static const struct is31fl319x_chipdef is31fl3199_cdef = {
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.num_leds = 9,
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.reset_reg = IS31FL3196_RESET,
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.is31fl319x_regmap_config = &is31fl3196_regmap_config,
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.brightness_set = is31fl3196_brightness_set,
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.current_default = IS31FL3196_CURRENT_uA_DEFAULT,
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.current_min = IS31FL3196_CURRENT_uA_MIN,
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.current_max = IS31FL3196_CURRENT_uA_MAX,
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.is_3196or3199 = true,
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};
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static const struct of_device_id of_is31fl319x_match[] = {
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{ .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, },
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{ .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, },
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{ .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, },
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{ .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, },
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{ .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, },
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{ .compatible = "si-en,sn3190", .data = &is31fl3190_cdef, },
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{ .compatible = "si-en,sn3191", .data = &is31fl3190_cdef, },
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{ .compatible = "si-en,sn3193", .data = &is31fl3193_cdef, },
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{ .compatible = "si-en,sn3196", .data = &is31fl3196_cdef, },
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{ .compatible = "si-en,sn3199", .data = &is31fl3199_cdef, },
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{ }
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};
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MODULE_DEVICE_TABLE(of, of_is31fl319x_match);
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static int is31fl319x_parse_child_fw(const struct device *dev,
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const struct fwnode_handle *child,
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struct is31fl319x_led *led,
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struct is31fl319x_chip *is31)
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{
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struct led_classdev *cdev = &led->cdev;
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int ret;
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if (fwnode_property_read_string(child, "label", &cdev->name))
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cdev->name = fwnode_get_name(child);
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ret = fwnode_property_read_string(child, "linux,default-trigger", &cdev->default_trigger);
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if (ret < 0 && ret != -EINVAL) /* is optional */
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return ret;
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led->max_microamp = is31->cdef->current_default;
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ret = fwnode_property_read_u32(child, "led-max-microamp", &led->max_microamp);
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if (!ret) {
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if (led->max_microamp < is31->cdef->current_min)
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return -EINVAL; /* not supported */
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led->max_microamp = min(led->max_microamp,
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is31->cdef->current_max);
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}
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return 0;
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}
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static int is31fl319x_parse_fw(struct device *dev, struct is31fl319x_chip *is31)
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{
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struct fwnode_handle *fwnode = dev_fwnode(dev), *child;
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int count;
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int ret;
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is31->shutdown_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
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if (IS_ERR(is31->shutdown_gpio))
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return dev_err_probe(dev, PTR_ERR(is31->shutdown_gpio),
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"Failed to get shutdown gpio\n");
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is31->cdef = device_get_match_data(dev);
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count = 0;
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fwnode_for_each_available_child_node(fwnode, child)
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count++;
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dev_dbg(dev, "probing with %d leds defined in DT\n", count);
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if (!count || count > is31->cdef->num_leds)
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return dev_err_probe(dev, -ENODEV,
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"Number of leds defined must be between 1 and %u\n",
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is31->cdef->num_leds);
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fwnode_for_each_available_child_node(fwnode, child) {
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struct is31fl319x_led *led;
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u32 reg;
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ret = fwnode_property_read_u32(child, "reg", ®);
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if (ret) {
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ret = dev_err_probe(dev, ret, "Failed to read led 'reg' property\n");
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goto put_child_node;
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}
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|
|
|
if (reg < 1 || reg > is31->cdef->num_leds) {
|
|
ret = dev_err_probe(dev, -EINVAL, "invalid led reg %u\n", reg);
|
|
goto put_child_node;
|
|
}
|
|
|
|
led = &is31->leds[reg - 1];
|
|
|
|
if (led->configured) {
|
|
ret = dev_err_probe(dev, -EINVAL, "led %u is already configured\n", reg);
|
|
goto put_child_node;
|
|
}
|
|
|
|
ret = is31fl319x_parse_child_fw(dev, child, led, is31);
|
|
if (ret) {
|
|
ret = dev_err_probe(dev, ret, "led %u DT parsing failed\n", reg);
|
|
goto put_child_node;
|
|
}
|
|
|
|
led->configured = true;
|
|
}
|
|
|
|
is31->audio_gain_db = 0;
|
|
if (is31->cdef->is_3196or3199) {
|
|
ret = fwnode_property_read_u32(fwnode, "audio-gain-db", &is31->audio_gain_db);
|
|
if (!ret)
|
|
is31->audio_gain_db = min(is31->audio_gain_db,
|
|
IS31FL3196_AUDIO_GAIN_DB_MAX);
|
|
}
|
|
|
|
return 0;
|
|
|
|
put_child_node:
|
|
fwnode_handle_put(child);
|
|
return ret;
|
|
}
|
|
|
|
static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microamp)
|
|
{
|
|
switch (microamp) {
|
|
case 5000:
|
|
return IS31FL3190_CURRENT_5_mA;
|
|
case 10000:
|
|
return IS31FL3190_CURRENT_10_mA;
|
|
case 17500:
|
|
return IS31FL3190_CURRENT_17dot5_mA;
|
|
case 30000:
|
|
return IS31FL3190_CURRENT_30_mA;
|
|
case 42000:
|
|
return IS31FL3190_CURRENT_42_mA;
|
|
default:
|
|
dev_warn(dev, "Unsupported current value: %d, using 5000 µA!\n", microamp);
|
|
return IS31FL3190_CURRENT_5_mA;
|
|
}
|
|
}
|
|
|
|
static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microamp)
|
|
{
|
|
/* round down to nearest supported value (range check done by caller) */
|
|
u32 step = microamp / IS31FL3196_CURRENT_uA_STEP;
|
|
|
|
return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) &
|
|
IS31FL3196_CONFIG2_CS_MASK) <<
|
|
IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */
|
|
}
|
|
|
|
static inline int is31fl3196_db_to_gain(u32 dezibel)
|
|
{
|
|
/* round down to nearest supported value (range check done by caller) */
|
|
return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP;
|
|
}
|
|
|
|
static void is31f1319x_mutex_destroy(void *lock)
|
|
{
|
|
mutex_destroy(lock);
|
|
}
|
|
|
|
static int is31fl319x_probe(struct i2c_client *client)
|
|
{
|
|
struct is31fl319x_chip *is31;
|
|
struct device *dev = &client->dev;
|
|
int err;
|
|
int i = 0;
|
|
u32 aggregated_led_microamp;
|
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
|
|
return -EIO;
|
|
|
|
is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL);
|
|
if (!is31)
|
|
return -ENOMEM;
|
|
|
|
mutex_init(&is31->lock);
|
|
err = devm_add_action_or_reset(dev, is31f1319x_mutex_destroy, &is31->lock);
|
|
if (err)
|
|
return err;
|
|
|
|
err = is31fl319x_parse_fw(&client->dev, is31);
|
|
if (err)
|
|
return err;
|
|
|
|
if (is31->shutdown_gpio) {
|
|
gpiod_direction_output(is31->shutdown_gpio, 0);
|
|
mdelay(5);
|
|
gpiod_direction_output(is31->shutdown_gpio, 1);
|
|
}
|
|
|
|
is31->client = client;
|
|
is31->regmap = devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regmap_config);
|
|
if (IS_ERR(is31->regmap))
|
|
return dev_err_probe(dev, PTR_ERR(is31->regmap), "failed to allocate register map\n");
|
|
|
|
i2c_set_clientdata(client, is31);
|
|
|
|
/* check for write-reply from chip (we can't read any registers) */
|
|
err = regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00);
|
|
if (err < 0)
|
|
return dev_err_probe(dev, err, "no response from chip write\n");
|
|
|
|
/*
|
|
* Kernel conventions require per-LED led-max-microamp property.
|
|
* But the chip does not allow to limit individual LEDs.
|
|
* So we take minimum from all subnodes for safety of hardware.
|
|
*/
|
|
aggregated_led_microamp = is31->cdef->current_max;
|
|
for (i = 0; i < is31->cdef->num_leds; i++)
|
|
if (is31->leds[i].configured &&
|
|
is31->leds[i].max_microamp < aggregated_led_microamp)
|
|
aggregated_led_microamp = is31->leds[i].max_microamp;
|
|
|
|
if (is31->cdef->is_3196or3199)
|
|
regmap_write(is31->regmap, IS31FL3196_CONFIG2,
|
|
is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) |
|
|
is31fl3196_db_to_gain(is31->audio_gain_db));
|
|
else
|
|
regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_MASK,
|
|
is31fl3190_microamp_to_cs(dev, aggregated_led_microamp) << IS31FL3190_CURRENT_SHIFT);
|
|
|
|
for (i = 0; i < is31->cdef->num_leds; i++) {
|
|
struct is31fl319x_led *led = &is31->leds[i];
|
|
|
|
if (!led->configured)
|
|
continue;
|
|
|
|
led->chip = is31;
|
|
led->cdev.brightness_set_blocking = is31->cdef->brightness_set;
|
|
|
|
err = devm_led_classdev_register(&client->dev, &led->cdev);
|
|
if (err < 0)
|
|
return err;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* i2c-core (and modalias) requires that id_table be properly filled,
|
|
* even though it is not used for DeviceTree based instantiation.
|
|
*/
|
|
static const struct i2c_device_id is31fl319x_id[] = {
|
|
{ "is31fl3190" },
|
|
{ "is31fl3191" },
|
|
{ "is31fl3193" },
|
|
{ "is31fl3196" },
|
|
{ "is31fl3199" },
|
|
{ "sn3190" },
|
|
{ "sn3191" },
|
|
{ "sn3193" },
|
|
{ "sn3196" },
|
|
{ "sn3199" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, is31fl319x_id);
|
|
|
|
static struct i2c_driver is31fl319x_driver = {
|
|
.driver = {
|
|
.name = "leds-is31fl319x",
|
|
.of_match_table = of_is31fl319x_match,
|
|
},
|
|
.probe = is31fl319x_probe,
|
|
.id_table = is31fl319x_id,
|
|
};
|
|
|
|
module_i2c_driver(is31fl319x_driver);
|
|
|
|
MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
|
|
MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>");
|
|
MODULE_DESCRIPTION("IS31FL319X LED driver");
|
|
MODULE_LICENSE("GPL v2");
|