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df83033604
Not all LoongArch processors support CRC32 instructions. This feature is indicated by CPUCFG1.CRC32 (Bit25) but it is wrongly defined in the previous versions of the ISA manual (and so does in loongarch.h). The CRC32 feature is set unconditionally now, so fix it. BTW, expose the CRC32 feature in /proc/cpuinfo. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
129 lines
3.6 KiB
C
129 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/idle.h>
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#include <asm/processor.h>
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#include <asm/time.h>
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/*
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* No lock; only written during early bootup by CPU 0.
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*/
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static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
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int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
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{
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return raw_notifier_chain_register(&proc_cpuinfo_chain, nb);
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}
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int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)
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{
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return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v);
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}
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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unsigned long n = (unsigned long) v - 1;
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unsigned int version = cpu_data[n].processor_id & 0xff;
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unsigned int fp_version = cpu_data[n].fpu_vers;
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struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;
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#ifdef CONFIG_SMP
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if (!cpu_online(n))
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return 0;
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#endif
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/*
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* For the first processor also print the system type
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*/
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if (n == 0)
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seq_printf(m, "system type\t\t: %s\n\n", get_system_type());
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seq_printf(m, "processor\t\t: %ld\n", n);
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seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
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seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
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seq_printf(m, "CPU Family\t\t: %s\n", __cpu_family[n]);
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seq_printf(m, "Model Name\t\t: %s\n", __cpu_full_name[n]);
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seq_printf(m, "CPU Revision\t\t: 0x%02x\n", version);
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seq_printf(m, "FPU Revision\t\t: 0x%02x\n", fp_version);
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seq_printf(m, "CPU MHz\t\t\t: %llu.%02llu\n",
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cpu_clock_freq / 1000000, (cpu_clock_freq / 10000) % 100);
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seq_printf(m, "BogoMIPS\t\t: %llu.%02llu\n",
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(lpj_fine * cpu_clock_freq / const_clock_freq) / (500000/HZ),
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((lpj_fine * cpu_clock_freq / const_clock_freq) / (5000/HZ)) % 100);
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seq_printf(m, "TLB Entries\t\t: %d\n", cpu_data[n].tlbsize);
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seq_printf(m, "Address Sizes\t\t: %d bits physical, %d bits virtual\n",
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cpu_pabits + 1, cpu_vabits + 1);
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seq_printf(m, "ISA\t\t\t:");
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if (cpu_has_loongarch32)
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seq_printf(m, " loongarch32");
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if (cpu_has_loongarch64)
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seq_printf(m, " loongarch64");
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seq_printf(m, "\n");
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seq_printf(m, "Features\t\t:");
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if (cpu_has_cpucfg) seq_printf(m, " cpucfg");
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if (cpu_has_lam) seq_printf(m, " lam");
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if (cpu_has_ual) seq_printf(m, " ual");
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if (cpu_has_fpu) seq_printf(m, " fpu");
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if (cpu_has_lsx) seq_printf(m, " lsx");
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if (cpu_has_lasx) seq_printf(m, " lasx");
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if (cpu_has_crc32) seq_printf(m, " crc32");
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if (cpu_has_complex) seq_printf(m, " complex");
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if (cpu_has_crypto) seq_printf(m, " crypto");
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if (cpu_has_lvz) seq_printf(m, " lvz");
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if (cpu_has_lbt_x86) seq_printf(m, " lbt_x86");
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if (cpu_has_lbt_arm) seq_printf(m, " lbt_arm");
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if (cpu_has_lbt_mips) seq_printf(m, " lbt_mips");
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seq_printf(m, "\n");
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seq_printf(m, "Hardware Watchpoint\t: %s",
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cpu_has_watch ? "yes, " : "no\n");
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if (cpu_has_watch) {
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seq_printf(m, "iwatch count: %d, dwatch count: %d\n",
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cpu_data[n].watch_ireg_count, cpu_data[n].watch_dreg_count);
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}
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proc_cpuinfo_notifier_args.m = m;
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proc_cpuinfo_notifier_args.n = n;
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raw_notifier_call_chain(&proc_cpuinfo_chain, 0,
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&proc_cpuinfo_notifier_args);
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seq_printf(m, "\n");
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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unsigned long i = *pos;
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return i < nr_cpu_ids ? (void *)(i + 1) : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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