mirror of
https://github.com/torvalds/linux.git
synced 2024-12-29 14:21:47 +00:00
5698bd28c6
Ensure the CPLD 8bit settings are preserved over a suspend/resume cycle as the CPU sends a hard-reset at resume time. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
31 lines
824 B
C
31 lines
824 B
C
/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
|
|
*
|
|
* Copyright 2005 Simtec Electronics
|
|
* http://www.simtec.co.uk/products/
|
|
* Ben Dooks <ben@simtec.co.uk>
|
|
*
|
|
* OSIRIS - CPLD control constants
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef __ASM_ARCH_OSIRISCPLD_H
|
|
#define __ASM_ARCH_OSIRISCPLD_H
|
|
|
|
/* CTRL0 - NAND WP control */
|
|
|
|
#define OSIRIS_CTRL0_NANDSEL (0x3)
|
|
#define OSIRIS_CTRL0_BOOT_INT (1<<3)
|
|
#define OSIRIS_CTRL0_PCMCIA (1<<4)
|
|
#define OSIRIS_CTRL0_FIX8 (1<<5)
|
|
#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
|
|
#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
|
|
|
|
#define OSIRIS_CTRL1_FIX8 (1<<0)
|
|
|
|
#define OSIRIS_ID_REVMASK (0x7)
|
|
|
|
#endif /* __ASM_ARCH_OSIRISCPLD_H */
|