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The property is optional and defaults to 32. Document it as such. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
78 lines
2.2 KiB
Plaintext
78 lines
2.2 KiB
Plaintext
* MARVELL MMP DMA controller
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Marvell Peripheral DMA Controller
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Used platforms: pxa688, pxa910, pxa3xx, etc
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Required properties:
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- compatible: Should be "marvell,pdma-1.0"
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- reg: Should contain DMA registers location and length.
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- interrupts: Either contain all of the per-channel DMA interrupts
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or one irq for pdma device
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Optional properties:
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- #dma-channels: Number of DMA channels supported by the controller (defaults
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to 32 when not specified)
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"marvell,pdma-1.0"
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Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688.
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Examples:
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/*
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* Each channel has specific irq
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* ICU parse out irq channel from ICU register,
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* while DMA controller may not able to distinguish the irq channel
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* Using this method, interrupt-parent is required as demuxer
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* For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
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* 18~21 is ADMA irq
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*/
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pdma: dma-controller@d4000000 {
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compatible = "marvell,pdma-1.0";
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reg = <0xd4000000 0x10000>;
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interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
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interrupt-parent = <&intcmux32>;
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#dma-channels = <16>;
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};
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/*
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* One irq for all channels
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* Dmaengine driver (DMA controller) distinguish irq channel via
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* parsing internal register
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*/
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pdma: dma-controller@d4000000 {
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compatible = "marvell,pdma-1.0";
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reg = <0xd4000000 0x10000>;
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interrupts = <47>;
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#dma-channels = <16>;
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};
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Marvell Two Channel DMA Controller used specifically for audio
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Used platforms: pxa688, pxa910
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Required properties:
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- compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ"
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- reg: Should contain DMA registers location and length.
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- interrupts: Either contain all of the per-channel DMA interrupts
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or one irq for dma device
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"marvell,adma-1.0" used on pxa688
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"marvell,pxa910-squ" used on pxa910
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Examples:
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/* each channel has specific irq */
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adma0: dma-controller@d42a0800 {
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compatible = "marvell,adma-1.0";
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reg = <0xd42a0800 0x100>;
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interrupts = <18 19>;
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interrupt-parent = <&intcmux32>;
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};
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/* One irq for all channels */
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squ: dma-controller@d42a0800 {
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compatible = "marvell,pxa910-squ";
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reg = <0xd42a0800 0x100>;
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interrupts = <46>;
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};
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