linux/arch/x86/events
Li Huafei f73cefa3b7 perf/x86: Fix smp_processor_id()-in-preemptible warnings
The following bug was triggered on a system built with
CONFIG_DEBUG_PREEMPT=y:

 # echo p > /proc/sysrq-trigger

 BUG: using smp_processor_id() in preemptible [00000000] code: sh/117
 caller is perf_event_print_debug+0x1a/0x4c0
 CPU: 3 UID: 0 PID: 117 Comm: sh Not tainted 6.11.0-rc1 #109
 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.13.0-1ubuntu1.1 04/01/2014
 Call Trace:
  <TASK>
  dump_stack_lvl+0x4f/0x60
  check_preemption_disabled+0xc8/0xd0
  perf_event_print_debug+0x1a/0x4c0
  __handle_sysrq+0x140/0x180
  write_sysrq_trigger+0x61/0x70
  proc_reg_write+0x4e/0x70
  vfs_write+0xd0/0x430
  ? handle_mm_fault+0xc8/0x240
  ksys_write+0x9c/0xd0
  do_syscall_64+0x96/0x190
  entry_SYSCALL_64_after_hwframe+0x4b/0x53

This is because the commit d4b294bf84 ("perf/x86: Hybrid PMU support
for counters") took smp_processor_id() outside the irq critical section.
If a preemption occurs in perf_event_print_debug() and the task is
migrated to another cpu, we may get incorrect pmu debug information.
Move smp_processor_id() back inside the irq critical section to fix this
issue.

Fixes: d4b294bf84 ("perf/x86: Hybrid PMU support for counters")
Signed-off-by: Li Huafei <lihuafei1@huawei.com>
Reviewed-and-tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Link: https://lore.kernel.org/r/20240729220928.325449-1-lihuafei1@huawei.com
2024-07-31 12:57:39 +02:00
..
amd perf/x86/amd/uncore: Fix DF and UMC domain identification 2024-07-04 16:00:41 +02:00
intel perf/x86/intel/cstate: Add pkg C2 residency counter for Sierra Forest 2024-07-29 12:16:22 +02:00
zhaoxin perf/x86: Support counter mask 2024-07-04 16:00:36 +02:00
core.c perf/x86: Fix smp_processor_id()-in-preemptible warnings 2024-07-31 12:57:39 +02:00
Kconfig perf/x86/Kconfig: Fix indentation in the Kconfig file 2022-05-25 15:54:26 +02:00
Makefile perf/x86: Move branch classifier 2022-08-27 00:05:44 +02:00
msr.c perf/x86/msr: Switch to new Intel CPU model defines 2024-04-29 10:31:04 +02:00
perf_event_flags.h perf/x86/intel: Support branch counters logging 2023-10-27 15:05:11 +02:00
perf_event.h perf/x86/intel: Support Perfmon MSRs aliasing 2024-07-04 16:00:40 +02:00
probe.c perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
probe.h perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
rapl.c - Flip the logic to add feature names to /proc/cpuinfo to having to 2024-07-15 20:25:16 -07:00
utils.c perf/x86/lbr: Filter vsyscall addresses 2023-10-08 12:25:18 +02:00