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129622672d
This change implements PCIe root complex support for tilegx using the kernel support layer for accessing the TRIO hardware shim. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
617 lines
16 KiB
C
617 lines
16 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/highmem.h>
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#include <linux/slab.h>
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#include <linux/pagemap.h>
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#include <linux/spinlock.h>
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#include <linux/cpumask.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/vmalloc.h>
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#include <linux/smp.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/fixmap.h>
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#include <asm/tlb.h>
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#include <asm/tlbflush.h>
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#include <asm/homecache.h>
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#define K(x) ((x) << (PAGE_SHIFT-10))
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/*
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* The normal show_free_areas() is too verbose on Tile, with dozens
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* of processors and often four NUMA zones each with high and lowmem.
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*/
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void show_mem(unsigned int filter)
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{
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struct zone *zone;
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pr_err("Active:%lu inactive:%lu dirty:%lu writeback:%lu unstable:%lu"
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" free:%lu\n slab:%lu mapped:%lu pagetables:%lu bounce:%lu"
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" pagecache:%lu swap:%lu\n",
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(global_page_state(NR_ACTIVE_ANON) +
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global_page_state(NR_ACTIVE_FILE)),
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(global_page_state(NR_INACTIVE_ANON) +
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global_page_state(NR_INACTIVE_FILE)),
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global_page_state(NR_FILE_DIRTY),
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global_page_state(NR_WRITEBACK),
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global_page_state(NR_UNSTABLE_NFS),
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global_page_state(NR_FREE_PAGES),
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(global_page_state(NR_SLAB_RECLAIMABLE) +
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global_page_state(NR_SLAB_UNRECLAIMABLE)),
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global_page_state(NR_FILE_MAPPED),
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global_page_state(NR_PAGETABLE),
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global_page_state(NR_BOUNCE),
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global_page_state(NR_FILE_PAGES),
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nr_swap_pages);
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for_each_zone(zone) {
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unsigned long flags, order, total = 0, largest_order = -1;
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if (!populated_zone(zone))
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continue;
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spin_lock_irqsave(&zone->lock, flags);
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for (order = 0; order < MAX_ORDER; order++) {
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int nr = zone->free_area[order].nr_free;
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total += nr << order;
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if (nr)
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largest_order = order;
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}
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spin_unlock_irqrestore(&zone->lock, flags);
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pr_err("Node %d %7s: %lukB (largest %luKb)\n",
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zone_to_nid(zone), zone->name,
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K(total), largest_order ? K(1UL) << largest_order : 0);
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}
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}
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/*
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* Associate a virtual page frame with a given physical page frame
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* and protection flags for that frame.
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*/
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static void set_pte_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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pgd = swapper_pg_dir + pgd_index(vaddr);
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if (pgd_none(*pgd)) {
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BUG();
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return;
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}
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pud = pud_offset(pgd, vaddr);
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if (pud_none(*pud)) {
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BUG();
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return;
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}
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pmd = pmd_offset(pud, vaddr);
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if (pmd_none(*pmd)) {
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BUG();
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return;
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}
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pte = pte_offset_kernel(pmd, vaddr);
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/* <pfn,flags> stored as-is, to permit clearing entries */
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set_pte(pte, pfn_pte(pfn, flags));
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/*
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* It's enough to flush this one mapping.
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* This appears conservative since it is only called
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* from __set_fixmap.
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*/
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local_flush_tlb_page(NULL, vaddr, PAGE_SIZE);
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}
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void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t flags)
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{
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unsigned long address = __fix_to_virt(idx);
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if (idx >= __end_of_fixed_addresses) {
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BUG();
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return;
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}
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set_pte_pfn(address, phys >> PAGE_SHIFT, flags);
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}
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/**
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* shatter_huge_page() - ensure a given address is mapped by a small page.
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*
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* This function converts a huge PTE mapping kernel LOWMEM into a bunch
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* of small PTEs with the same caching. No cache flush required, but we
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* must do a global TLB flush.
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*
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* Any caller that wishes to modify a kernel mapping that might
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* have been made with a huge page should call this function,
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* since doing so properly avoids race conditions with installing the
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* newly-shattered page and then flushing all the TLB entries.
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*
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* @addr: Address at which to shatter any existing huge page.
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*/
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void shatter_huge_page(unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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unsigned long flags = 0; /* happy compiler */
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#ifdef __PAGETABLE_PMD_FOLDED
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struct list_head *pos;
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#endif
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/* Get a pointer to the pmd entry that we need to change. */
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addr &= HPAGE_MASK;
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BUG_ON(pgd_addr_invalid(addr));
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BUG_ON(addr < PAGE_OFFSET); /* only for kernel LOWMEM */
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pgd = swapper_pg_dir + pgd_index(addr);
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pud = pud_offset(pgd, addr);
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BUG_ON(!pud_present(*pud));
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pmd = pmd_offset(pud, addr);
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BUG_ON(!pmd_present(*pmd));
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if (!pmd_huge_page(*pmd))
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return;
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spin_lock_irqsave(&init_mm.page_table_lock, flags);
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if (!pmd_huge_page(*pmd)) {
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/* Lost the race to convert the huge page. */
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spin_unlock_irqrestore(&init_mm.page_table_lock, flags);
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return;
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}
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/* Shatter the huge page into the preallocated L2 page table. */
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pmd_populate_kernel(&init_mm, pmd,
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get_prealloc_pte(pte_pfn(*(pte_t *)pmd)));
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#ifdef __PAGETABLE_PMD_FOLDED
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/* Walk every pgd on the system and update the pmd there. */
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spin_lock(&pgd_lock);
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list_for_each(pos, &pgd_list) {
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pmd_t *copy_pmd;
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pgd = list_to_pgd(pos) + pgd_index(addr);
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pud = pud_offset(pgd, addr);
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copy_pmd = pmd_offset(pud, addr);
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__set_pmd(copy_pmd, *pmd);
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}
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spin_unlock(&pgd_lock);
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#endif
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/* Tell every cpu to notice the change. */
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flush_remote(0, 0, NULL, addr, HPAGE_SIZE, HPAGE_SIZE,
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cpu_possible_mask, NULL, 0);
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/* Hold the lock until the TLB flush is finished to avoid races. */
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spin_unlock_irqrestore(&init_mm.page_table_lock, flags);
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}
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/*
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* List of all pgd's needed so it can invalidate entries in both cached
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* and uncached pgd's. This is essentially codepath-based locking
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* against pageattr.c; it is the unique case in which a valid change
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* of kernel pagetables can't be lazily synchronized by vmalloc faults.
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* vmalloc faults work because attached pagetables are never freed.
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*
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* The lock is always taken with interrupts disabled, unlike on x86
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* and other platforms, because we need to take the lock in
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* shatter_huge_page(), which may be called from an interrupt context.
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* We are not at risk from the tlbflush IPI deadlock that was seen on
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* x86, since we use the flush_remote() API to have the hypervisor do
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* the TLB flushes regardless of irq disabling.
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*/
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DEFINE_SPINLOCK(pgd_lock);
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LIST_HEAD(pgd_list);
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static inline void pgd_list_add(pgd_t *pgd)
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{
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list_add(pgd_to_list(pgd), &pgd_list);
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}
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static inline void pgd_list_del(pgd_t *pgd)
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{
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list_del(pgd_to_list(pgd));
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}
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#define KERNEL_PGD_INDEX_START pgd_index(PAGE_OFFSET)
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#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_INDEX_START)
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static void pgd_ctor(pgd_t *pgd)
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{
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unsigned long flags;
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memset(pgd, 0, KERNEL_PGD_INDEX_START*sizeof(pgd_t));
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spin_lock_irqsave(&pgd_lock, flags);
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#ifndef __tilegx__
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/*
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* Check that the user interrupt vector has no L2.
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* It never should for the swapper, and new page tables
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* should always start with an empty user interrupt vector.
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*/
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BUG_ON(((u64 *)swapper_pg_dir)[pgd_index(MEM_USER_INTRPT)] != 0);
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#endif
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memcpy(pgd + KERNEL_PGD_INDEX_START,
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swapper_pg_dir + KERNEL_PGD_INDEX_START,
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KERNEL_PGD_PTRS * sizeof(pgd_t));
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pgd_list_add(pgd);
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spin_unlock_irqrestore(&pgd_lock, flags);
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}
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static void pgd_dtor(pgd_t *pgd)
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{
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unsigned long flags; /* can be called from interrupt context */
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spin_lock_irqsave(&pgd_lock, flags);
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pgd_list_del(pgd);
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spin_unlock_irqrestore(&pgd_lock, flags);
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}
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pgd_t *pgd_alloc(struct mm_struct *mm)
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{
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pgd_t *pgd = kmem_cache_alloc(pgd_cache, GFP_KERNEL);
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if (pgd)
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pgd_ctor(pgd);
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return pgd;
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}
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void pgd_free(struct mm_struct *mm, pgd_t *pgd)
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{
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pgd_dtor(pgd);
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kmem_cache_free(pgd_cache, pgd);
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}
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#define L2_USER_PGTABLE_PAGES (1 << L2_USER_PGTABLE_ORDER)
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struct page *pgtable_alloc_one(struct mm_struct *mm, unsigned long address,
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int order)
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{
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gfp_t flags = GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO;
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struct page *p;
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int i;
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p = alloc_pages(flags, L2_USER_PGTABLE_ORDER);
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if (p == NULL)
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return NULL;
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/*
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* Make every page have a page_count() of one, not just the first.
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* We don't use __GFP_COMP since it doesn't look like it works
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* correctly with tlb_remove_page().
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*/
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for (i = 1; i < order; ++i) {
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init_page_count(p+i);
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inc_zone_page_state(p+i, NR_PAGETABLE);
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}
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pgtable_page_ctor(p);
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return p;
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}
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/*
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* Free page immediately (used in __pte_alloc if we raced with another
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* process). We have to correct whatever pte_alloc_one() did before
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* returning the pages to the allocator.
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*/
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void pgtable_free(struct mm_struct *mm, struct page *p, int order)
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{
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int i;
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pgtable_page_dtor(p);
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__free_page(p);
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for (i = 1; i < order; ++i) {
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__free_page(p+i);
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dec_zone_page_state(p+i, NR_PAGETABLE);
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}
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}
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void __pgtable_free_tlb(struct mmu_gather *tlb, struct page *pte,
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unsigned long address, int order)
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{
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int i;
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pgtable_page_dtor(pte);
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tlb_remove_page(tlb, pte);
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for (i = 1; i < order; ++i) {
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tlb_remove_page(tlb, pte + i);
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dec_zone_page_state(pte + i, NR_PAGETABLE);
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}
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}
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#ifndef __tilegx__
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/*
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* FIXME: needs to be atomic vs hypervisor writes. For now we make the
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* window of vulnerability a bit smaller by doing an unlocked 8-bit update.
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*/
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int ptep_test_and_clear_young(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep)
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{
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#if HV_PTE_INDEX_ACCESSED < 8 || HV_PTE_INDEX_ACCESSED >= 16
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# error Code assumes HV_PTE "accessed" bit in second byte
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#endif
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u8 *tmp = (u8 *)ptep;
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u8 second_byte = tmp[1];
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if (!(second_byte & (1 << (HV_PTE_INDEX_ACCESSED - 8))))
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return 0;
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tmp[1] = second_byte & ~(1 << (HV_PTE_INDEX_ACCESSED - 8));
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return 1;
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}
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/*
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* This implementation is atomic vs hypervisor writes, since the hypervisor
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* always writes the low word (where "accessed" and "dirty" are) and this
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* routine only writes the high word.
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*/
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void ptep_set_wrprotect(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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#if HV_PTE_INDEX_WRITABLE < 32
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# error Code assumes HV_PTE "writable" bit in high word
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#endif
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u32 *tmp = (u32 *)ptep;
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tmp[1] = tmp[1] & ~(1 << (HV_PTE_INDEX_WRITABLE - 32));
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}
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#endif
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pte_t *virt_to_pte(struct mm_struct* mm, unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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if (pgd_addr_invalid(addr))
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return NULL;
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pgd = mm ? pgd_offset(mm, addr) : swapper_pg_dir + pgd_index(addr);
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pud = pud_offset(pgd, addr);
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if (!pud_present(*pud))
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return NULL;
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pmd = pmd_offset(pud, addr);
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if (pmd_huge_page(*pmd))
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return (pte_t *)pmd;
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if (!pmd_present(*pmd))
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return NULL;
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return pte_offset_kernel(pmd, addr);
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}
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pgprot_t set_remote_cache_cpu(pgprot_t prot, int cpu)
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{
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unsigned int width = smp_width;
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int x = cpu % width;
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int y = cpu / width;
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BUG_ON(y >= smp_height);
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BUG_ON(hv_pte_get_mode(prot) != HV_PTE_MODE_CACHE_TILE_L3);
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BUG_ON(cpu < 0 || cpu >= NR_CPUS);
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BUG_ON(!cpu_is_valid_lotar(cpu));
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return hv_pte_set_lotar(prot, HV_XY_TO_LOTAR(x, y));
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}
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int get_remote_cache_cpu(pgprot_t prot)
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{
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HV_LOTAR lotar = hv_pte_get_lotar(prot);
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int x = HV_LOTAR_X(lotar);
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int y = HV_LOTAR_Y(lotar);
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BUG_ON(hv_pte_get_mode(prot) != HV_PTE_MODE_CACHE_TILE_L3);
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return x + y * smp_width;
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}
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/*
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* Convert a kernel VA to a PA and homing information.
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*/
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int va_to_cpa_and_pte(void *va, unsigned long long *cpa, pte_t *pte)
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{
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struct page *page = virt_to_page(va);
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pte_t null_pte = { 0 };
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*cpa = __pa(va);
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/* Note that this is not writing a page table, just returning a pte. */
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*pte = pte_set_home(null_pte, page_home(page));
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return 0; /* return non-zero if not hfh? */
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}
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EXPORT_SYMBOL(va_to_cpa_and_pte);
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void __set_pte(pte_t *ptep, pte_t pte)
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{
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#ifdef __tilegx__
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*ptep = pte;
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#else
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# if HV_PTE_INDEX_PRESENT >= 32 || HV_PTE_INDEX_MIGRATING >= 32
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# error Must write the present and migrating bits last
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# endif
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if (pte_present(pte)) {
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((u32 *)ptep)[1] = (u32)(pte_val(pte) >> 32);
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barrier();
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((u32 *)ptep)[0] = (u32)(pte_val(pte));
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} else {
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((u32 *)ptep)[0] = (u32)(pte_val(pte));
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barrier();
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((u32 *)ptep)[1] = (u32)(pte_val(pte) >> 32);
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}
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#endif /* __tilegx__ */
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}
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void set_pte(pte_t *ptep, pte_t pte)
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{
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if (pte_present(pte) &&
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(!CHIP_HAS_MMIO() || hv_pte_get_mode(pte) != HV_PTE_MODE_MMIO)) {
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/* The PTE actually references physical memory. */
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unsigned long pfn = pte_pfn(pte);
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if (pfn_valid(pfn)) {
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/* Update the home of the PTE from the struct page. */
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pte = pte_set_home(pte, page_home(pfn_to_page(pfn)));
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} else if (hv_pte_get_mode(pte) == 0) {
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/* remap_pfn_range(), etc, must supply PTE mode. */
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panic("set_pte(): out-of-range PFN and mode 0\n");
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}
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}
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__set_pte(ptep, pte);
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}
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/* Can this mm load a PTE with cached_priority set? */
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static inline int mm_is_priority_cached(struct mm_struct *mm)
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{
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return mm->context.priority_cached != 0;
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}
|
|
|
|
/*
|
|
* Add a priority mapping to an mm_context and
|
|
* notify the hypervisor if this is the first one.
|
|
*/
|
|
void start_mm_caching(struct mm_struct *mm)
|
|
{
|
|
if (!mm_is_priority_cached(mm)) {
|
|
mm->context.priority_cached = -1UL;
|
|
hv_set_caching(-1UL);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Validate and return the priority_cached flag. We know if it's zero
|
|
* that we don't need to scan, since we immediately set it non-zero
|
|
* when we first consider a MAP_CACHE_PRIORITY mapping.
|
|
*
|
|
* We only _try_ to acquire the mmap_sem semaphore; if we can't acquire it,
|
|
* since we're in an interrupt context (servicing switch_mm) we don't
|
|
* worry about it and don't unset the "priority_cached" field.
|
|
* Presumably we'll come back later and have more luck and clear
|
|
* the value then; for now we'll just keep the cache marked for priority.
|
|
*/
|
|
static unsigned long update_priority_cached(struct mm_struct *mm)
|
|
{
|
|
if (mm->context.priority_cached && down_write_trylock(&mm->mmap_sem)) {
|
|
struct vm_area_struct *vm;
|
|
for (vm = mm->mmap; vm; vm = vm->vm_next) {
|
|
if (hv_pte_get_cached_priority(vm->vm_page_prot))
|
|
break;
|
|
}
|
|
if (vm == NULL)
|
|
mm->context.priority_cached = 0;
|
|
up_write(&mm->mmap_sem);
|
|
}
|
|
return mm->context.priority_cached;
|
|
}
|
|
|
|
/* Set caching correctly for an mm that we are switching to. */
|
|
void check_mm_caching(struct mm_struct *prev, struct mm_struct *next)
|
|
{
|
|
if (!mm_is_priority_cached(next)) {
|
|
/*
|
|
* If the new mm doesn't use priority caching, just see if we
|
|
* need the hv_set_caching(), or can assume it's already zero.
|
|
*/
|
|
if (mm_is_priority_cached(prev))
|
|
hv_set_caching(0);
|
|
} else {
|
|
hv_set_caching(update_priority_cached(next));
|
|
}
|
|
}
|
|
|
|
#if CHIP_HAS_MMIO()
|
|
|
|
/* Map an arbitrary MMIO address, homed according to pgprot, into VA space. */
|
|
void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size,
|
|
pgprot_t home)
|
|
{
|
|
void *addr;
|
|
struct vm_struct *area;
|
|
unsigned long offset, last_addr;
|
|
pgprot_t pgprot;
|
|
|
|
/* Don't allow wraparound or zero size */
|
|
last_addr = phys_addr + size - 1;
|
|
if (!size || last_addr < phys_addr)
|
|
return NULL;
|
|
|
|
/* Create a read/write, MMIO VA mapping homed at the requested shim. */
|
|
pgprot = PAGE_KERNEL;
|
|
pgprot = hv_pte_set_mode(pgprot, HV_PTE_MODE_MMIO);
|
|
pgprot = hv_pte_set_lotar(pgprot, hv_pte_get_lotar(home));
|
|
|
|
/*
|
|
* Mappings have to be page-aligned
|
|
*/
|
|
offset = phys_addr & ~PAGE_MASK;
|
|
phys_addr &= PAGE_MASK;
|
|
size = PAGE_ALIGN(last_addr+1) - phys_addr;
|
|
|
|
/*
|
|
* Ok, go for it..
|
|
*/
|
|
area = get_vm_area(size, VM_IOREMAP /* | other flags? */);
|
|
if (!area)
|
|
return NULL;
|
|
area->phys_addr = phys_addr;
|
|
addr = area->addr;
|
|
if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size,
|
|
phys_addr, pgprot)) {
|
|
remove_vm_area((void *)(PAGE_MASK & (unsigned long) addr));
|
|
return NULL;
|
|
}
|
|
return (__force void __iomem *) (offset + (char *)addr);
|
|
}
|
|
EXPORT_SYMBOL(ioremap_prot);
|
|
|
|
/* Unmap an MMIO VA mapping. */
|
|
void iounmap(volatile void __iomem *addr_in)
|
|
{
|
|
volatile void __iomem *addr = (volatile void __iomem *)
|
|
(PAGE_MASK & (unsigned long __force)addr_in);
|
|
#if 1
|
|
vunmap((void * __force)addr);
|
|
#else
|
|
/* x86 uses this complicated flow instead of vunmap(). Is
|
|
* there any particular reason we should do the same? */
|
|
struct vm_struct *p, *o;
|
|
|
|
/* Use the vm area unlocked, assuming the caller
|
|
ensures there isn't another iounmap for the same address
|
|
in parallel. Reuse of the virtual address is prevented by
|
|
leaving it in the global lists until we're done with it.
|
|
cpa takes care of the direct mappings. */
|
|
read_lock(&vmlist_lock);
|
|
for (p = vmlist; p; p = p->next) {
|
|
if (p->addr == addr)
|
|
break;
|
|
}
|
|
read_unlock(&vmlist_lock);
|
|
|
|
if (!p) {
|
|
pr_err("iounmap: bad address %p\n", addr);
|
|
dump_stack();
|
|
return;
|
|
}
|
|
|
|
/* Finally remove it */
|
|
o = remove_vm_area((void *)addr);
|
|
BUG_ON(p != o || o == NULL);
|
|
kfree(p);
|
|
#endif
|
|
}
|
|
EXPORT_SYMBOL(iounmap);
|
|
|
|
#endif /* CHIP_HAS_MMIO() */
|