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7604537bbb
Current implementation of cpu_{suspend}/cpu_{resume} relies on the MPIDR
to index the array of pointers where the context is saved and restored.
The current approach works as long as the MPIDR can be considered a
linear index, so that the pointers array can simply be dereferenced by
using the MPIDR[7:0] value.
On ARM multi-cluster systems, where the MPIDR may not be a linear index,
to properly dereference the stack pointer array, a mapping function should
be applied to it so that it can be used for arrays look-ups.
This patch adds code in the cpu_{suspend}/cpu_{resume} implementation
that relies on shifting and ORing hashing method to map a MPIDR value to a
set of buckets precomputed at boot to have a collision free mapping from
MPIDR to context pointers.
The hashing algorithm must be simple, fast, and implementable with few
instructions since in the cpu_resume path the mapping is carried out with
the MMU off and the I-cache off, hence code and data are fetched from DRAM
with no-caching available. Simplicity is counterbalanced with a little
increase of memory (allocated dynamically) for stack pointers buckets, that
should be anyway fairly limited on most systems.
Memory for context pointers is allocated in a early_initcall with
size precomputed and stashed previously in kernel data structures.
Memory for context pointers is allocated through kmalloc; this
guarantees contiguous physical addresses for the allocated memory which
is fundamental to the correct functioning of the resume mechanism that
relies on the context pointer array to be a chunk of contiguous physical
memory. Virtual to physical address conversion for the context pointer
array base is carried out at boot to avoid fiddling with virt_to_phys
conversions in the cpu_resume path which is quite fragile and should be
optimized to execute as few instructions as possible.
Virtual and physical context pointer base array addresses are stashed in a
struct that is accessible from assembly using values generated through the
asm-offsets.c mechanism.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Colin Cross <ccross@android.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
#include <linux/init.h>
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/idmap.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/memory.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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extern int __cpu_suspend(unsigned long, int (*)(unsigned long));
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extern void cpu_resume_mmu(void);
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#ifdef CONFIG_MMU
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/*
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* Hide the first two arguments to __cpu_suspend - these are an implementation
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* detail which platform code shouldn't have to know about.
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*/
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int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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{
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struct mm_struct *mm = current->active_mm;
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int ret;
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if (!idmap_pgd)
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return -EINVAL;
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/*
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* Provide a temporary page table with an identity mapping for
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* the MMU-enable code, required for resuming. On successful
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* resume (indicated by a zero return code), we need to switch
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* back to the correct page tables.
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*/
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ret = __cpu_suspend(arg, fn);
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if (ret == 0) {
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cpu_switch_mm(mm->pgd, mm);
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local_flush_bp_all();
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local_flush_tlb_all();
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}
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return ret;
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}
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#else
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int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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{
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return __cpu_suspend(arg, fn);
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}
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#define idmap_pgd NULL
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#endif
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/*
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* This is called by __cpu_suspend() to save the state, and do whatever
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* flushing is required to ensure that when the CPU goes to sleep we have
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* the necessary data available when the caches are not searched.
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*/
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void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
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{
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u32 *ctx = ptr;
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*save_ptr = virt_to_phys(ptr);
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/* This must correspond to the LDM in cpu_resume() assembly */
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*ptr++ = virt_to_phys(idmap_pgd);
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*ptr++ = sp;
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*ptr++ = virt_to_phys(cpu_do_resume);
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cpu_do_suspend(ptr);
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flush_cache_louis();
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/*
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* flush_cache_louis does not guarantee that
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* save_ptr and ptr are cleaned to main memory,
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* just up to the Level of Unification Inner Shareable.
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* Since the context pointer and context itself
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* are to be retrieved with the MMU off that
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* data must be cleaned from all cache levels
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* to main memory using "area" cache primitives.
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*/
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__cpuc_flush_dcache_area(ctx, ptrsz);
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__cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
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outer_clean_range(*save_ptr, *save_ptr + ptrsz);
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outer_clean_range(virt_to_phys(save_ptr),
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virt_to_phys(save_ptr) + sizeof(*save_ptr));
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}
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extern struct sleep_save_sp sleep_save_sp;
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static int cpu_suspend_alloc_sp(void)
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{
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void *ctx_ptr;
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/* ctx_ptr is an array of physical addresses */
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ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
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if (WARN_ON(!ctx_ptr))
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return -ENOMEM;
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sleep_save_sp.save_ptr_stash = ctx_ptr;
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sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
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sync_cache_w(&sleep_save_sp);
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return 0;
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}
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early_initcall(cpu_suspend_alloc_sp);
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