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The H3 SoC have a bigger SID controller, which has its direct read address at 0x200 position in the SID block, not 0x0. Also, H3 SID controller has some silicon bug that makes the direct read value wrong at cold boot, add code to workaround the bug. (This bug has already been fixed on A64 and later SoCs) Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
26 lines
543 B
Plaintext
26 lines
543 B
Plaintext
Allwinner sunxi-sid
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Required properties:
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- compatible: Should be one of the following:
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"allwinner,sun4i-a10-sid"
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"allwinner,sun7i-a20-sid"
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"allwinner,sun8i-h3-sid"
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- reg: Should contain registers location and length
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= Data cells =
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Are child nodes of qfprom, bindings of which as described in
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bindings/nvmem/nvmem.txt
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Example for sun4i:
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sid@01c23800 {
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compatible = "allwinner,sun4i-a10-sid";
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reg = <0x01c23800 0x10>
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};
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Example for sun7i:
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sid@01c23800 {
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compatible = "allwinner,sun7i-a20-sid";
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reg = <0x01c23800 0x200>
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};
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