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JESD216D.01 says that when the address width can be 3 or 4, it defaults to 3 and enters 4-byte mode when given the appropriate command. So, when we see a configurable width, default to 3 and let flash that default to 4 change it in a post-bfpt fixup. This fixes SMPT parsing for flashes with configurable address width. If the SMPT descriptor advertises variable address width, we use nor->addr_width as the address width. But since it was not set to any value from the SFDP table, the read command uses an address width of 0, resulting in an incorrect read being issued. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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| .. | ||
| controllers | ||
| atmel.c | ||
| catalyst.c | ||
| core.c | ||
| core.h | ||
| eon.c | ||
| esmt.c | ||
| everspin.c | ||
| fujitsu.c | ||
| gigadevice.c | ||
| intel.c | ||
| issi.c | ||
| Kconfig | ||
| macronix.c | ||
| Makefile | ||
| micron-st.c | ||
| sfdp.c | ||
| sfdp.h | ||
| spansion.c | ||
| sst.c | ||
| winbond.c | ||
| xilinx.c | ||
| xmc.c | ||