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Up to ARMv8.3, the combinaison of Stage-1 and Stage-2 attributes results in the strongest attribute of the two stages. This means that the hypervisor has to perform quite a lot of cache maintenance just in case the guest has some non-cacheable mappings around. ARMv8.4 solves this problem by offering a different mode (FWB) where Stage-2 has total control over the memory attribute (this is limited to systems where both I/O and instruction fetches are coherent with the dcache). This is achieved by having a different set of memory attributes in the page tables, and a new bit set in HCR_EL2. On such a system, we can then safely sidestep any form of dcache management. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
313 lines
9.3 KiB
C
313 lines
9.3 KiB
C
/*
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* Based on arch/arm/include/asm/memory.h
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*
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* Copyright (C) 2000-2002 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Note: this file should not be included by non-asm/.h files
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*/
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#ifndef __ASM_MEMORY_H
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#define __ASM_MEMORY_H
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#include <linux/compiler.h>
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#include <linux/const.h>
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#include <linux/types.h>
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#include <asm/bug.h>
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#include <asm/page-def.h>
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#include <asm/sizes.h>
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/*
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* Size of the PCI I/O space. This must remain a power of two so that
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* IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses.
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*/
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#define PCI_IO_SIZE SZ_16M
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/*
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* Log2 of the upper bound of the size of a struct page. Used for sizing
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* the vmemmap region only, does not affect actual memory footprint.
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* We don't use sizeof(struct page) directly since taking its size here
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* requires its definition to be available at this point in the inclusion
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* chain, and it may not be a power of 2 in the first place.
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*/
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#define STRUCT_PAGE_MAX_SHIFT 6
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/*
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* VMEMMAP_SIZE - allows the whole linear region to be covered by
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* a struct page array
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*/
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#define VMEMMAP_SIZE (UL(1) << (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT))
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/*
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* PAGE_OFFSET - the virtual address of the start of the linear map (top
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* (VA_BITS - 1))
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* KIMAGE_VADDR - the virtual address of the start of the kernel image
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* VA_BITS - the maximum number of bits for virtual addresses.
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* VA_START - the first kernel virtual address.
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*/
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#define VA_BITS (CONFIG_ARM64_VA_BITS)
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#define VA_START (UL(0xffffffffffffffff) - \
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(UL(1) << VA_BITS) + 1)
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#define PAGE_OFFSET (UL(0xffffffffffffffff) - \
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(UL(1) << (VA_BITS - 1)) + 1)
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#define KIMAGE_VADDR (MODULES_END)
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#define MODULES_END (MODULES_VADDR + MODULES_VSIZE)
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#define MODULES_VADDR (VA_START + KASAN_SHADOW_SIZE)
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#define MODULES_VSIZE (SZ_128M)
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#define VMEMMAP_START (PAGE_OFFSET - VMEMMAP_SIZE)
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#define PCI_IO_END (VMEMMAP_START - SZ_2M)
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#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
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#define FIXADDR_TOP (PCI_IO_START - SZ_2M)
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#define KERNEL_START _text
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#define KERNEL_END _end
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/*
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* KASAN requires 1/8th of the kernel virtual address space for the shadow
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* region. KASAN can bloat the stack significantly, so double the (minimum)
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* stack size when KASAN is in use.
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*/
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#ifdef CONFIG_KASAN
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#define KASAN_SHADOW_SCALE_SHIFT 3
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#define KASAN_SHADOW_SIZE (UL(1) << (VA_BITS - KASAN_SHADOW_SCALE_SHIFT))
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#define KASAN_THREAD_SHIFT 1
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#else
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#define KASAN_SHADOW_SIZE (0)
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#define KASAN_THREAD_SHIFT 0
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#endif
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#define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT)
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/*
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* VMAP'd stacks are allocated at page granularity, so we must ensure that such
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* stacks are a multiple of page size.
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*/
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#if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT)
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#define THREAD_SHIFT PAGE_SHIFT
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#else
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#define THREAD_SHIFT MIN_THREAD_SHIFT
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#endif
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#if THREAD_SHIFT >= PAGE_SHIFT
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#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
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#endif
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#define THREAD_SIZE (UL(1) << THREAD_SHIFT)
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/*
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* By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
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* checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
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* assembly.
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*/
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#ifdef CONFIG_VMAP_STACK
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#define THREAD_ALIGN (2 * THREAD_SIZE)
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#else
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#define THREAD_ALIGN THREAD_SIZE
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#endif
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#define IRQ_STACK_SIZE THREAD_SIZE
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#define OVERFLOW_STACK_SIZE SZ_4K
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/*
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* Alignment of kernel segments (e.g. .text, .data).
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*/
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#if defined(CONFIG_DEBUG_ALIGN_RODATA)
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/*
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* 4 KB granule: 1 level 2 entry
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* 16 KB granule: 128 level 3 entries, with contiguous bit
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* 64 KB granule: 32 level 3 entries, with contiguous bit
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*/
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#define SEGMENT_ALIGN SZ_2M
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#else
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/*
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* 4 KB granule: 16 level 3 entries, with contiguous bit
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* 16 KB granule: 4 level 3 entries, without contiguous bit
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* 64 KB granule: 1 level 3 entry
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*/
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#define SEGMENT_ALIGN SZ_64K
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#endif
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/*
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* Memory types available.
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*/
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#define MT_DEVICE_nGnRnE 0
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#define MT_DEVICE_nGnRE 1
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#define MT_DEVICE_GRE 2
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#define MT_NORMAL_NC 3
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#define MT_NORMAL 4
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#define MT_NORMAL_WT 5
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/*
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* Memory types for Stage-2 translation
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*/
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#define MT_S2_NORMAL 0xf
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#define MT_S2_DEVICE_nGnRE 0x1
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/*
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* Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001
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* Stage-2 enforces Normal-WB and Device-nGnRE
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*/
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#define MT_S2_FWB_NORMAL 6
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#define MT_S2_FWB_DEVICE_nGnRE 1
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#ifdef CONFIG_ARM64_4K_PAGES
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#define IOREMAP_MAX_ORDER (PUD_SHIFT)
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#else
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#define IOREMAP_MAX_ORDER (PMD_SHIFT)
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#endif
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#ifdef CONFIG_BLK_DEV_INITRD
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#define __early_init_dt_declare_initrd(__start, __end) \
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do { \
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initrd_start = (__start); \
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initrd_end = (__end); \
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} while (0)
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#include <linux/mmdebug.h>
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extern s64 memstart_addr;
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/* PHYS_OFFSET - the physical address of the start of memory. */
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#define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
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/* the virtual base of the kernel image (minus TEXT_OFFSET) */
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extern u64 kimage_vaddr;
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/* the offset between the kernel virtual and physical mappings */
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extern u64 kimage_voffset;
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static inline unsigned long kaslr_offset(void)
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{
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return kimage_vaddr - KIMAGE_VADDR;
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}
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/*
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* Allow all memory at the discovery stage. We will clip it later.
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*/
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#define MIN_MEMBLOCK_ADDR 0
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#define MAX_MEMBLOCK_ADDR U64_MAX
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/*
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* PFNs are used to describe any physical page; this means
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* PFN 0 == physical address 0.
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*
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* This is the PFN of the first RAM page in the kernel
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* direct-mapped view. We assume this is the first page
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* of RAM in the mem_map as well.
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*/
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#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
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/*
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* Physical vs virtual RAM address space conversion. These are
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* private definitions which should NOT be used outside memory.h
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* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
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*/
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/*
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* The linear kernel range starts in the middle of the virtual adddress
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* space. Testing the top bit for the start of the region is a
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* sufficient check.
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*/
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#define __is_lm_address(addr) (!!((addr) & BIT(VA_BITS - 1)))
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#define __lm_to_phys(addr) (((addr) & ~PAGE_OFFSET) + PHYS_OFFSET)
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#define __kimg_to_phys(addr) ((addr) - kimage_voffset)
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#define __virt_to_phys_nodebug(x) ({ \
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phys_addr_t __x = (phys_addr_t)(x); \
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__is_lm_address(__x) ? __lm_to_phys(__x) : \
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__kimg_to_phys(__x); \
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})
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#define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x))
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#ifdef CONFIG_DEBUG_VIRTUAL
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extern phys_addr_t __virt_to_phys(unsigned long x);
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extern phys_addr_t __phys_addr_symbol(unsigned long x);
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#else
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#define __virt_to_phys(x) __virt_to_phys_nodebug(x)
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#define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
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#endif
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#define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
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#define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
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/*
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* Convert a page to/from a physical address
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*/
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#define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
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#define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
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/*
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* Note: Drivers should NOT use these. They are the wrong
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* translation for translating DMA addresses. Use the driver
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* DMA support - see dma-mapping.h.
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*/
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#define virt_to_phys virt_to_phys
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static inline phys_addr_t virt_to_phys(const volatile void *x)
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{
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return __virt_to_phys((unsigned long)(x));
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}
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#define phys_to_virt phys_to_virt
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static inline void *phys_to_virt(phys_addr_t x)
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{
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return (void *)(__phys_to_virt(x));
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}
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/*
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* Drivers should NOT use these either.
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*/
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#define __pa(x) __virt_to_phys((unsigned long)(x))
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#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
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#define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
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#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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#define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x)))
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#define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
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/*
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* virt_to_page(k) convert a _valid_ virtual address to struct page *
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* virt_addr_valid(k) indicates whether a virtual address is valid
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*/
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#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
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#ifndef CONFIG_SPARSEMEM_VMEMMAP
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#define _virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#else
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#define __virt_to_pgoff(kaddr) (((u64)(kaddr) & ~PAGE_OFFSET) / PAGE_SIZE * sizeof(struct page))
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#define __page_to_voff(kaddr) (((u64)(kaddr) & ~VMEMMAP_START) * PAGE_SIZE / sizeof(struct page))
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#define page_to_virt(page) ((void *)((__page_to_voff(page)) | PAGE_OFFSET))
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#define virt_to_page(vaddr) ((struct page *)((__virt_to_pgoff(vaddr)) | VMEMMAP_START))
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#define _virt_addr_valid(kaddr) pfn_valid((((u64)(kaddr) & ~PAGE_OFFSET) \
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+ PHYS_OFFSET) >> PAGE_SHIFT)
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#endif
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#endif
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#define _virt_addr_is_linear(kaddr) (((u64)(kaddr)) >= PAGE_OFFSET)
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#define virt_addr_valid(kaddr) (_virt_addr_is_linear(kaddr) && \
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_virt_addr_valid(kaddr))
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#include <asm-generic/memory_model.h>
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#endif
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