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2c1583290b
Introduce a new link mode necessary for 10 MBit single-pair connection in BroadR-Reach mode on bcm5481x PHY by Broadcom. This new link mode, 10baseT1BRR, is known as 1BR10 in the Broadcom terminology. Another link mode to be used is 1BR100 and it is already present as 100baseT1, because Broadcom's 1BR100 became 100baseT1 (IEEE 802.3bw). Signed-off-by: Kamil Horák (2N) <kamilh@axis.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20240712150709.3134474-2-kamilh@axis.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
1152 lines
32 KiB
C
1152 lines
32 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Core PHY library, taken from phy.c
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*/
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#include <linux/export.h>
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#include <linux/phy.h>
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#include <linux/of.h>
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/**
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* phy_speed_to_str - Return a string representing the PHY link speed
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*
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* @speed: Speed of the link
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*/
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const char *phy_speed_to_str(int speed)
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{
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BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 103,
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"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
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"If a speed or mode has been added please update phy_speed_to_str "
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"and the PHY settings array.\n");
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switch (speed) {
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case SPEED_10:
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return "10Mbps";
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case SPEED_100:
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return "100Mbps";
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case SPEED_1000:
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return "1Gbps";
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case SPEED_2500:
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return "2.5Gbps";
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case SPEED_5000:
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return "5Gbps";
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case SPEED_10000:
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return "10Gbps";
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case SPEED_14000:
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return "14Gbps";
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case SPEED_20000:
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return "20Gbps";
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case SPEED_25000:
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return "25Gbps";
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case SPEED_40000:
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return "40Gbps";
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case SPEED_50000:
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return "50Gbps";
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case SPEED_56000:
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return "56Gbps";
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case SPEED_100000:
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return "100Gbps";
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case SPEED_200000:
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return "200Gbps";
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case SPEED_400000:
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return "400Gbps";
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case SPEED_800000:
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return "800Gbps";
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case SPEED_UNKNOWN:
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return "Unknown";
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default:
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return "Unsupported (update phy-core.c)";
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}
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}
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EXPORT_SYMBOL_GPL(phy_speed_to_str);
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/**
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* phy_duplex_to_str - Return string describing the duplex
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*
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* @duplex: Duplex setting to describe
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*/
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const char *phy_duplex_to_str(unsigned int duplex)
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{
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if (duplex == DUPLEX_HALF)
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return "Half";
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if (duplex == DUPLEX_FULL)
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return "Full";
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if (duplex == DUPLEX_UNKNOWN)
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return "Unknown";
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return "Unsupported (update phy-core.c)";
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}
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EXPORT_SYMBOL_GPL(phy_duplex_to_str);
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/**
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* phy_rate_matching_to_str - Return a string describing the rate matching
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*
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* @rate_matching: Type of rate matching to describe
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*/
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const char *phy_rate_matching_to_str(int rate_matching)
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{
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switch (rate_matching) {
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case RATE_MATCH_NONE:
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return "none";
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case RATE_MATCH_PAUSE:
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return "pause";
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case RATE_MATCH_CRS:
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return "crs";
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case RATE_MATCH_OPEN_LOOP:
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return "open-loop";
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}
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return "Unsupported (update phy-core.c)";
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}
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EXPORT_SYMBOL_GPL(phy_rate_matching_to_str);
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/**
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* phy_interface_num_ports - Return the number of links that can be carried by
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* a given MAC-PHY physical link. Returns 0 if this is
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* unknown, the number of links else.
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*
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* @interface: The interface mode we want to get the number of ports
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*/
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int phy_interface_num_ports(phy_interface_t interface)
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{
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switch (interface) {
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case PHY_INTERFACE_MODE_NA:
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return 0;
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case PHY_INTERFACE_MODE_INTERNAL:
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_GMII:
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case PHY_INTERFACE_MODE_TBI:
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case PHY_INTERFACE_MODE_REVMII:
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case PHY_INTERFACE_MODE_RMII:
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case PHY_INTERFACE_MODE_REVRMII:
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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case PHY_INTERFACE_MODE_RTBI:
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case PHY_INTERFACE_MODE_XGMII:
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case PHY_INTERFACE_MODE_XLGMII:
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case PHY_INTERFACE_MODE_MOCA:
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case PHY_INTERFACE_MODE_TRGMII:
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case PHY_INTERFACE_MODE_USXGMII:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_SMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_2500BASEX:
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case PHY_INTERFACE_MODE_5GBASER:
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case PHY_INTERFACE_MODE_10GBASER:
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case PHY_INTERFACE_MODE_25GBASER:
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case PHY_INTERFACE_MODE_10GKR:
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case PHY_INTERFACE_MODE_100BASEX:
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case PHY_INTERFACE_MODE_RXAUI:
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case PHY_INTERFACE_MODE_XAUI:
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case PHY_INTERFACE_MODE_1000BASEKX:
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return 1;
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_QUSGMII:
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case PHY_INTERFACE_MODE_10G_QXGMII:
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return 4;
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case PHY_INTERFACE_MODE_PSGMII:
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return 5;
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case PHY_INTERFACE_MODE_MAX:
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WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
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return 0;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(phy_interface_num_ports);
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/* A mapping of all SUPPORTED settings to speed/duplex. This table
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* must be grouped by speed and sorted in descending match priority
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* - iow, descending speed.
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*/
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#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
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.bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
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static const struct phy_setting settings[] = {
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/* 800G */
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PHY_SETTING( 800000, FULL, 800000baseCR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseKR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseDR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ),
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PHY_SETTING( 800000, FULL, 800000baseSR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),
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/* 400G */
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PHY_SETTING( 400000, FULL, 400000baseCR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseDR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseSR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseCR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseKR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseDR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseSR4_Full ),
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/* 200G */
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PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseCR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseKR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseDR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseSR2_Full ),
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/* 100G */
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PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseCR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseKR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseDR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseSR_Full ),
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/* 56G */
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PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
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PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
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PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
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PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
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/* 50G */
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PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
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PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
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PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
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PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
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/* 40G */
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PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
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PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
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PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
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PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
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/* 25G */
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PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
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PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
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PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
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/* 20G */
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PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
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PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
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/* 10G */
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PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseER_Full ),
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PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
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PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
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PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
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PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseT_Full ),
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/* 5G */
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PHY_SETTING( 5000, FULL, 5000baseT_Full ),
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/* 2.5G */
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PHY_SETTING( 2500, FULL, 2500baseT_Full ),
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PHY_SETTING( 2500, FULL, 2500baseX_Full ),
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/* 1G */
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PHY_SETTING( 1000, FULL, 1000baseT_Full ),
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PHY_SETTING( 1000, HALF, 1000baseT_Half ),
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PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
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PHY_SETTING( 1000, FULL, 1000baseX_Full ),
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PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
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/* 100M */
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PHY_SETTING( 100, FULL, 100baseT_Full ),
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PHY_SETTING( 100, FULL, 100baseT1_Full ),
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PHY_SETTING( 100, HALF, 100baseT_Half ),
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PHY_SETTING( 100, HALF, 100baseFX_Half ),
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PHY_SETTING( 100, FULL, 100baseFX_Full ),
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/* 10M */
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PHY_SETTING( 10, FULL, 10baseT_Full ),
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PHY_SETTING( 10, HALF, 10baseT_Half ),
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PHY_SETTING( 10, FULL, 10baseT1L_Full ),
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PHY_SETTING( 10, FULL, 10baseT1S_Full ),
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PHY_SETTING( 10, HALF, 10baseT1S_Half ),
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PHY_SETTING( 10, HALF, 10baseT1S_P2MP_Half ),
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PHY_SETTING( 10, FULL, 10baseT1BRR_Full ),
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};
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#undef PHY_SETTING
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/**
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* phy_lookup_setting - lookup a PHY setting
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* @speed: speed to match
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* @duplex: duplex to match
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* @mask: allowed link modes
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* @exact: an exact match is required
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*
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* Search the settings array for a setting that matches the speed and
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* duplex, and which is supported.
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*
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* If @exact is unset, either an exact match or %NULL for no match will
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* be returned.
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*
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* If @exact is set, an exact match, the fastest supported setting at
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* or below the specified speed, the slowest supported setting, or if
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* they all fail, %NULL will be returned.
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*/
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const struct phy_setting *
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phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
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{
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const struct phy_setting *p, *match = NULL, *last = NULL;
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int i;
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for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
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if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
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test_bit(p->bit, mask)) {
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last = p;
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if (p->speed == speed && p->duplex == duplex) {
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/* Exact match for speed and duplex */
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match = p;
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break;
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} else if (!exact) {
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if (!match && p->speed <= speed)
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/* Candidate */
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match = p;
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if (p->speed < speed)
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break;
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}
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}
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}
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if (!match && !exact)
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match = last;
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return match;
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}
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EXPORT_SYMBOL_GPL(phy_lookup_setting);
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size_t phy_speeds(unsigned int *speeds, size_t size,
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unsigned long *mask)
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{
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size_t count;
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int i;
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for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
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if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
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test_bit(settings[i].bit, mask) &&
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(count == 0 || speeds[count - 1] != settings[i].speed))
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speeds[count++] = settings[i].speed;
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return count;
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}
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static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
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{
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const struct phy_setting *p;
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int i;
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for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
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if (p->speed > max_speed)
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linkmode_clear_bit(p->bit, addr);
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else
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break;
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}
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}
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static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
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{
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__set_linkmode_max_speed(max_speed, phydev->supported);
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}
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/**
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* phy_set_max_speed - Set the maximum speed the PHY should support
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*
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* @phydev: The phy_device struct
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* @max_speed: Maximum speed
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*
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* The PHY might be more capable than the MAC. For example a Fast Ethernet
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* is connected to a 1G PHY. This function allows the MAC to indicate its
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* maximum speed, and so limit what the PHY will advertise.
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*/
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void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
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{
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__set_phy_supported(phydev, max_speed);
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phy_advertise_supported(phydev);
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}
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EXPORT_SYMBOL(phy_set_max_speed);
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void of_set_phy_supported(struct phy_device *phydev)
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{
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struct device_node *node = phydev->mdio.dev.of_node;
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u32 max_speed;
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if (!IS_ENABLED(CONFIG_OF_MDIO))
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return;
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if (!node)
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return;
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if (!of_property_read_u32(node, "max-speed", &max_speed))
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__set_phy_supported(phydev, max_speed);
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}
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void of_set_phy_eee_broken(struct phy_device *phydev)
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{
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struct device_node *node = phydev->mdio.dev.of_node;
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u32 broken = 0;
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if (!IS_ENABLED(CONFIG_OF_MDIO))
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return;
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if (!node)
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return;
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if (of_property_read_bool(node, "eee-broken-100tx"))
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broken |= MDIO_EEE_100TX;
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if (of_property_read_bool(node, "eee-broken-1000t"))
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broken |= MDIO_EEE_1000T;
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if (of_property_read_bool(node, "eee-broken-10gt"))
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broken |= MDIO_EEE_10GT;
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if (of_property_read_bool(node, "eee-broken-1000kx"))
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broken |= MDIO_EEE_1000KX;
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if (of_property_read_bool(node, "eee-broken-10gkx4"))
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broken |= MDIO_EEE_10GKX4;
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if (of_property_read_bool(node, "eee-broken-10gkr"))
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broken |= MDIO_EEE_10GKR;
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phydev->eee_broken_modes = broken;
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}
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/**
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* phy_resolve_aneg_pause - Determine pause autoneg results
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*
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* @phydev: The phy_device struct
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*
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* Once autoneg has completed the local pause settings can be
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* resolved. Determine if pause and asymmetric pause should be used
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* by the MAC.
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*/
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void phy_resolve_aneg_pause(struct phy_device *phydev)
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{
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if (phydev->duplex == DUPLEX_FULL) {
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phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
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phydev->lp_advertising);
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phydev->asym_pause = linkmode_test_bit(
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ETHTOOL_LINK_MODE_Asym_Pause_BIT,
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phydev->lp_advertising);
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}
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}
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EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
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/**
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* phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
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* @phydev: The phy_device struct
|
|
*
|
|
* Resolve our and the link partner advertisements into their corresponding
|
|
* speed and duplex. If full duplex was negotiated, extract the pause mode
|
|
* from the link partner mask.
|
|
*/
|
|
void phy_resolve_aneg_linkmode(struct phy_device *phydev)
|
|
{
|
|
__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
|
|
int i;
|
|
|
|
linkmode_and(common, phydev->lp_advertising, phydev->advertising);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(settings); i++)
|
|
if (test_bit(settings[i].bit, common)) {
|
|
phydev->speed = settings[i].speed;
|
|
phydev->duplex = settings[i].duplex;
|
|
break;
|
|
}
|
|
|
|
phy_resolve_aneg_pause(phydev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
|
|
|
|
/**
|
|
* phy_check_downshift - check whether downshift occurred
|
|
* @phydev: The phy_device struct
|
|
*
|
|
* Check whether a downshift to a lower speed occurred. If this should be the
|
|
* case warn the user.
|
|
* Prerequisite for detecting downshift is that PHY driver implements the
|
|
* read_status callback and sets phydev->speed to the actual link speed.
|
|
*/
|
|
void phy_check_downshift(struct phy_device *phydev)
|
|
{
|
|
__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
|
|
int i, speed = SPEED_UNKNOWN;
|
|
|
|
phydev->downshifted_rate = 0;
|
|
|
|
if (phydev->autoneg == AUTONEG_DISABLE ||
|
|
phydev->speed == SPEED_UNKNOWN)
|
|
return;
|
|
|
|
linkmode_and(common, phydev->lp_advertising, phydev->advertising);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(settings); i++)
|
|
if (test_bit(settings[i].bit, common)) {
|
|
speed = settings[i].speed;
|
|
break;
|
|
}
|
|
|
|
if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
|
|
return;
|
|
|
|
phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
|
|
phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
|
|
|
|
phydev->downshifted_rate = 1;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_check_downshift);
|
|
|
|
static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
|
|
{
|
|
__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
|
|
int i = ARRAY_SIZE(settings);
|
|
|
|
linkmode_and(common, phydev->lp_advertising, phydev->advertising);
|
|
|
|
while (--i >= 0) {
|
|
if (test_bit(settings[i].bit, common)) {
|
|
if (fdx_only && settings[i].duplex != DUPLEX_FULL)
|
|
continue;
|
|
return settings[i].speed;
|
|
}
|
|
}
|
|
|
|
return SPEED_UNKNOWN;
|
|
}
|
|
|
|
int phy_speed_down_core(struct phy_device *phydev)
|
|
{
|
|
int min_common_speed = phy_resolve_min_speed(phydev, true);
|
|
|
|
if (min_common_speed == SPEED_UNKNOWN)
|
|
return -EINVAL;
|
|
|
|
__set_linkmode_max_speed(min_common_speed, phydev->advertising);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
|
|
u16 regnum)
|
|
{
|
|
/* Write the desired MMD Devad */
|
|
__mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
|
|
|
|
/* Write the desired MMD register address */
|
|
__mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
|
|
|
|
/* Select the Function : DATA with no post increment */
|
|
__mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
|
|
devad | MII_MMD_CTRL_NOINCR);
|
|
}
|
|
|
|
static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
|
|
int devad, u32 regnum)
|
|
{
|
|
if (is_c45)
|
|
return __mdiobus_c45_read(bus, phy_addr, devad, regnum);
|
|
|
|
mmd_phy_indirect(bus, phy_addr, devad, regnum);
|
|
/* Read the content of the MMD's selected register */
|
|
return __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
|
|
}
|
|
|
|
static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
|
|
int devad, u32 regnum, u16 val)
|
|
{
|
|
if (is_c45)
|
|
return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val);
|
|
|
|
mmd_phy_indirect(bus, phy_addr, devad, regnum);
|
|
/* Write the data into MMD's selected register */
|
|
return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
|
|
}
|
|
|
|
/**
|
|
* __phy_read_mmd - Convenience function for reading a register
|
|
* from an MMD on a given PHY.
|
|
* @phydev: The phy_device struct
|
|
* @devad: The MMD to read from (0..31)
|
|
* @regnum: The register on the MMD to read (0..65535)
|
|
*
|
|
* Same rules as for __phy_read();
|
|
*/
|
|
int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
|
|
{
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
if (phydev->drv && phydev->drv->read_mmd)
|
|
return phydev->drv->read_mmd(phydev, devad, regnum);
|
|
|
|
return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
|
|
phydev->is_c45, devad, regnum);
|
|
}
|
|
EXPORT_SYMBOL(__phy_read_mmd);
|
|
|
|
/**
|
|
* phy_read_mmd - Convenience function for reading a register
|
|
* from an MMD on a given PHY.
|
|
* @phydev: The phy_device struct
|
|
* @devad: The MMD to read from
|
|
* @regnum: The register on the MMD to read
|
|
*
|
|
* Same rules as for phy_read();
|
|
*/
|
|
int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
|
|
{
|
|
int ret;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = __phy_read_mmd(phydev, devad, regnum);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(phy_read_mmd);
|
|
|
|
/**
|
|
* __phy_write_mmd - Convenience function for writing a register
|
|
* on an MMD on a given PHY.
|
|
* @phydev: The phy_device struct
|
|
* @devad: The MMD to read from
|
|
* @regnum: The register on the MMD to read
|
|
* @val: value to write to @regnum
|
|
*
|
|
* Same rules as for __phy_write();
|
|
*/
|
|
int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
|
|
{
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
if (phydev->drv && phydev->drv->write_mmd)
|
|
return phydev->drv->write_mmd(phydev, devad, regnum, val);
|
|
|
|
return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr,
|
|
phydev->is_c45, devad, regnum, val);
|
|
}
|
|
EXPORT_SYMBOL(__phy_write_mmd);
|
|
|
|
/**
|
|
* phy_write_mmd - Convenience function for writing a register
|
|
* on an MMD on a given PHY.
|
|
* @phydev: The phy_device struct
|
|
* @devad: The MMD to read from
|
|
* @regnum: The register on the MMD to read
|
|
* @val: value to write to @regnum
|
|
*
|
|
* Same rules as for phy_write();
|
|
*/
|
|
int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
|
|
{
|
|
int ret;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = __phy_write_mmd(phydev, devad, regnum, val);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(phy_write_mmd);
|
|
|
|
/**
|
|
* __phy_package_read_mmd - read MMD reg relative to PHY package base addr
|
|
* @phydev: The phy_device struct
|
|
* @addr_offset: The offset to be added to PHY package base_addr
|
|
* @devad: The MMD to read from
|
|
* @regnum: The register on the MMD to read
|
|
*
|
|
* Convenience helper for reading a register of an MMD on a given PHY
|
|
* using the PHY package base address. The base address is added to
|
|
* the addr_offset value.
|
|
*
|
|
* Same calling rules as for __phy_read();
|
|
*
|
|
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
|
|
*/
|
|
int __phy_package_read_mmd(struct phy_device *phydev,
|
|
unsigned int addr_offset, int devad,
|
|
u32 regnum)
|
|
{
|
|
int addr = phy_package_address(phydev, addr_offset);
|
|
|
|
if (addr < 0)
|
|
return addr;
|
|
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
return mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
|
|
regnum);
|
|
}
|
|
EXPORT_SYMBOL(__phy_package_read_mmd);
|
|
|
|
/**
|
|
* phy_package_read_mmd - read MMD reg relative to PHY package base addr
|
|
* @phydev: The phy_device struct
|
|
* @addr_offset: The offset to be added to PHY package base_addr
|
|
* @devad: The MMD to read from
|
|
* @regnum: The register on the MMD to read
|
|
*
|
|
* Convenience helper for reading a register of an MMD on a given PHY
|
|
* using the PHY package base address. The base address is added to
|
|
* the addr_offset value.
|
|
*
|
|
* Same calling rules as for phy_read();
|
|
*
|
|
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
|
|
*/
|
|
int phy_package_read_mmd(struct phy_device *phydev,
|
|
unsigned int addr_offset, int devad,
|
|
u32 regnum)
|
|
{
|
|
int addr = phy_package_address(phydev, addr_offset);
|
|
int val;
|
|
|
|
if (addr < 0)
|
|
return addr;
|
|
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
val = mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
|
|
regnum);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return val;
|
|
}
|
|
EXPORT_SYMBOL(phy_package_read_mmd);
|
|
|
|
/**
|
|
* __phy_package_write_mmd - write MMD reg relative to PHY package base addr
|
|
* @phydev: The phy_device struct
|
|
* @addr_offset: The offset to be added to PHY package base_addr
|
|
* @devad: The MMD to write to
|
|
* @regnum: The register on the MMD to write
|
|
* @val: value to write to @regnum
|
|
*
|
|
* Convenience helper for writing a register of an MMD on a given PHY
|
|
* using the PHY package base address. The base address is added to
|
|
* the addr_offset value.
|
|
*
|
|
* Same calling rules as for __phy_write();
|
|
*
|
|
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
|
|
*/
|
|
int __phy_package_write_mmd(struct phy_device *phydev,
|
|
unsigned int addr_offset, int devad,
|
|
u32 regnum, u16 val)
|
|
{
|
|
int addr = phy_package_address(phydev, addr_offset);
|
|
|
|
if (addr < 0)
|
|
return addr;
|
|
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
return mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
|
|
regnum, val);
|
|
}
|
|
EXPORT_SYMBOL(__phy_package_write_mmd);
|
|
|
|
/**
|
|
* phy_package_write_mmd - write MMD reg relative to PHY package base addr
|
|
* @phydev: The phy_device struct
|
|
* @addr_offset: The offset to be added to PHY package base_addr
|
|
* @devad: The MMD to write to
|
|
* @regnum: The register on the MMD to write
|
|
* @val: value to write to @regnum
|
|
*
|
|
* Convenience helper for writing a register of an MMD on a given PHY
|
|
* using the PHY package base address. The base address is added to
|
|
* the addr_offset value.
|
|
*
|
|
* Same calling rules as for phy_write();
|
|
*
|
|
* NOTE: It's assumed that the entire PHY package is either C22 or C45.
|
|
*/
|
|
int phy_package_write_mmd(struct phy_device *phydev,
|
|
unsigned int addr_offset, int devad,
|
|
u32 regnum, u16 val)
|
|
{
|
|
int addr = phy_package_address(phydev, addr_offset);
|
|
int ret;
|
|
|
|
if (addr < 0)
|
|
return addr;
|
|
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
|
|
regnum, val);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(phy_package_write_mmd);
|
|
|
|
/**
|
|
* phy_modify_changed - Function for modifying a PHY register
|
|
* @phydev: the phy_device struct
|
|
* @regnum: register number to modify
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* NOTE: MUST NOT be called from interrupt context,
|
|
* because the bus read/write functions may wait for an interrupt
|
|
* to conclude the operation.
|
|
*
|
|
* Returns negative errno, 0 if there was no change, and 1 in case of change
|
|
*/
|
|
int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
|
|
{
|
|
int ret;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = __phy_modify_changed(phydev, regnum, mask, set);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_modify_changed);
|
|
|
|
/**
|
|
* __phy_modify - Convenience function for modifying a PHY register
|
|
* @phydev: the phy_device struct
|
|
* @regnum: register number to modify
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* NOTE: MUST NOT be called from interrupt context,
|
|
* because the bus read/write functions may wait for an interrupt
|
|
* to conclude the operation.
|
|
*/
|
|
int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
|
|
{
|
|
int ret;
|
|
|
|
ret = __phy_modify_changed(phydev, regnum, mask, set);
|
|
|
|
return ret < 0 ? ret : 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(__phy_modify);
|
|
|
|
/**
|
|
* phy_modify - Convenience function for modifying a given PHY register
|
|
* @phydev: the phy_device struct
|
|
* @regnum: register number to write
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* NOTE: MUST NOT be called from interrupt context,
|
|
* because the bus read/write functions may wait for an interrupt
|
|
* to conclude the operation.
|
|
*/
|
|
int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
|
|
{
|
|
int ret;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = __phy_modify(phydev, regnum, mask, set);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_modify);
|
|
|
|
/**
|
|
* __phy_modify_mmd_changed - Function for modifying a register on MMD
|
|
* @phydev: the phy_device struct
|
|
* @devad: the MMD containing register to modify
|
|
* @regnum: register number to modify
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* Unlocked helper function which allows a MMD register to be modified as
|
|
* new register value = (old register value & ~mask) | set
|
|
*
|
|
* Returns negative errno, 0 if there was no change, and 1 in case of change
|
|
*/
|
|
int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
|
|
u16 mask, u16 set)
|
|
{
|
|
int new, ret;
|
|
|
|
ret = __phy_read_mmd(phydev, devad, regnum);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
new = (ret & ~mask) | set;
|
|
if (new == ret)
|
|
return 0;
|
|
|
|
ret = __phy_write_mmd(phydev, devad, regnum, new);
|
|
|
|
return ret < 0 ? ret : 1;
|
|
}
|
|
EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
|
|
|
|
/**
|
|
* phy_modify_mmd_changed - Function for modifying a register on MMD
|
|
* @phydev: the phy_device struct
|
|
* @devad: the MMD containing register to modify
|
|
* @regnum: register number to modify
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* NOTE: MUST NOT be called from interrupt context,
|
|
* because the bus read/write functions may wait for an interrupt
|
|
* to conclude the operation.
|
|
*
|
|
* Returns negative errno, 0 if there was no change, and 1 in case of change
|
|
*/
|
|
int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
|
|
u16 mask, u16 set)
|
|
{
|
|
int ret;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
|
|
|
|
/**
|
|
* __phy_modify_mmd - Convenience function for modifying a register on MMD
|
|
* @phydev: the phy_device struct
|
|
* @devad: the MMD containing register to modify
|
|
* @regnum: register number to modify
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* NOTE: MUST NOT be called from interrupt context,
|
|
* because the bus read/write functions may wait for an interrupt
|
|
* to conclude the operation.
|
|
*/
|
|
int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
|
|
u16 mask, u16 set)
|
|
{
|
|
int ret;
|
|
|
|
ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
|
|
|
|
return ret < 0 ? ret : 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(__phy_modify_mmd);
|
|
|
|
/**
|
|
* phy_modify_mmd - Convenience function for modifying a register on MMD
|
|
* @phydev: the phy_device struct
|
|
* @devad: the MMD containing register to modify
|
|
* @regnum: register number to modify
|
|
* @mask: bit mask of bits to clear
|
|
* @set: new value of bits set in mask to write to @regnum
|
|
*
|
|
* NOTE: MUST NOT be called from interrupt context,
|
|
* because the bus read/write functions may wait for an interrupt
|
|
* to conclude the operation.
|
|
*/
|
|
int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
|
|
u16 mask, u16 set)
|
|
{
|
|
int ret;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_modify_mmd);
|
|
|
|
static int __phy_read_page(struct phy_device *phydev)
|
|
{
|
|
if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
|
|
return -EOPNOTSUPP;
|
|
|
|
return phydev->drv->read_page(phydev);
|
|
}
|
|
|
|
static int __phy_write_page(struct phy_device *phydev, int page)
|
|
{
|
|
if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
|
|
return -EOPNOTSUPP;
|
|
|
|
return phydev->drv->write_page(phydev, page);
|
|
}
|
|
|
|
/**
|
|
* phy_save_page() - take the bus lock and save the current page
|
|
* @phydev: a pointer to a &struct phy_device
|
|
*
|
|
* Take the MDIO bus lock, and return the current page number. On error,
|
|
* returns a negative errno. phy_restore_page() must always be called
|
|
* after this, irrespective of success or failure of this call.
|
|
*/
|
|
int phy_save_page(struct phy_device *phydev)
|
|
{
|
|
phy_lock_mdio_bus(phydev);
|
|
return __phy_read_page(phydev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_save_page);
|
|
|
|
/**
|
|
* phy_select_page() - take the bus lock, save the current page, and set a page
|
|
* @phydev: a pointer to a &struct phy_device
|
|
* @page: desired page
|
|
*
|
|
* Take the MDIO bus lock to protect against concurrent access, save the
|
|
* current PHY page, and set the current page. On error, returns a
|
|
* negative errno, otherwise returns the previous page number.
|
|
* phy_restore_page() must always be called after this, irrespective
|
|
* of success or failure of this call.
|
|
*/
|
|
int phy_select_page(struct phy_device *phydev, int page)
|
|
{
|
|
int ret, oldpage;
|
|
|
|
oldpage = ret = phy_save_page(phydev);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (oldpage != page) {
|
|
ret = __phy_write_page(phydev, page);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
return oldpage;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_select_page);
|
|
|
|
/**
|
|
* phy_restore_page() - restore the page register and release the bus lock
|
|
* @phydev: a pointer to a &struct phy_device
|
|
* @oldpage: the old page, return value from phy_save_page() or phy_select_page()
|
|
* @ret: operation's return code
|
|
*
|
|
* Release the MDIO bus lock, restoring @oldpage if it is a valid page.
|
|
* This function propagates the earliest error code from the group of
|
|
* operations.
|
|
*
|
|
* Returns:
|
|
* @oldpage if it was a negative value, otherwise
|
|
* @ret if it was a negative errno value, otherwise
|
|
* phy_write_page()'s negative value if it were in error, otherwise
|
|
* @ret.
|
|
*/
|
|
int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
|
|
{
|
|
int r;
|
|
|
|
if (oldpage >= 0) {
|
|
r = __phy_write_page(phydev, oldpage);
|
|
|
|
/* Propagate the operation return code if the page write
|
|
* was successful.
|
|
*/
|
|
if (ret >= 0 && r < 0)
|
|
ret = r;
|
|
} else {
|
|
/* Propagate the phy page selection error code */
|
|
ret = oldpage;
|
|
}
|
|
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(phy_restore_page);
|
|
|
|
/**
|
|
* phy_read_paged() - Convenience function for reading a paged register
|
|
* @phydev: a pointer to a &struct phy_device
|
|
* @page: the page for the phy
|
|
* @regnum: register number
|
|
*
|
|
* Same rules as for phy_read().
|
|
*/
|
|
int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
|
|
{
|
|
int ret = 0, oldpage;
|
|
|
|
oldpage = phy_select_page(phydev, page);
|
|
if (oldpage >= 0)
|
|
ret = __phy_read(phydev, regnum);
|
|
|
|
return phy_restore_page(phydev, oldpage, ret);
|
|
}
|
|
EXPORT_SYMBOL(phy_read_paged);
|
|
|
|
/**
|
|
* phy_write_paged() - Convenience function for writing a paged register
|
|
* @phydev: a pointer to a &struct phy_device
|
|
* @page: the page for the phy
|
|
* @regnum: register number
|
|
* @val: value to write
|
|
*
|
|
* Same rules as for phy_write().
|
|
*/
|
|
int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
|
|
{
|
|
int ret = 0, oldpage;
|
|
|
|
oldpage = phy_select_page(phydev, page);
|
|
if (oldpage >= 0)
|
|
ret = __phy_write(phydev, regnum, val);
|
|
|
|
return phy_restore_page(phydev, oldpage, ret);
|
|
}
|
|
EXPORT_SYMBOL(phy_write_paged);
|
|
|
|
/**
|
|
* phy_modify_paged_changed() - Function for modifying a paged register
|
|
* @phydev: a pointer to a &struct phy_device
|
|
* @page: the page for the phy
|
|
* @regnum: register number
|
|
* @mask: bit mask of bits to clear
|
|
* @set: bit mask of bits to set
|
|
*
|
|
* Returns negative errno, 0 if there was no change, and 1 in case of change
|
|
*/
|
|
int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
|
|
u16 mask, u16 set)
|
|
{
|
|
int ret = 0, oldpage;
|
|
|
|
oldpage = phy_select_page(phydev, page);
|
|
if (oldpage >= 0)
|
|
ret = __phy_modify_changed(phydev, regnum, mask, set);
|
|
|
|
return phy_restore_page(phydev, oldpage, ret);
|
|
}
|
|
EXPORT_SYMBOL(phy_modify_paged_changed);
|
|
|
|
/**
|
|
* phy_modify_paged() - Convenience function for modifying a paged register
|
|
* @phydev: a pointer to a &struct phy_device
|
|
* @page: the page for the phy
|
|
* @regnum: register number
|
|
* @mask: bit mask of bits to clear
|
|
* @set: bit mask of bits to set
|
|
*
|
|
* Same rules as for phy_read() and phy_write().
|
|
*/
|
|
int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
|
|
u16 mask, u16 set)
|
|
{
|
|
int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
|
|
|
|
return ret < 0 ? ret : 0;
|
|
}
|
|
EXPORT_SYMBOL(phy_modify_paged);
|