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a6653773d6
SATA PLL on Allwinner R40 is of type (parent) * N * K / M / 6 where 6 is the fixed post-divider. Add post-divider support for NKM type clock. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Fixed application of post-divider in set_rate callback] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
212 lines
5.0 KiB
C
212 lines
5.0 KiB
C
/*
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* Copyright (C) 2016 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <linux/clk-provider.h>
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#include "ccu_gate.h"
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#include "ccu_nkm.h"
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struct _ccu_nkm {
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unsigned long n, min_n, max_n;
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unsigned long k, min_k, max_k;
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unsigned long m, min_m, max_m;
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};
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static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
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struct _ccu_nkm *nkm)
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{
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unsigned long best_rate = 0;
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unsigned long best_n = 0, best_k = 0, best_m = 0;
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unsigned long _n, _k, _m;
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for (_k = nkm->min_k; _k <= nkm->max_k; _k++) {
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for (_n = nkm->min_n; _n <= nkm->max_n; _n++) {
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for (_m = nkm->min_m; _m <= nkm->max_m; _m++) {
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unsigned long tmp_rate;
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tmp_rate = parent * _n * _k / _m;
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if (tmp_rate > rate)
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continue;
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if ((rate - tmp_rate) < (rate - best_rate)) {
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best_rate = tmp_rate;
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best_n = _n;
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best_k = _k;
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best_m = _m;
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}
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}
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}
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}
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nkm->n = best_n;
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nkm->k = best_k;
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nkm->m = best_m;
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}
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static void ccu_nkm_disable(struct clk_hw *hw)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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return ccu_gate_helper_disable(&nkm->common, nkm->enable);
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}
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static int ccu_nkm_enable(struct clk_hw *hw)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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return ccu_gate_helper_enable(&nkm->common, nkm->enable);
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}
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static int ccu_nkm_is_enabled(struct clk_hw *hw)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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return ccu_gate_helper_is_enabled(&nkm->common, nkm->enable);
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}
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static unsigned long ccu_nkm_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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unsigned long n, m, k, rate;
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u32 reg;
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reg = readl(nkm->common.base + nkm->common.reg);
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n = reg >> nkm->n.shift;
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n &= (1 << nkm->n.width) - 1;
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n += nkm->n.offset;
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if (!n)
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n++;
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k = reg >> nkm->k.shift;
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k &= (1 << nkm->k.width) - 1;
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k += nkm->k.offset;
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if (!k)
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k++;
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m = reg >> nkm->m.shift;
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m &= (1 << nkm->m.width) - 1;
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m += nkm->m.offset;
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if (!m)
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m++;
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rate = parent_rate * n * k / m;
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if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nkm->fixed_post_div;
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return rate;
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}
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static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
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struct clk_hw *hw,
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unsigned long *parent_rate,
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unsigned long rate,
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void *data)
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{
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struct ccu_nkm *nkm = data;
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struct _ccu_nkm _nkm;
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_nkm.min_n = nkm->n.min ?: 1;
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_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
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_nkm.min_k = nkm->k.min ?: 1;
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_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
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_nkm.min_m = 1;
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_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
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if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate *= nkm->fixed_post_div;
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ccu_nkm_find_best(*parent_rate, rate, &_nkm);
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rate = *parent_rate * _nkm.n * _nkm.k / _nkm.m;
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if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nkm->fixed_post_div;
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return rate;
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}
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static int ccu_nkm_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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return ccu_mux_helper_determine_rate(&nkm->common, &nkm->mux,
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req, ccu_nkm_round_rate, nkm);
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}
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static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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struct _ccu_nkm _nkm;
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unsigned long flags;
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u32 reg;
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if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate *= nkm->fixed_post_div;
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_nkm.min_n = nkm->n.min ?: 1;
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_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
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_nkm.min_k = nkm->k.min ?: 1;
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_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
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_nkm.min_m = 1;
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_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
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ccu_nkm_find_best(parent_rate, rate, &_nkm);
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spin_lock_irqsave(nkm->common.lock, flags);
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reg = readl(nkm->common.base + nkm->common.reg);
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reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift);
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reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift);
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reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift);
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reg |= (_nkm.n - nkm->n.offset) << nkm->n.shift;
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reg |= (_nkm.k - nkm->k.offset) << nkm->k.shift;
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reg |= (_nkm.m - nkm->m.offset) << nkm->m.shift;
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writel(reg, nkm->common.base + nkm->common.reg);
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spin_unlock_irqrestore(nkm->common.lock, flags);
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ccu_helper_wait_for_lock(&nkm->common, nkm->lock);
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return 0;
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}
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static u8 ccu_nkm_get_parent(struct clk_hw *hw)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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return ccu_mux_helper_get_parent(&nkm->common, &nkm->mux);
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}
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static int ccu_nkm_set_parent(struct clk_hw *hw, u8 index)
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{
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struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
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return ccu_mux_helper_set_parent(&nkm->common, &nkm->mux, index);
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}
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const struct clk_ops ccu_nkm_ops = {
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.disable = ccu_nkm_disable,
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.enable = ccu_nkm_enable,
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.is_enabled = ccu_nkm_is_enabled,
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.get_parent = ccu_nkm_get_parent,
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.set_parent = ccu_nkm_set_parent,
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.determine_rate = ccu_nkm_determine_rate,
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.recalc_rate = ccu_nkm_recalc_rate,
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.set_rate = ccu_nkm_set_rate,
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};
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