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8565915e75
This driver is nonsensical. To not block migrating the core API away from NULL default_domains give it a hacky of a PLATFORM domain that keeps it working exactly as it always did. Leave some comments around to warn away any future people looking at this. Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/5-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
465 lines
12 KiB
C
465 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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* Author: Varun Sethi <varun.sethi@freescale.com>
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*/
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#define pr_fmt(fmt) "fsl-pamu-domain: %s: " fmt, __func__
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#include "fsl_pamu_domain.h"
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#include <linux/platform_device.h>
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#include <sysdev/fsl_pci.h>
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/*
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* Global spinlock that needs to be held while
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* configuring PAMU.
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*/
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static DEFINE_SPINLOCK(iommu_lock);
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static struct kmem_cache *fsl_pamu_domain_cache;
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static struct kmem_cache *iommu_devinfo_cache;
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static DEFINE_SPINLOCK(device_domain_lock);
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struct iommu_device pamu_iommu; /* IOMMU core code handle */
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static struct fsl_dma_domain *to_fsl_dma_domain(struct iommu_domain *dom)
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{
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return container_of(dom, struct fsl_dma_domain, iommu_domain);
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}
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static int __init iommu_init_mempool(void)
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{
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fsl_pamu_domain_cache = kmem_cache_create("fsl_pamu_domain",
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sizeof(struct fsl_dma_domain),
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0,
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SLAB_HWCACHE_ALIGN,
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NULL);
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if (!fsl_pamu_domain_cache) {
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pr_debug("Couldn't create fsl iommu_domain cache\n");
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return -ENOMEM;
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}
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iommu_devinfo_cache = kmem_cache_create("iommu_devinfo",
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sizeof(struct device_domain_info),
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0,
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SLAB_HWCACHE_ALIGN,
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NULL);
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if (!iommu_devinfo_cache) {
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pr_debug("Couldn't create devinfo cache\n");
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kmem_cache_destroy(fsl_pamu_domain_cache);
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return -ENOMEM;
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}
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return 0;
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}
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static int update_liodn_stash(int liodn, struct fsl_dma_domain *dma_domain,
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u32 val)
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{
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int ret = 0;
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unsigned long flags;
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spin_lock_irqsave(&iommu_lock, flags);
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ret = pamu_update_paace_stash(liodn, val);
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if (ret) {
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pr_debug("Failed to update SPAACE for liodn %d\n ", liodn);
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spin_unlock_irqrestore(&iommu_lock, flags);
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return ret;
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}
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spin_unlock_irqrestore(&iommu_lock, flags);
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return ret;
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}
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/* Set the geometry parameters for a LIODN */
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static int pamu_set_liodn(struct fsl_dma_domain *dma_domain, struct device *dev,
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int liodn)
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{
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u32 omi_index = ~(u32)0;
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unsigned long flags;
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int ret;
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/*
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* Configure the omi_index at the geometry setup time.
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* This is a static value which depends on the type of
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* device and would not change thereafter.
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*/
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get_ome_index(&omi_index, dev);
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spin_lock_irqsave(&iommu_lock, flags);
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ret = pamu_disable_liodn(liodn);
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if (ret)
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goto out_unlock;
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ret = pamu_config_ppaace(liodn, omi_index, dma_domain->stash_id, 0);
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if (ret)
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goto out_unlock;
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ret = pamu_config_ppaace(liodn, ~(u32)0, dma_domain->stash_id,
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PAACE_AP_PERMS_QUERY | PAACE_AP_PERMS_UPDATE);
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out_unlock:
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spin_unlock_irqrestore(&iommu_lock, flags);
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if (ret) {
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pr_debug("PAACE configuration failed for liodn %d\n",
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liodn);
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}
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return ret;
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}
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static void remove_device_ref(struct device_domain_info *info)
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{
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unsigned long flags;
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list_del(&info->link);
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spin_lock_irqsave(&iommu_lock, flags);
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pamu_disable_liodn(info->liodn);
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spin_unlock_irqrestore(&iommu_lock, flags);
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spin_lock_irqsave(&device_domain_lock, flags);
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dev_iommu_priv_set(info->dev, NULL);
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kmem_cache_free(iommu_devinfo_cache, info);
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spin_unlock_irqrestore(&device_domain_lock, flags);
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}
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static void detach_device(struct device *dev, struct fsl_dma_domain *dma_domain)
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{
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struct device_domain_info *info, *tmp;
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unsigned long flags;
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spin_lock_irqsave(&dma_domain->domain_lock, flags);
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/* Remove the device from the domain device list */
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list_for_each_entry_safe(info, tmp, &dma_domain->devices, link) {
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if (!dev || (info->dev == dev))
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remove_device_ref(info);
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}
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spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
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}
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static void attach_device(struct fsl_dma_domain *dma_domain, int liodn, struct device *dev)
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{
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struct device_domain_info *info, *old_domain_info;
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unsigned long flags;
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spin_lock_irqsave(&device_domain_lock, flags);
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/*
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* Check here if the device is already attached to domain or not.
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* If the device is already attached to a domain detach it.
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*/
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old_domain_info = dev_iommu_priv_get(dev);
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if (old_domain_info && old_domain_info->domain != dma_domain) {
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spin_unlock_irqrestore(&device_domain_lock, flags);
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detach_device(dev, old_domain_info->domain);
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spin_lock_irqsave(&device_domain_lock, flags);
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}
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info = kmem_cache_zalloc(iommu_devinfo_cache, GFP_ATOMIC);
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info->dev = dev;
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info->liodn = liodn;
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info->domain = dma_domain;
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list_add(&info->link, &dma_domain->devices);
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/*
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* In case of devices with multiple LIODNs just store
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* the info for the first LIODN as all
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* LIODNs share the same domain
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*/
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if (!dev_iommu_priv_get(dev))
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dev_iommu_priv_set(dev, info);
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spin_unlock_irqrestore(&device_domain_lock, flags);
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}
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static phys_addr_t fsl_pamu_iova_to_phys(struct iommu_domain *domain,
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dma_addr_t iova)
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{
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if (iova < domain->geometry.aperture_start ||
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iova > domain->geometry.aperture_end)
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return 0;
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return iova;
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}
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static bool fsl_pamu_capable(struct device *dev, enum iommu_cap cap)
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{
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return cap == IOMMU_CAP_CACHE_COHERENCY;
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}
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static void fsl_pamu_domain_free(struct iommu_domain *domain)
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{
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struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
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/* remove all the devices from the device list */
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detach_device(NULL, dma_domain);
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kmem_cache_free(fsl_pamu_domain_cache, dma_domain);
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}
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static struct iommu_domain *fsl_pamu_domain_alloc(unsigned type)
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{
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struct fsl_dma_domain *dma_domain;
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/*
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* FIXME: This isn't creating an unmanaged domain since the
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* default_domain_ops do not have any map/unmap function it doesn't meet
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* the requirements for __IOMMU_DOMAIN_PAGING. The only purpose seems to
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* allow drivers/soc/fsl/qbman/qman_portal.c to do
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* fsl_pamu_configure_l1_stash()
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*/
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if (type != IOMMU_DOMAIN_UNMANAGED)
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return NULL;
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dma_domain = kmem_cache_zalloc(fsl_pamu_domain_cache, GFP_KERNEL);
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if (!dma_domain)
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return NULL;
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dma_domain->stash_id = ~(u32)0;
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INIT_LIST_HEAD(&dma_domain->devices);
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spin_lock_init(&dma_domain->domain_lock);
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/* default geometry 64 GB i.e. maximum system address */
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dma_domain->iommu_domain. geometry.aperture_start = 0;
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dma_domain->iommu_domain.geometry.aperture_end = (1ULL << 36) - 1;
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dma_domain->iommu_domain.geometry.force_aperture = true;
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return &dma_domain->iommu_domain;
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}
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/* Update stash destination for all LIODNs associated with the domain */
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static int update_domain_stash(struct fsl_dma_domain *dma_domain, u32 val)
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{
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struct device_domain_info *info;
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int ret = 0;
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list_for_each_entry(info, &dma_domain->devices, link) {
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ret = update_liodn_stash(info->liodn, dma_domain, val);
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if (ret)
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break;
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}
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return ret;
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}
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static int fsl_pamu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
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unsigned long flags;
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int len, ret = 0, i;
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const u32 *liodn;
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struct pci_dev *pdev = NULL;
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struct pci_controller *pci_ctl;
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/*
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* Use LIODN of the PCI controller while attaching a
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* PCI device.
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*/
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if (dev_is_pci(dev)) {
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pdev = to_pci_dev(dev);
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pci_ctl = pci_bus_to_host(pdev->bus);
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/*
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* make dev point to pci controller device
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* so we can get the LIODN programmed by
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* u-boot.
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*/
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dev = pci_ctl->parent;
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}
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liodn = of_get_property(dev->of_node, "fsl,liodn", &len);
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if (!liodn) {
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pr_debug("missing fsl,liodn property at %pOF\n", dev->of_node);
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return -ENODEV;
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}
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spin_lock_irqsave(&dma_domain->domain_lock, flags);
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for (i = 0; i < len / sizeof(u32); i++) {
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/* Ensure that LIODN value is valid */
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if (liodn[i] >= PAACE_NUMBER_ENTRIES) {
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pr_debug("Invalid liodn %d, attach device failed for %pOF\n",
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liodn[i], dev->of_node);
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ret = -ENODEV;
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break;
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}
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attach_device(dma_domain, liodn[i], dev);
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ret = pamu_set_liodn(dma_domain, dev, liodn[i]);
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if (ret)
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break;
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ret = pamu_enable_liodn(liodn[i]);
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if (ret)
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break;
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}
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spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
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return ret;
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}
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/*
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* FIXME: fsl/pamu is completely broken in terms of how it works with the iommu
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* API. Immediately after probe the HW is left in an IDENTITY translation and
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* the driver provides a non-working UNMANAGED domain that it can switch over
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* to. However it cannot switch back to an IDENTITY translation, instead it
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* switches to what looks like BLOCKING.
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*/
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static int fsl_pamu_platform_attach(struct iommu_domain *platform_domain,
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struct device *dev)
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{
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struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
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struct fsl_dma_domain *dma_domain;
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const u32 *prop;
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int len;
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struct pci_dev *pdev = NULL;
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struct pci_controller *pci_ctl;
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/*
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* Hack to keep things working as they always have, only leaving an
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* UNMANAGED domain makes it BLOCKING.
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*/
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if (domain == platform_domain || !domain ||
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domain->type != IOMMU_DOMAIN_UNMANAGED)
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return 0;
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dma_domain = to_fsl_dma_domain(domain);
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/*
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* Use LIODN of the PCI controller while detaching a
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* PCI device.
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*/
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if (dev_is_pci(dev)) {
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pdev = to_pci_dev(dev);
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pci_ctl = pci_bus_to_host(pdev->bus);
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/*
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* make dev point to pci controller device
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* so we can get the LIODN programmed by
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* u-boot.
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*/
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dev = pci_ctl->parent;
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}
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prop = of_get_property(dev->of_node, "fsl,liodn", &len);
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if (prop)
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detach_device(dev, dma_domain);
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else
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pr_debug("missing fsl,liodn property at %pOF\n", dev->of_node);
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return 0;
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}
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static struct iommu_domain_ops fsl_pamu_platform_ops = {
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.attach_dev = fsl_pamu_platform_attach,
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};
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static struct iommu_domain fsl_pamu_platform_domain = {
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.type = IOMMU_DOMAIN_PLATFORM,
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.ops = &fsl_pamu_platform_ops,
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};
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/* Set the domain stash attribute */
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int fsl_pamu_configure_l1_stash(struct iommu_domain *domain, u32 cpu)
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{
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struct fsl_dma_domain *dma_domain = to_fsl_dma_domain(domain);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&dma_domain->domain_lock, flags);
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dma_domain->stash_id = get_stash_id(PAMU_ATTR_CACHE_L1, cpu);
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if (dma_domain->stash_id == ~(u32)0) {
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pr_debug("Invalid stash attributes\n");
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spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
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return -EINVAL;
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}
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ret = update_domain_stash(dma_domain, dma_domain->stash_id);
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spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
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return ret;
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}
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static bool check_pci_ctl_endpt_part(struct pci_controller *pci_ctl)
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{
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u32 version;
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/* Check the PCI controller version number by readding BRR1 register */
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version = in_be32(pci_ctl->cfg_addr + (PCI_FSL_BRR1 >> 2));
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version &= PCI_FSL_BRR1_VER;
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/* If PCI controller version is >= 0x204 we can partition endpoints */
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return version >= 0x204;
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}
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static struct iommu_group *fsl_pamu_device_group(struct device *dev)
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{
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struct iommu_group *group;
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struct pci_dev *pdev;
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/*
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* For platform devices we allocate a separate group for each of the
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* devices.
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*/
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if (!dev_is_pci(dev))
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return generic_device_group(dev);
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/*
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* We can partition PCIe devices so assign device group to the device
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*/
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pdev = to_pci_dev(dev);
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if (check_pci_ctl_endpt_part(pci_bus_to_host(pdev->bus)))
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return pci_device_group(&pdev->dev);
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/*
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* All devices connected to the controller will share the same device
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* group.
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*
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* Due to ordering between fsl_pamu_init() and fsl_pci_init() it is
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* guaranteed that the pci_ctl->parent platform_device will have the
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* iommu driver bound and will already have a group set. So we just
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* re-use this group as the group for every device in the hose.
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*/
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group = iommu_group_get(pci_bus_to_host(pdev->bus)->parent);
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if (WARN_ON(!group))
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return ERR_PTR(-EINVAL);
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return group;
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}
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static struct iommu_device *fsl_pamu_probe_device(struct device *dev)
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{
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int len;
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/*
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* uboot must fill the fsl,liodn for platform devices to be supported by
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* the iommu.
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*/
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if (!dev_is_pci(dev) &&
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!of_get_property(dev->of_node, "fsl,liodn", &len))
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return ERR_PTR(-ENODEV);
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return &pamu_iommu;
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}
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static const struct iommu_ops fsl_pamu_ops = {
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.default_domain = &fsl_pamu_platform_domain,
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.capable = fsl_pamu_capable,
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.domain_alloc = fsl_pamu_domain_alloc,
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.probe_device = fsl_pamu_probe_device,
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.device_group = fsl_pamu_device_group,
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.default_domain_ops = &(const struct iommu_domain_ops) {
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.attach_dev = fsl_pamu_attach_device,
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.iova_to_phys = fsl_pamu_iova_to_phys,
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.free = fsl_pamu_domain_free,
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}
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};
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int __init pamu_domain_init(void)
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{
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int ret = 0;
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ret = iommu_init_mempool();
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if (ret)
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return ret;
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ret = iommu_device_sysfs_add(&pamu_iommu, NULL, NULL, "iommu0");
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if (ret)
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return ret;
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ret = iommu_device_register(&pamu_iommu, &fsl_pamu_ops, NULL);
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if (ret) {
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iommu_device_sysfs_remove(&pamu_iommu);
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pr_err("Can't register iommu device\n");
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}
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return ret;
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}
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