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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
268 lines
6.0 KiB
C
268 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include "hdmi.h"
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struct hdmi_i2c_adapter {
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struct i2c_adapter base;
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struct hdmi *hdmi;
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bool sw_done;
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wait_queue_head_t ddc_event;
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};
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#define to_hdmi_i2c_adapter(x) container_of(x, struct hdmi_i2c_adapter, base)
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static void init_ddc(struct hdmi_i2c_adapter *hdmi_i2c)
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{
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struct hdmi *hdmi = hdmi_i2c->hdmi;
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hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
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HDMI_DDC_CTRL_SW_STATUS_RESET);
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hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
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HDMI_DDC_CTRL_SOFT_RESET);
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hdmi_write(hdmi, REG_HDMI_DDC_SPEED,
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HDMI_DDC_SPEED_THRESHOLD(2) |
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HDMI_DDC_SPEED_PRESCALE(10));
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hdmi_write(hdmi, REG_HDMI_DDC_SETUP,
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HDMI_DDC_SETUP_TIMEOUT(0xff));
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/* enable reference timer for 27us */
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hdmi_write(hdmi, REG_HDMI_DDC_REF,
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HDMI_DDC_REF_REFTIMER_ENABLE |
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HDMI_DDC_REF_REFTIMER(27));
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}
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static int ddc_clear_irq(struct hdmi_i2c_adapter *hdmi_i2c)
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{
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struct hdmi *hdmi = hdmi_i2c->hdmi;
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struct drm_device *dev = hdmi->dev;
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uint32_t retry = 0xffff;
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uint32_t ddc_int_ctrl;
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do {
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--retry;
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hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
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HDMI_DDC_INT_CTRL_SW_DONE_ACK |
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HDMI_DDC_INT_CTRL_SW_DONE_MASK);
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ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
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} while ((ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_INT) && retry);
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if (!retry) {
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DRM_DEV_ERROR(dev->dev, "timeout waiting for DDC\n");
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return -ETIMEDOUT;
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}
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hdmi_i2c->sw_done = false;
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return 0;
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}
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#define MAX_TRANSACTIONS 4
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static bool sw_done(struct hdmi_i2c_adapter *hdmi_i2c)
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{
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struct hdmi *hdmi = hdmi_i2c->hdmi;
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if (!hdmi_i2c->sw_done) {
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uint32_t ddc_int_ctrl;
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ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
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if ((ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_MASK) &&
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(ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_INT)) {
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hdmi_i2c->sw_done = true;
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hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
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HDMI_DDC_INT_CTRL_SW_DONE_ACK);
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}
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}
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return hdmi_i2c->sw_done;
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}
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static int msm_hdmi_i2c_xfer(struct i2c_adapter *i2c,
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struct i2c_msg *msgs, int num)
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{
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struct hdmi_i2c_adapter *hdmi_i2c = to_hdmi_i2c_adapter(i2c);
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struct hdmi *hdmi = hdmi_i2c->hdmi;
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struct drm_device *dev = hdmi->dev;
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static const uint32_t nack[] = {
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HDMI_DDC_SW_STATUS_NACK0, HDMI_DDC_SW_STATUS_NACK1,
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HDMI_DDC_SW_STATUS_NACK2, HDMI_DDC_SW_STATUS_NACK3,
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};
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int indices[MAX_TRANSACTIONS];
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int ret, i, j, index = 0;
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uint32_t ddc_status, ddc_data, i2c_trans;
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num = min(num, MAX_TRANSACTIONS);
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WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE));
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if (num == 0)
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return num;
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init_ddc(hdmi_i2c);
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ret = ddc_clear_irq(hdmi_i2c);
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if (ret)
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return ret;
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for (i = 0; i < num; i++) {
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struct i2c_msg *p = &msgs[i];
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uint32_t raw_addr = p->addr << 1;
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if (p->flags & I2C_M_RD)
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raw_addr |= 1;
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ddc_data = HDMI_DDC_DATA_DATA(raw_addr) |
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HDMI_DDC_DATA_DATA_RW(DDC_WRITE);
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if (i == 0) {
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ddc_data |= HDMI_DDC_DATA_INDEX(0) |
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HDMI_DDC_DATA_INDEX_WRITE;
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}
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hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
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index++;
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indices[i] = index;
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if (p->flags & I2C_M_RD) {
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index += p->len;
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} else {
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for (j = 0; j < p->len; j++) {
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ddc_data = HDMI_DDC_DATA_DATA(p->buf[j]) |
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HDMI_DDC_DATA_DATA_RW(DDC_WRITE);
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hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
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index++;
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}
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}
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i2c_trans = HDMI_I2C_TRANSACTION_REG_CNT(p->len) |
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HDMI_I2C_TRANSACTION_REG_RW(
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(p->flags & I2C_M_RD) ? DDC_READ : DDC_WRITE) |
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HDMI_I2C_TRANSACTION_REG_START;
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if (i == (num - 1))
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i2c_trans |= HDMI_I2C_TRANSACTION_REG_STOP;
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hdmi_write(hdmi, REG_HDMI_I2C_TRANSACTION(i), i2c_trans);
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}
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/* trigger the transfer: */
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hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
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HDMI_DDC_CTRL_TRANSACTION_CNT(num - 1) |
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HDMI_DDC_CTRL_GO);
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ret = wait_event_timeout(hdmi_i2c->ddc_event, sw_done(hdmi_i2c), HZ/4);
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if (ret <= 0) {
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if (ret == 0)
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ret = -ETIMEDOUT;
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dev_warn(dev->dev, "DDC timeout: %d\n", ret);
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DBG("sw_status=%08x, hw_status=%08x, int_ctrl=%08x",
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hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS),
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hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS),
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hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL));
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return ret;
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}
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ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS);
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/* read back results of any read transactions: */
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for (i = 0; i < num; i++) {
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struct i2c_msg *p = &msgs[i];
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if (!(p->flags & I2C_M_RD))
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continue;
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/* check for NACK: */
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if (ddc_status & nack[i]) {
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DBG("ddc_status=%08x", ddc_status);
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break;
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}
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ddc_data = HDMI_DDC_DATA_DATA_RW(DDC_READ) |
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HDMI_DDC_DATA_INDEX(indices[i]) |
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HDMI_DDC_DATA_INDEX_WRITE;
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hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
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/* discard first byte: */
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hdmi_read(hdmi, REG_HDMI_DDC_DATA);
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for (j = 0; j < p->len; j++) {
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ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA);
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p->buf[j] = FIELD(ddc_data, HDMI_DDC_DATA_DATA);
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}
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}
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return i;
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}
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static u32 msm_hdmi_i2c_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static const struct i2c_algorithm msm_hdmi_i2c_algorithm = {
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.master_xfer = msm_hdmi_i2c_xfer,
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.functionality = msm_hdmi_i2c_func,
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};
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void msm_hdmi_i2c_irq(struct i2c_adapter *i2c)
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{
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struct hdmi_i2c_adapter *hdmi_i2c = to_hdmi_i2c_adapter(i2c);
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if (sw_done(hdmi_i2c))
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wake_up_all(&hdmi_i2c->ddc_event);
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}
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void msm_hdmi_i2c_destroy(struct i2c_adapter *i2c)
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{
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struct hdmi_i2c_adapter *hdmi_i2c = to_hdmi_i2c_adapter(i2c);
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i2c_del_adapter(i2c);
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kfree(hdmi_i2c);
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}
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struct i2c_adapter *msm_hdmi_i2c_init(struct hdmi *hdmi)
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{
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struct hdmi_i2c_adapter *hdmi_i2c;
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struct i2c_adapter *i2c = NULL;
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int ret;
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hdmi_i2c = kzalloc(sizeof(*hdmi_i2c), GFP_KERNEL);
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if (!hdmi_i2c) {
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ret = -ENOMEM;
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goto fail;
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}
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i2c = &hdmi_i2c->base;
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hdmi_i2c->hdmi = hdmi;
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init_waitqueue_head(&hdmi_i2c->ddc_event);
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i2c->owner = THIS_MODULE;
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i2c->class = I2C_CLASS_DDC;
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snprintf(i2c->name, sizeof(i2c->name), "msm hdmi i2c");
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i2c->dev.parent = &hdmi->pdev->dev;
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i2c->algo = &msm_hdmi_i2c_algorithm;
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ret = i2c_add_adapter(i2c);
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if (ret)
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goto fail;
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return i2c;
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fail:
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if (i2c)
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msm_hdmi_i2c_destroy(i2c);
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return ERR_PTR(ret);
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}
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