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Add 32-bit word access support to debug/8250.S and convert Picoxcell and SoCFPGA to this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
55 lines
1.1 KiB
ArmAsm
55 lines
1.1 KiB
ArmAsm
/*
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* arch/arm/include/debug/8250.S
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*
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* Copyright (C) 1994-2013 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_reg.h>
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.macro addruart, rp, rv, tmp
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ldr \rp, =CONFIG_DEBUG_UART_PHYS
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ldr \rv, =CONFIG_DEBUG_UART_VIRT
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.endm
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#ifdef CONFIG_DEBUG_UART_8250_WORD
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.macro store, rd, rx:vararg
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str \rd, \rx
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.endm
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.macro load, rd, rx:vararg
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ldr \rd, \rx
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.endm
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#else
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.macro store, rd, rx:vararg
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strb \rd, \rx
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.endm
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.macro load, rd, rx:vararg
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ldrb \rd, \rx
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.endm
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#endif
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#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT
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.macro senduart,rd,rx
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store \rd, [\rx, #UART_TX << UART_SHIFT]
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.endm
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.macro busyuart,rd,rx
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1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
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and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
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teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
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bne 1002b
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.endm
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.macro waituart,rd,rx
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#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
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1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
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tst \rd, #UART_MSR_CTS
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beq 1001b
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#endif
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.endm
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