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This enables support for reading, writing and locking so called "Protection Registers" present on some flash chips. A subset of them are pre-programmed at the factory with a unique set of values. The rest is user-programmable. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
110 lines
3.5 KiB
C
110 lines
3.5 KiB
C
/*
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* $Id: mtd-abi.h,v 1.8 2005/02/08 17:11:16 nico Exp $
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*
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* Portions of MTD ABI definition which are shared by kernel and user space
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*/
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#ifndef __MTD_ABI_H__
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#define __MTD_ABI_H__
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#ifndef __KERNEL__ /* Urgh. The whole point of splitting this out into
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separate files was to avoid #ifdef __KERNEL__ */
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#define __user
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#endif
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struct erase_info_user {
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uint32_t start;
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uint32_t length;
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};
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struct mtd_oob_buf {
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uint32_t start;
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uint32_t length;
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unsigned char __user *ptr;
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};
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#define MTD_ABSENT 0
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#define MTD_RAM 1
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#define MTD_ROM 2
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#define MTD_NORFLASH 3
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#define MTD_NANDFLASH 4
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#define MTD_PEROM 5
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#define MTD_OTHER 14
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#define MTD_UNKNOWN 15
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#define MTD_CLEAR_BITS 1 // Bits can be cleared (flash)
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#define MTD_SET_BITS 2 // Bits can be set
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#define MTD_ERASEABLE 4 // Has an erase function
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#define MTD_WRITEB_WRITEABLE 8 // Direct IO is possible
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#define MTD_VOLATILE 16 // Set for RAMs
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#define MTD_XIP 32 // eXecute-In-Place possible
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#define MTD_OOB 64 // Out-of-band data (NAND flash)
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#define MTD_ECC 128 // Device capable of automatic ECC
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#define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed
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// Some common devices / combinations of capabilities
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#define MTD_CAP_ROM 0
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#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE)
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#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE)
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#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB)
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#define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS)
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// Types of automatic ECC/Checksum available
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#define MTD_ECC_NONE 0 // No automatic ECC available
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#define MTD_ECC_RS_DiskOnChip 1 // Automatic ECC on DiskOnChip
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#define MTD_ECC_SW 2 // SW ECC for Toshiba & Samsung devices
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/* ECC byte placement */
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#define MTD_NANDECC_OFF 0 // Switch off ECC (Not recommended)
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#define MTD_NANDECC_PLACE 1 // Use the given placement in the structure (YAFFS1 legacy mode)
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#define MTD_NANDECC_AUTOPLACE 2 // Use the default placement scheme
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#define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read)
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struct mtd_info_user {
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uint8_t type;
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uint32_t flags;
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uint32_t size; // Total size of the MTD
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uint32_t erasesize;
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uint32_t oobblock; // Size of OOB blocks (e.g. 512)
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uint32_t oobsize; // Amount of OOB data per block (e.g. 16)
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uint32_t ecctype;
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uint32_t eccsize;
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};
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struct region_info_user {
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uint32_t offset; /* At which this region starts,
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* from the beginning of the MTD */
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uint32_t erasesize; /* For this region */
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uint32_t numblocks; /* Number of blocks in this region */
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uint32_t regionindex;
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};
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struct otp_info {
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uint32_t start;
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uint32_t length;
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uint32_t locked;
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};
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#define MEMGETINFO _IOR('M', 1, struct mtd_info_user)
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#define MEMERASE _IOW('M', 2, struct erase_info_user)
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#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf)
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#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf)
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#define MEMLOCK _IOW('M', 5, struct erase_info_user)
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#define MEMUNLOCK _IOW('M', 6, struct erase_info_user)
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#define MEMGETREGIONCOUNT _IOR('M', 7, int)
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#define MEMGETREGIONINFO _IOWR('M', 8, struct region_info_user)
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#define MEMSETOOBSEL _IOW('M', 9, struct nand_oobinfo)
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#define MEMGETOOBSEL _IOR('M', 10, struct nand_oobinfo)
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#define MEMGETBADBLOCK _IOW('M', 11, loff_t)
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#define MEMSETBADBLOCK _IOW('M', 12, loff_t)
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struct nand_oobinfo {
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uint32_t useecc;
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uint32_t eccbytes;
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uint32_t oobfree[8][2];
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uint32_t eccpos[32];
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};
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#endif /* __MTD_ABI_H__ */
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