linux/drivers/gpu/drm/fsl-dcu
Stefan Agner f76b9873d7 drm/fsl-dcu: fix register initialization
The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for
Vybrid) whereas the register enumeration start from 1 (1-10 for
LS1021a and 1-9 for Vybrid). The loop started off from 0 for both
iterations and initialized the number of layers inclusive, which
is one layer too many.

All extensively written registers seem to be unassigned, it seems
that the write to those registers did not do any harm in practice.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2016-02-25 16:13:16 -08:00
..
fsl_dcu_drm_crtc.c drm/fsl-dcu: fix register initialization 2016-02-25 16:13:16 -08:00
fsl_dcu_drm_crtc.h
fsl_dcu_drm_drv.c drm/fsl-dcu: mask all interrupts on initialization 2016-02-25 16:13:16 -08:00
fsl_dcu_drm_drv.h drm/fsl-dcu: fix alpha blending 2016-02-25 16:13:16 -08:00
fsl_dcu_drm_fbdev.c
fsl_dcu_drm_kms.c drm/fsl-dcu: handle initialization errors properly 2016-02-25 16:13:16 -08:00
fsl_dcu_drm_output.h
fsl_dcu_drm_plane.c drm/fsl-dcu: fix alpha blending 2016-02-25 16:13:16 -08:00
fsl_dcu_drm_plane.h
fsl_dcu_drm_rgb.c drm: Pass 'name' to drm_encoder_init() 2015-12-11 09:13:20 +01:00
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