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f7018c2135
The drivers/video directory is a mess. It contains generic video related files, directories for backlight, console, linux logo, lots of fbdev device drivers, fbdev framework files. Make some order into the chaos by creating drivers/video/fbdev directory, and move all fbdev related files there. No functionality is changed, although I guess it is possible that some subtle Makefile build order related issue could be created by this patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Clark <robdclark@gmail.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
426 lines
9.5 KiB
C
426 lines
9.5 KiB
C
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/*
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* Logic for the below structure :
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* user enters the CEA or VESA timings by specifying the HDMI/DVI code.
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* There is a correspondence between CEA/VESA timing and code, please
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* refer to section 6.3 in HDMI 1.3 specification for timing code.
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*
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* In the below structure, cea_vesa_timings corresponds to all OMAP4
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* supported CEA and VESA timing values.code_cea corresponds to the CEA
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* code, It is used to get the timing from cea_vesa_timing array.Similarly
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* with code_vesa. Code_index is used for back mapping, that is once EDID
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* is read from the TV, EDID is parsed to find the timing values and then
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* map it to corresponding CEA or VESA index.
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*/
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#define DSS_SUBSYS_NAME "HDMI"
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <video/omapdss.h>
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#include "hdmi.h"
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static const struct hdmi_config cea_timings[] = {
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{
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{ 640, 480, 25200000, 96, 16, 48, 2, 10, 33,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 1, HDMI_HDMI },
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},
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{
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{ 720, 480, 27027000, 62, 16, 60, 6, 9, 30,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 2, HDMI_HDMI },
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},
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{
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{ 1280, 720, 74250000, 40, 110, 220, 5, 5, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 4, HDMI_HDMI },
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},
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{
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{ 1920, 540, 74250000, 44, 88, 148, 5, 2, 15,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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true, },
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{ 5, HDMI_HDMI },
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},
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{
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{ 1440, 240, 27027000, 124, 38, 114, 3, 4, 15,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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true, },
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{ 6, HDMI_HDMI },
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},
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{
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{ 1920, 1080, 148500000, 44, 88, 148, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 16, HDMI_HDMI },
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},
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{
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{ 720, 576, 27000000, 64, 12, 68, 5, 5, 39,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 17, HDMI_HDMI },
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},
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{
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{ 1280, 720, 74250000, 40, 440, 220, 5, 5, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 19, HDMI_HDMI },
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},
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{
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{ 1920, 540, 74250000, 44, 528, 148, 5, 2, 15,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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true, },
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{ 20, HDMI_HDMI },
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},
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{
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{ 1440, 288, 27000000, 126, 24, 138, 3, 2, 19,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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true, },
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{ 21, HDMI_HDMI },
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},
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{
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{ 1440, 576, 54000000, 128, 24, 136, 5, 5, 39,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 29, HDMI_HDMI },
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},
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{
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{ 1920, 1080, 148500000, 44, 528, 148, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 31, HDMI_HDMI },
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},
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{
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{ 1920, 1080, 74250000, 44, 638, 148, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 32, HDMI_HDMI },
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},
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{
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{ 2880, 480, 108108000, 248, 64, 240, 6, 9, 30,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 35, HDMI_HDMI },
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},
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{
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{ 2880, 576, 108000000, 256, 48, 272, 5, 5, 39,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 37, HDMI_HDMI },
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},
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};
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static const struct hdmi_config vesa_timings[] = {
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/* VESA From Here */
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{
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{ 640, 480, 25175000, 96, 16, 48, 2, 11, 31,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 4, HDMI_DVI },
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},
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{
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{ 800, 600, 40000000, 128, 40, 88, 4, 1, 23,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 9, HDMI_DVI },
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},
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{
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{ 848, 480, 33750000, 112, 16, 112, 8, 6, 23,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0xE, HDMI_DVI },
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},
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{
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{ 1280, 768, 79500000, 128, 64, 192, 7, 3, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x17, HDMI_DVI },
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},
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{
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{ 1280, 800, 83500000, 128, 72, 200, 6, 3, 22,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x1C, HDMI_DVI },
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},
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{
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{ 1360, 768, 85500000, 112, 64, 256, 6, 3, 18,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x27, HDMI_DVI },
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},
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{
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{ 1280, 960, 108000000, 112, 96, 312, 3, 1, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x20, HDMI_DVI },
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},
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{
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{ 1280, 1024, 108000000, 112, 48, 248, 3, 1, 38,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x23, HDMI_DVI },
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},
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{
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{ 1024, 768, 65000000, 136, 24, 160, 6, 3, 29,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x10, HDMI_DVI },
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},
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{
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{ 1400, 1050, 121750000, 144, 88, 232, 4, 3, 32,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x2A, HDMI_DVI },
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},
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{
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{ 1440, 900, 106500000, 152, 80, 232, 6, 3, 25,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x2F, HDMI_DVI },
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},
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{
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{ 1680, 1050, 146250000, 176 , 104, 280, 6, 3, 30,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x3A, HDMI_DVI },
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},
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{
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{ 1366, 768, 85500000, 143, 70, 213, 3, 3, 24,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x51, HDMI_DVI },
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},
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{
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{ 1920, 1080, 148500000, 44, 148, 80, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x52, HDMI_DVI },
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},
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{
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{ 1280, 768, 68250000, 32, 48, 80, 7, 3, 12,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x16, HDMI_DVI },
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},
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{
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{ 1400, 1050, 101000000, 32, 48, 80, 4, 3, 23,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x29, HDMI_DVI },
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},
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{
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{ 1680, 1050, 119000000, 32, 48, 80, 6, 3, 21,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x39, HDMI_DVI },
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},
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{
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{ 1280, 800, 79500000, 32, 48, 80, 6, 3, 14,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x1B, HDMI_DVI },
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},
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{
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{ 1280, 720, 74250000, 40, 110, 220, 5, 5, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x55, HDMI_DVI },
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},
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{
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{ 1920, 1200, 154000000, 32, 48, 80, 6, 3, 26,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x44, HDMI_DVI },
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},
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};
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const struct hdmi_config *hdmi_default_timing(void)
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{
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return &vesa_timings[0];
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}
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static const struct hdmi_config *hdmi_find_timing(int code,
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const struct hdmi_config *timings_arr, int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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if (timings_arr[i].cm.code == code)
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return &timings_arr[i];
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}
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return NULL;
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}
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const struct hdmi_config *hdmi_get_timings(int mode, int code)
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{
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const struct hdmi_config *arr;
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int len;
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if (mode == HDMI_DVI) {
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arr = vesa_timings;
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len = ARRAY_SIZE(vesa_timings);
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} else {
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arr = cea_timings;
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len = ARRAY_SIZE(cea_timings);
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}
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return hdmi_find_timing(code, arr, len);
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}
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static bool hdmi_timings_compare(struct omap_video_timings *timing1,
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const struct omap_video_timings *timing2)
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{
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int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync;
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if ((DIV_ROUND_CLOSEST(timing2->pixelclock, 1000000) ==
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DIV_ROUND_CLOSEST(timing1->pixelclock, 1000000)) &&
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(timing2->x_res == timing1->x_res) &&
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(timing2->y_res == timing1->y_res)) {
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timing2_hsync = timing2->hfp + timing2->hsw + timing2->hbp;
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timing1_hsync = timing1->hfp + timing1->hsw + timing1->hbp;
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timing2_vsync = timing2->vfp + timing2->vsw + timing2->vbp;
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timing1_vsync = timing1->vfp + timing1->vsw + timing1->vbp;
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DSSDBG("timing1_hsync = %d timing1_vsync = %d"\
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"timing2_hsync = %d timing2_vsync = %d\n",
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timing1_hsync, timing1_vsync,
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timing2_hsync, timing2_vsync);
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if ((timing1_hsync == timing2_hsync) &&
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(timing1_vsync == timing2_vsync)) {
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return true;
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}
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}
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return false;
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}
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struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing)
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{
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int i;
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struct hdmi_cm cm = {-1};
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DSSDBG("hdmi_get_code\n");
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for (i = 0; i < ARRAY_SIZE(cea_timings); i++) {
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if (hdmi_timings_compare(timing, &cea_timings[i].timings)) {
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cm = cea_timings[i].cm;
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goto end;
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}
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}
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for (i = 0; i < ARRAY_SIZE(vesa_timings); i++) {
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if (hdmi_timings_compare(timing, &vesa_timings[i].timings)) {
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cm = vesa_timings[i].cm;
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goto end;
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}
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}
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end:
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return cm;
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}
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#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
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int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts)
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{
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u32 deep_color;
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bool deep_color_correct = false;
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if (n == NULL || cts == NULL)
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return -EINVAL;
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/* TODO: When implemented, query deep color mode here. */
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deep_color = 100;
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/*
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* When using deep color, the default N value (as in the HDMI
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* specification) yields to an non-integer CTS. Hence, we
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* modify it while keeping the restrictions described in
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* section 7.2.1 of the HDMI 1.4a specification.
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*/
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switch (sample_freq) {
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case 32000:
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case 48000:
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case 96000:
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case 192000:
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if (deep_color == 125)
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if (pclk == 27027000 || pclk == 74250000)
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deep_color_correct = true;
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if (deep_color == 150)
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if (pclk == 27027000)
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deep_color_correct = true;
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break;
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case 44100:
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case 88200:
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case 176400:
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if (deep_color == 125)
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if (pclk == 27027000)
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deep_color_correct = true;
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break;
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default:
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return -EINVAL;
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}
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if (deep_color_correct) {
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switch (sample_freq) {
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case 32000:
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*n = 8192;
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break;
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case 44100:
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*n = 12544;
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break;
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case 48000:
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*n = 8192;
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break;
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case 88200:
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*n = 25088;
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break;
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case 96000:
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*n = 16384;
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break;
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case 176400:
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*n = 50176;
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break;
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case 192000:
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*n = 32768;
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break;
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default:
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return -EINVAL;
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}
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} else {
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switch (sample_freq) {
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case 32000:
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*n = 4096;
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break;
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case 44100:
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*n = 6272;
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break;
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case 48000:
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*n = 6144;
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break;
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case 88200:
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*n = 12544;
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break;
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case 96000:
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*n = 12288;
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break;
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case 176400:
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*n = 25088;
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break;
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case 192000:
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*n = 24576;
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break;
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default:
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return -EINVAL;
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}
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}
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/* Calculate CTS. See HDMI 1.3a or 1.4a specifications */
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*cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10);
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return 0;
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}
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#endif
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