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4c132d1d84
Use the new EX_TYPE_IMM_REG to store -EFAULT into the designated 'ret' register, this removes the need for anonymous .fixup code. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com> Link: https://lore.kernel.org/r/20211110101325.426016322@infradead.org
104 lines
2.5 KiB
C
104 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_FUTEX_H
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#define _ASM_X86_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/asm.h>
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#include <asm/errno.h>
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#include <asm/processor.h>
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#include <asm/smap.h>
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#define unsafe_atomic_op1(insn, oval, uaddr, oparg, label) \
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do { \
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int oldval = 0, ret; \
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asm volatile("1:\t" insn "\n" \
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"2:\n" \
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_ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG, %1) \
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: "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
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: "0" (oparg), "1" (0)); \
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if (ret) \
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goto label; \
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*oval = oldval; \
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} while(0)
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#define unsafe_atomic_op2(insn, oval, uaddr, oparg, label) \
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do { \
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int oldval = 0, ret, tem; \
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asm volatile("1:\tmovl %2, %0\n" \
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"2:\tmovl\t%0, %3\n" \
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"\t" insn "\n" \
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"3:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
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"\tjnz\t2b\n" \
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"4:\n" \
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_ASM_EXTABLE_TYPE_REG(1b, 4b, EX_TYPE_EFAULT_REG, %1) \
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_ASM_EXTABLE_TYPE_REG(3b, 4b, EX_TYPE_EFAULT_REG, %1) \
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: "=&a" (oldval), "=&r" (ret), \
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"+m" (*uaddr), "=&r" (tem) \
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: "r" (oparg), "1" (0)); \
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if (ret) \
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goto label; \
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*oval = oldval; \
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} while(0)
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static __always_inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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u32 __user *uaddr)
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{
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if (!user_access_begin(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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unsafe_atomic_op1("xchgl %0, %2", oval, uaddr, oparg, Efault);
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break;
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case FUTEX_OP_ADD:
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unsafe_atomic_op1(LOCK_PREFIX "xaddl %0, %2", oval,
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uaddr, oparg, Efault);
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break;
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case FUTEX_OP_OR:
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unsafe_atomic_op2("orl %4, %3", oval, uaddr, oparg, Efault);
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break;
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case FUTEX_OP_ANDN:
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unsafe_atomic_op2("andl %4, %3", oval, uaddr, ~oparg, Efault);
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break;
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case FUTEX_OP_XOR:
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unsafe_atomic_op2("xorl %4, %3", oval, uaddr, oparg, Efault);
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break;
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default:
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user_access_end();
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return -ENOSYS;
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}
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user_access_end();
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return 0;
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Efault:
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user_access_end();
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return -EFAULT;
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}
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static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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int ret = 0;
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if (!user_access_begin(uaddr, sizeof(u32)))
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return -EFAULT;
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asm volatile("\n"
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"1:\t" LOCK_PREFIX "cmpxchgl %3, %2\n"
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"2:\n"
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_ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG, %0) \
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: "+r" (ret), "=a" (oldval), "+m" (*uaddr)
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: "r" (newval), "1" (oldval)
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: "memory"
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);
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user_access_end();
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*uval = oldval;
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return ret;
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}
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#endif
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#endif /* _ASM_X86_FUTEX_H */
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