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ef558b4b7b
Currently several architectures have kerneldoc comments for arch_atomic_*(), which is unhelpful as these live in a shared namespace where they clash, and the arch_atomic_*() ops are now an implementation detail of the raw_atomic_*() ops, which no-one should use those directly. Delete the kerneldoc comments for arch_atomic_*(), along with pseudo-kerneldoc comments which are in the correct style but are missing the leading '/**' necessary to be true kerneldoc comments. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-28-mark.rutland@arm.com
267 lines
6.6 KiB
C
267 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_ATOMIC64_32_H
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#define _ASM_X86_ATOMIC64_32_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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//#include <asm/cmpxchg.h>
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/* An 64bit atomic type */
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typedef struct {
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s64 __aligned(8) counter;
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} atomic64_t;
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#define ATOMIC64_INIT(val) { (val) }
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#define __ATOMIC64_DECL(sym) void atomic64_##sym(atomic64_t *, ...)
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#ifndef ATOMIC64_EXPORT
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#define ATOMIC64_DECL_ONE __ATOMIC64_DECL
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#else
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#define ATOMIC64_DECL_ONE(sym) __ATOMIC64_DECL(sym); \
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ATOMIC64_EXPORT(atomic64_##sym)
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#endif
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#ifdef CONFIG_X86_CMPXCHG64
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#define __alternative_atomic64(f, g, out, in...) \
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asm volatile("call %P[func]" \
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: out : [func] "i" (atomic64_##g##_cx8), ## in)
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#define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8)
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#else
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#define __alternative_atomic64(f, g, out, in...) \
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alternative_call(atomic64_##f##_386, atomic64_##g##_cx8, \
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X86_FEATURE_CX8, ASM_OUTPUT2(out), ## in)
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#define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8); \
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ATOMIC64_DECL_ONE(sym##_386)
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ATOMIC64_DECL_ONE(add_386);
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ATOMIC64_DECL_ONE(sub_386);
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ATOMIC64_DECL_ONE(inc_386);
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ATOMIC64_DECL_ONE(dec_386);
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#endif
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#define alternative_atomic64(f, out, in...) \
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__alternative_atomic64(f, f, ASM_OUTPUT2(out), ## in)
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ATOMIC64_DECL(read);
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ATOMIC64_DECL(set);
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ATOMIC64_DECL(xchg);
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ATOMIC64_DECL(add_return);
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ATOMIC64_DECL(sub_return);
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ATOMIC64_DECL(inc_return);
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ATOMIC64_DECL(dec_return);
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ATOMIC64_DECL(dec_if_positive);
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ATOMIC64_DECL(inc_not_zero);
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ATOMIC64_DECL(add_unless);
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#undef ATOMIC64_DECL
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#undef ATOMIC64_DECL_ONE
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#undef __ATOMIC64_DECL
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#undef ATOMIC64_EXPORT
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static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n)
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{
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return arch_cmpxchg64(&v->counter, o, n);
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}
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#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg
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static __always_inline s64 arch_atomic64_xchg(atomic64_t *v, s64 n)
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{
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s64 o;
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unsigned high = (unsigned)(n >> 32);
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unsigned low = (unsigned)n;
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alternative_atomic64(xchg, "=&A" (o),
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"S" (v), "b" (low), "c" (high)
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: "memory");
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return o;
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}
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#define arch_atomic64_xchg arch_atomic64_xchg
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static __always_inline void arch_atomic64_set(atomic64_t *v, s64 i)
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{
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unsigned high = (unsigned)(i >> 32);
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unsigned low = (unsigned)i;
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alternative_atomic64(set, /* no output */,
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"S" (v), "b" (low), "c" (high)
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: "eax", "edx", "memory");
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}
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static __always_inline s64 arch_atomic64_read(const atomic64_t *v)
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{
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s64 r;
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alternative_atomic64(read, "=&A" (r), "c" (v) : "memory");
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return r;
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}
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static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)
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{
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alternative_atomic64(add_return,
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ASM_OUTPUT2("+A" (i), "+c" (v)),
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ASM_NO_INPUT_CLOBBER("memory"));
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return i;
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}
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#define arch_atomic64_add_return arch_atomic64_add_return
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static __always_inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v)
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{
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alternative_atomic64(sub_return,
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ASM_OUTPUT2("+A" (i), "+c" (v)),
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ASM_NO_INPUT_CLOBBER("memory"));
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return i;
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}
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#define arch_atomic64_sub_return arch_atomic64_sub_return
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static __always_inline s64 arch_atomic64_inc_return(atomic64_t *v)
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{
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s64 a;
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alternative_atomic64(inc_return, "=&A" (a),
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"S" (v) : "memory", "ecx");
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return a;
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}
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#define arch_atomic64_inc_return arch_atomic64_inc_return
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static __always_inline s64 arch_atomic64_dec_return(atomic64_t *v)
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{
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s64 a;
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alternative_atomic64(dec_return, "=&A" (a),
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"S" (v) : "memory", "ecx");
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return a;
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}
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#define arch_atomic64_dec_return arch_atomic64_dec_return
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static __always_inline s64 arch_atomic64_add(s64 i, atomic64_t *v)
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{
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__alternative_atomic64(add, add_return,
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ASM_OUTPUT2("+A" (i), "+c" (v)),
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ASM_NO_INPUT_CLOBBER("memory"));
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return i;
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}
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static __always_inline s64 arch_atomic64_sub(s64 i, atomic64_t *v)
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{
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__alternative_atomic64(sub, sub_return,
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ASM_OUTPUT2("+A" (i), "+c" (v)),
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ASM_NO_INPUT_CLOBBER("memory"));
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return i;
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}
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static __always_inline void arch_atomic64_inc(atomic64_t *v)
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{
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__alternative_atomic64(inc, inc_return, /* no output */,
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"S" (v) : "memory", "eax", "ecx", "edx");
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}
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#define arch_atomic64_inc arch_atomic64_inc
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static __always_inline void arch_atomic64_dec(atomic64_t *v)
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{
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__alternative_atomic64(dec, dec_return, /* no output */,
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"S" (v) : "memory", "eax", "ecx", "edx");
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}
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#define arch_atomic64_dec arch_atomic64_dec
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static __always_inline int arch_atomic64_add_unless(atomic64_t *v, s64 a, s64 u)
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{
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unsigned low = (unsigned)u;
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unsigned high = (unsigned)(u >> 32);
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alternative_atomic64(add_unless,
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ASM_OUTPUT2("+A" (a), "+c" (low), "+D" (high)),
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"S" (v) : "memory");
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return (int)a;
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}
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#define arch_atomic64_add_unless arch_atomic64_add_unless
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static __always_inline int arch_atomic64_inc_not_zero(atomic64_t *v)
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{
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int r;
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alternative_atomic64(inc_not_zero, "=&a" (r),
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"S" (v) : "ecx", "edx", "memory");
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return r;
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}
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#define arch_atomic64_inc_not_zero arch_atomic64_inc_not_zero
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static __always_inline s64 arch_atomic64_dec_if_positive(atomic64_t *v)
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{
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s64 r;
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alternative_atomic64(dec_if_positive, "=&A" (r),
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"S" (v) : "ecx", "memory");
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return r;
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}
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#define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive
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#undef alternative_atomic64
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#undef __alternative_atomic64
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static __always_inline void arch_atomic64_and(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c & i)) != c)
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c = old;
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}
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static __always_inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c & i)) != c)
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c = old;
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return old;
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}
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#define arch_atomic64_fetch_and arch_atomic64_fetch_and
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static __always_inline void arch_atomic64_or(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c | i)) != c)
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c = old;
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}
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static __always_inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c | i)) != c)
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c = old;
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return old;
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}
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#define arch_atomic64_fetch_or arch_atomic64_fetch_or
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static __always_inline void arch_atomic64_xor(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c ^ i)) != c)
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c = old;
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}
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static __always_inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c ^ i)) != c)
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c = old;
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return old;
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}
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#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
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static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)
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{
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s64 old, c = 0;
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while ((old = arch_atomic64_cmpxchg(v, c, c + i)) != c)
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c = old;
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return old;
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}
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#define arch_atomic64_fetch_add arch_atomic64_fetch_add
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#define arch_atomic64_fetch_sub(i, v) arch_atomic64_fetch_add(-(i), (v))
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#endif /* _ASM_X86_ATOMIC64_32_H */
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