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High Quality Video Data Plane is hardware IP dedicated to video rendering. Compare to GPD (graphic planes) it have better scaler capabilities. HQVDP use VID layer to push data into hardware compositor without going into DDR. From data flow point of view HQVDP and VID are nested so HQVPD update/disable VID. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
132 lines
3.8 KiB
C
132 lines
3.8 KiB
C
/*
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* Copyright (C) STMicroelectronics SA 2014
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* Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
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* Fabien Dessenne <fabien.dessenne@st.com>
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* for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#ifndef _STI_LAYER_H_
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#define _STI_LAYER_H_
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#include <drm/drmP.h>
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#define to_sti_layer(x) container_of(x, struct sti_layer, plane)
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#define STI_LAYER_TYPE_SHIFT 8
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#define STI_LAYER_TYPE_MASK (~((1<<STI_LAYER_TYPE_SHIFT)-1))
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struct sti_layer;
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enum sti_layer_type {
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STI_GDP = 1 << STI_LAYER_TYPE_SHIFT,
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STI_VID = 2 << STI_LAYER_TYPE_SHIFT,
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STI_CUR = 3 << STI_LAYER_TYPE_SHIFT,
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STI_BCK = 4 << STI_LAYER_TYPE_SHIFT,
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STI_VDP = 5 << STI_LAYER_TYPE_SHIFT
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};
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enum sti_layer_id_of_type {
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STI_ID_0 = 0,
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STI_ID_1 = 1,
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STI_ID_2 = 2,
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STI_ID_3 = 3
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};
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enum sti_layer_desc {
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STI_GDP_0 = STI_GDP | STI_ID_0,
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STI_GDP_1 = STI_GDP | STI_ID_1,
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STI_GDP_2 = STI_GDP | STI_ID_2,
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STI_GDP_3 = STI_GDP | STI_ID_3,
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STI_VID_0 = STI_VID | STI_ID_0,
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STI_VID_1 = STI_VID | STI_ID_1,
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STI_HQVDP_0 = STI_VDP | STI_ID_0,
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STI_CURSOR = STI_CUR,
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STI_BACK = STI_BCK
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};
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/**
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* STI layer functions structure
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*
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* @get_formats: get layer supported formats
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* @get_nb_formats: get number of format supported
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* @init: initialize the layer
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* @prepare: prepare layer before rendering
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* @commit: set layer for rendering
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* @disable: disable layer
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*/
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struct sti_layer_funcs {
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const uint32_t* (*get_formats)(struct sti_layer *layer);
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unsigned int (*get_nb_formats)(struct sti_layer *layer);
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void (*init)(struct sti_layer *layer);
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int (*prepare)(struct sti_layer *layer, bool first_prepare);
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int (*commit)(struct sti_layer *layer);
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int (*disable)(struct sti_layer *layer);
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};
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/**
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* STI layer structure
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*
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* @plane: drm plane it is bound to (if any)
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* @fb: drm fb it is bound to
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* @crtc: crtc it is bound to
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* @mode: display mode
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* @desc: layer type & id
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* @device: driver device
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* @regs: layer registers
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* @ops: layer functions
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* @zorder: layer z-order
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* @mixer_id: id of the mixer used to display the layer
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* @enabled: to know if the layer is active or not
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* @src_x src_y: coordinates of the input (fb) area
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* @src_w src_h: size of the input (fb) area
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* @dst_x dst_y: coordinates of the output (crtc) area
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* @dst_w dst_h: size of the output (crtc) area
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* @format: format
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* @pitches: pitch of 'planes' (eg: Y, U, V)
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* @offsets: offset of 'planes'
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* @vaddr: virtual address of the input buffer
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* @paddr: physical address of the input buffer
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*/
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struct sti_layer {
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struct drm_plane plane;
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struct drm_framebuffer *fb;
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struct drm_crtc *crtc;
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struct drm_display_mode *mode;
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enum sti_layer_desc desc;
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struct device *dev;
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void __iomem *regs;
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const struct sti_layer_funcs *ops;
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int zorder;
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int mixer_id;
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bool enabled;
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int src_x, src_y;
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int src_w, src_h;
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int dst_x, dst_y;
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int dst_w, dst_h;
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uint32_t format;
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unsigned int pitches[4];
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unsigned int offsets[4];
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void *vaddr;
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dma_addr_t paddr;
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};
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struct sti_layer *sti_layer_create(struct device *dev, int desc,
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void __iomem *baseaddr);
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int sti_layer_prepare(struct sti_layer *layer,
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struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_display_mode *mode,
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int mixer_id,
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int dest_x, int dest_y,
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int dest_w, int dest_h,
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int src_x, int src_y,
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int src_w, int src_h);
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int sti_layer_commit(struct sti_layer *layer);
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int sti_layer_disable(struct sti_layer *layer);
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const uint32_t *sti_layer_get_formats(struct sti_layer *layer);
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unsigned int sti_layer_get_nb_formats(struct sti_layer *layer);
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const char *sti_layer_to_str(struct sti_layer *layer);
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#endif
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