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85756a069c
The cobalt device is a PCIe card with 4 HDMI inputs (adv7604) and a connector that can be used to hook up an adv7511 transmitter or an adv7842 receiver daughterboard. This device is used within Cisco but is sadly not available outside of Cisco. Nevertheless it is a very interesting driver that can serve as an example of how to support HDMI hardware and how to use the popular adv devices. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
60 lines
2.7 KiB
C
60 lines
2.7 KiB
C
/*
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* Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates.
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* All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef M00389_CVI_MEMMAP_PACKAGE_H
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#define M00389_CVI_MEMMAP_PACKAGE_H
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/*******************************************************************
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* Register Block
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* M00389_CVI_MEMMAP_PACKAGE_VHD_REGMAP
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*******************************************************************/
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struct m00389_cvi_regmap {
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uint32_t control; /* Reg 0x0000, Default=0x0 */
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uint32_t frame_width; /* Reg 0x0004, Default=0x10 */
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uint32_t frame_height; /* Reg 0x0008, Default=0xc */
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uint32_t freewheel_period; /* Reg 0x000c, Default=0x0 */
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uint32_t error_color; /* Reg 0x0010, Default=0x0 */
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uint32_t status; /* Reg 0x0014 */
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};
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#define M00389_CVI_REG_CONTROL_OFST 0
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#define M00389_CVI_REG_FRAME_WIDTH_OFST 4
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#define M00389_CVI_REG_FRAME_HEIGHT_OFST 8
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#define M00389_CVI_REG_FREEWHEEL_PERIOD_OFST 12
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#define M00389_CVI_REG_ERROR_COLOR_OFST 16
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#define M00389_CVI_REG_STATUS_OFST 20
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/*******************************************************************
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* Bit Mask for register
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* M00389_CVI_MEMMAP_PACKAGE_VHD_BITMAP
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*******************************************************************/
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/* control [2:0] */
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#define M00389_CONTROL_BITMAP_ENABLE_OFST (0)
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#define M00389_CONTROL_BITMAP_ENABLE_MSK (0x1 << M00389_CONTROL_BITMAP_ENABLE_OFST)
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#define M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST (1)
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#define M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_MSK (0x1 << M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST)
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#define M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST (2)
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#define M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_MSK (0x1 << M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST)
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/* status [1:0] */
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#define M00389_STATUS_BITMAP_LOCK_OFST (0)
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#define M00389_STATUS_BITMAP_LOCK_MSK (0x1 << M00389_STATUS_BITMAP_LOCK_OFST)
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#define M00389_STATUS_BITMAP_ERROR_OFST (1)
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#define M00389_STATUS_BITMAP_ERROR_MSK (0x1 << M00389_STATUS_BITMAP_ERROR_OFST)
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#endif /*M00389_CVI_MEMMAP_PACKAGE_H*/
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