mirror of
https://github.com/torvalds/linux.git
synced 2024-12-05 02:23:16 +00:00
2a3c8f8a44
Several on-running cleanup efforts dominate this time, plus the DMA safety alignment issue identified due to improved understanding of the restrictions as a result of Catalin Marinas' efforts in that area. One immutable branch in here due to MFD and SPMI elements needed for the qcom-rradc driver. Device support * bmi088 - Add support for bmi085 (accelerometer part of IMU) - Add support for bmi090l (accelerometer part of IMU) * mcp4922 - Add support for single channel device MCP4921 * rzg2l-adc - Add compatible and minor tweaks to support RZ/G2UL ADC * sca3300 - Add support for scl3300 including refactoring driver to support multiple device types and cleanup noticed whilst working on driver. * spmi-rradc - New driver for Qualcomm SPMI Round Robin ADC including necessary additional utility functions in SPMI core and related MFD driver. * ti-dac55781 - Add compatible for DAC121C081 which is very similar to existing parts. Features * core - Warn on iio_trigger_get() on an unregistered IIO trigger. * bma400 - Triggered buffer support - Activity and step counting - Misc driver improvements such as devm and header ordering * cm32181 - Add PM support. * cros_ec - Sensor location support * sx9324 - Add precharge resistor setting - Add internal compensation resistor setting - Add CS idle/sleep mode. * sx9360 - Add precharge resistor setting * vl53l0x - Handle reset GPIO, regulator and relax handling of irq type. Cleanup and minor fixes: Treewide changes - Cleanup of error handling in remove functions in many drivers. - Update dt-binding maintainers for a number of ADI bindings. - Several sets of conversion of drivers from device tree specific to generic device properties. Includes fixing up various related header and Kconfig issues. - Drop include of of.h from iio.h and fix up drivers that need to include it directly. - More moves of clusters of drivers into appropriate IIO_XXX namespaces. - Tree wide fix of a long running bug around DMA safety requirements. IIO was using __cacheline_aligned to pad iio_priv() structures. This worked for a long time by coincidence, but correct alignment is ARCH_KMALLOC_MINALIGN. As there is activity around this area, introduce an IIO local IIO_DMA_MINALIGN to allow for changing it in one place rather than every driver in future. Note, there have been no reports of this bug in the wild, and it may not happen on any platforms supported by upstream, so no rush to backport these fixes. Other cleanup * core - Switch to ida_alloc()/free() - Drop unused iio_get_time_res() - Octal permissions and DEVICE_ATTR_* macros. - Cleanup bared unsigned usage. * MAINTAINERS - Add include/dt-bindings/iio/ to the main IIO entry. * ad5380 - Comment syntax fix. * ad74413r - Call to for_each_set_bit_from(), with from value as 0 replaced. * ad7768-1 - Drop explicit setting of INDIO_BUFFER_TRIGGERED as now done by the core. * adxl345 - Fix wrong address in dt-binding example. * adxl367 - Drop extra update of FIFO watermark. * at91-sama5d2 - Limit requested watermark to the hwfifo size. * bmg160, bme680 - Typos * cio-dac - Switch to iomap rather than direct use of ioports * kxsd9 - Replace CONFIG_PM guards with new PM macros that let the compiler cleanly remove the unused code and structures when !CONFIG_PM * lsm6dsx - Use new pm_sleep_ptr() and EXPORT_SIMPLE_DEV_PM_OPS(). Then move to Namespace. * meson_saradc - general cleanup. - Avoid attaching resources to iio_dev->dev - Use same struct device for all error messages - Convert to dev_err_probe() and use local struct device *dev to reduce code complexity. - Use devm_clk_get_optional() instead of hand rolling. - Use regmap_read_poll_timeout() instead of hand rolling. * mma7660 - Drop ACPI_PTR() use that is unhelpful. * mpu3050 - Stop exporting symbols not used outside of module - Switch to new DEFINE_RUNTIME_DEV_PM_OPS() macro and move to Namespace. * ping - Typo fix * qcom-spmi-rradc - Typo fix * sc27xx - Convert to generic struct u32_fract * srf08 - Drop a redundant check on !val * st_lsm6dsx - Limit the requested watermark to the hwfifo size. * stm32-adc - Use generic_handle_domain_irq() instead of opencoding. - Fix handling of ADC disable. * stm32-dac - Use str_enabled_disable() instead of open coding. * stx104 - Switch to iomap rather than direct use of ioports * tsc2046 - Drop explicit setting of INDIO_BUFFER_TRIGGERED as now done by the core. * tsl2563 - Replace flush_scheduled_work() with cancel_delayed_work_sync() - Replace cancel_delayed_work() with cancel_delayed_work_sync() * vl53l0x - Make the VDD regulator optional by allowing a dummy regulator. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmLQBwARHGppYzIzQGtl cm5lbC5vcmcACgkQVIU0mcT0FohMHRAAi3nPM3IchXe886olumRgX5ke75vU+FNT sqQjqlpl6X7j5yNLU+HF6lC7zg3QzDnfWJ3Uo4C7s2sW7zO0997lkFx4jvF3yW9y 0nLDgYm1Y1te/qR84BE355pMEsYEJVZyPI/Z8UfuBh6IfnSDeTE5ZwCvlRMAchtp AX+j1114FQvZ8yfdIlFjlN4vYSxCGgEZzfWYhpch/Jv1y2Q0L17bpv/KWGt1AYaF VugmKoNTM3WzIABBNGWQ4l4ZVVuVpuiVUL90AKv6Qf+yDSqw94tuIM0NZpJ1rqLr 7tH568m7Eewh7zBp88PRB9XDiZVERvzdVQaT22+wlX+Vhn/SKeoK8PPpdLWD1YyG hXB0p+FGKncoKKgK1w9L7qRRNmsQDHowNHYMSjnzeBuyGQyEqwAXzNvvbiCqHh8y 7b8GW+CYo7//wIarg74Xl+/4LwdCGcMUJNuTm1efEgC7yGToY7JD63DNo3sylaII bfoT06/yogaay/rVLZs5n+MvDONaDt4AbTTErG48s0TzqD/O8Ys85AF0IvKwQ80N WMxe4y+gdJ6VuU+ww9+6WdUzxnx+5gt+ZA2iLxZFekOIUi3Tj+q47F+17Jvwyt7U 2wQzdtvNhHPwD5CqYpxD4iH/z5YFCtIHKjmUsVyAWGVbeuSS/QvFzpf39YWxBWO+ W1w6RStUbXo= =IcsE -----END PGP SIGNATURE----- Merge tag 'iio-for-5.20a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Jonathan writes: IIO new device support, features and minor fixes for 5.20 Several on-running cleanup efforts dominate this time, plus the DMA safety alignment issue identified due to improved understanding of the restrictions as a result of Catalin Marinas' efforts in that area. One immutable branch in here due to MFD and SPMI elements needed for the qcom-rradc driver. Device support * bmi088 - Add support for bmi085 (accelerometer part of IMU) - Add support for bmi090l (accelerometer part of IMU) * mcp4922 - Add support for single channel device MCP4921 * rzg2l-adc - Add compatible and minor tweaks to support RZ/G2UL ADC * sca3300 - Add support for scl3300 including refactoring driver to support multiple device types and cleanup noticed whilst working on driver. * spmi-rradc - New driver for Qualcomm SPMI Round Robin ADC including necessary additional utility functions in SPMI core and related MFD driver. * ti-dac55781 - Add compatible for DAC121C081 which is very similar to existing parts. Features * core - Warn on iio_trigger_get() on an unregistered IIO trigger. * bma400 - Triggered buffer support - Activity and step counting - Misc driver improvements such as devm and header ordering * cm32181 - Add PM support. * cros_ec - Sensor location support * sx9324 - Add precharge resistor setting - Add internal compensation resistor setting - Add CS idle/sleep mode. * sx9360 - Add precharge resistor setting * vl53l0x - Handle reset GPIO, regulator and relax handling of irq type. Cleanup and minor fixes: Treewide changes - Cleanup of error handling in remove functions in many drivers. - Update dt-binding maintainers for a number of ADI bindings. - Several sets of conversion of drivers from device tree specific to generic device properties. Includes fixing up various related header and Kconfig issues. - Drop include of of.h from iio.h and fix up drivers that need to include it directly. - More moves of clusters of drivers into appropriate IIO_XXX namespaces. - Tree wide fix of a long running bug around DMA safety requirements. IIO was using __cacheline_aligned to pad iio_priv() structures. This worked for a long time by coincidence, but correct alignment is ARCH_KMALLOC_MINALIGN. As there is activity around this area, introduce an IIO local IIO_DMA_MINALIGN to allow for changing it in one place rather than every driver in future. Note, there have been no reports of this bug in the wild, and it may not happen on any platforms supported by upstream, so no rush to backport these fixes. Other cleanup * core - Switch to ida_alloc()/free() - Drop unused iio_get_time_res() - Octal permissions and DEVICE_ATTR_* macros. - Cleanup bared unsigned usage. * MAINTAINERS - Add include/dt-bindings/iio/ to the main IIO entry. * ad5380 - Comment syntax fix. * ad74413r - Call to for_each_set_bit_from(), with from value as 0 replaced. * ad7768-1 - Drop explicit setting of INDIO_BUFFER_TRIGGERED as now done by the core. * adxl345 - Fix wrong address in dt-binding example. * adxl367 - Drop extra update of FIFO watermark. * at91-sama5d2 - Limit requested watermark to the hwfifo size. * bmg160, bme680 - Typos * cio-dac - Switch to iomap rather than direct use of ioports * kxsd9 - Replace CONFIG_PM guards with new PM macros that let the compiler cleanly remove the unused code and structures when !CONFIG_PM * lsm6dsx - Use new pm_sleep_ptr() and EXPORT_SIMPLE_DEV_PM_OPS(). Then move to Namespace. * meson_saradc - general cleanup. - Avoid attaching resources to iio_dev->dev - Use same struct device for all error messages - Convert to dev_err_probe() and use local struct device *dev to reduce code complexity. - Use devm_clk_get_optional() instead of hand rolling. - Use regmap_read_poll_timeout() instead of hand rolling. * mma7660 - Drop ACPI_PTR() use that is unhelpful. * mpu3050 - Stop exporting symbols not used outside of module - Switch to new DEFINE_RUNTIME_DEV_PM_OPS() macro and move to Namespace. * ping - Typo fix * qcom-spmi-rradc - Typo fix * sc27xx - Convert to generic struct u32_fract * srf08 - Drop a redundant check on !val * st_lsm6dsx - Limit the requested watermark to the hwfifo size. * stm32-adc - Use generic_handle_domain_irq() instead of opencoding. - Fix handling of ADC disable. * stm32-dac - Use str_enabled_disable() instead of open coding. * stx104 - Switch to iomap rather than direct use of ioports * tsc2046 - Drop explicit setting of INDIO_BUFFER_TRIGGERED as now done by the core. * tsl2563 - Replace flush_scheduled_work() with cancel_delayed_work_sync() - Replace cancel_delayed_work() with cancel_delayed_work_sync() * vl53l0x - Make the VDD regulator optional by allowing a dummy regulator. * tag 'iio-for-5.20a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (244 commits) iio: adc: xilinx-xadc: Drop duplicate NULL check in xadc_parse_dt() iio: adc: xilinx-xadc: Make use of device properties iio: light: cm32181: Add PM support iio: adc: ad778-1: do not explicity set INDIO_BUFFER_TRIGGERED mode iio: adc: ti-tsc2046: do not explicity set INDIO_BUFFER_TRIGGERED mode iio: adc: stm32-adc: disable adc before calibration iio: adc: stm32-adc: make safe adc disable iio: dac: ad5380: align '*' each line and drop unneeded blank line iio: adc: qcom-spmi-rradc: Fix spelling mistake "coherrency" -> "coherency" iio: Don't use bare "unsigned" dt-bindings: iio: dac: mcp4922: expand for mcp4921 support iio: dac: mcp4922: add support to mcp4921 iio: chemical: sps30: Move symbol exports into IIO_SPS30 namespace iio: pressure: bmp280: Move symbol exports to IIO_BMP280 namespace iio: imu: bmi160: Move exported symbols to IIO_BMI160 namespace iio: adc: stm32-adc: Use generic_handle_domain_irq() proximity: vl53l0x: Make VDD regulator actually optional MAINTAINERS: add include/dt-bindings/iio to IIO SUBSYSTEM AND DRIVERS dt-bindings: iio/accel: Fix adi,adxl345/6 example I2C address iio: gyro: bmg160: Fix typo in comment ...
603 lines
14 KiB
C
603 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* RZ/G2L A/D Converter driver
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*
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* Copyright (c) 2021 Renesas Electronics Europe GmbH
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*
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* Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/iio/iio.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/reset.h>
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#define DRIVER_NAME "rzg2l-adc"
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#define RZG2L_ADM(n) ((n) * 0x4)
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#define RZG2L_ADM0_ADCE BIT(0)
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#define RZG2L_ADM0_ADBSY BIT(1)
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#define RZG2L_ADM0_PWDWNB BIT(2)
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#define RZG2L_ADM0_SRESB BIT(15)
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#define RZG2L_ADM1_TRG BIT(0)
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#define RZG2L_ADM1_MS BIT(2)
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#define RZG2L_ADM1_BS BIT(4)
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#define RZG2L_ADM1_EGA_MASK GENMASK(13, 12)
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#define RZG2L_ADM2_CHSEL_MASK GENMASK(7, 0)
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#define RZG2L_ADM3_ADIL_MASK GENMASK(31, 24)
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#define RZG2L_ADM3_ADCMP_MASK GENMASK(23, 16)
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#define RZG2L_ADM3_ADCMP_E FIELD_PREP(RZG2L_ADM3_ADCMP_MASK, 0xe)
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#define RZG2L_ADM3_ADSMP_MASK GENMASK(15, 0)
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#define RZG2L_ADINT 0x20
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#define RZG2L_ADINT_INTEN_MASK GENMASK(7, 0)
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#define RZG2L_ADINT_CSEEN BIT(16)
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#define RZG2L_ADINT_INTS BIT(31)
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#define RZG2L_ADSTS 0x24
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#define RZG2L_ADSTS_CSEST BIT(16)
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#define RZG2L_ADSTS_INTST_MASK GENMASK(7, 0)
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#define RZG2L_ADIVC 0x28
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#define RZG2L_ADIVC_DIVADC_MASK GENMASK(8, 0)
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#define RZG2L_ADIVC_DIVADC_4 FIELD_PREP(RZG2L_ADIVC_DIVADC_MASK, 0x4)
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#define RZG2L_ADFIL 0x2c
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#define RZG2L_ADCR(n) (0x30 + ((n) * 0x4))
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#define RZG2L_ADCR_AD_MASK GENMASK(11, 0)
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#define RZG2L_ADSMP_DEFAULT_SAMPLING 0x578
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#define RZG2L_ADC_MAX_CHANNELS 8
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#define RZG2L_ADC_CHN_MASK 0x7
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#define RZG2L_ADC_TIMEOUT usecs_to_jiffies(1 * 4)
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struct rzg2l_adc_data {
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const struct iio_chan_spec *channels;
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u8 num_channels;
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};
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struct rzg2l_adc {
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void __iomem *base;
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struct clk *pclk;
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struct clk *adclk;
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struct reset_control *presetn;
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struct reset_control *adrstn;
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struct completion completion;
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const struct rzg2l_adc_data *data;
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struct mutex lock;
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u16 last_val[RZG2L_ADC_MAX_CHANNELS];
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};
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static const char * const rzg2l_adc_channel_name[] = {
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"adc0",
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"adc1",
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"adc2",
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"adc3",
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"adc4",
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"adc5",
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"adc6",
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"adc7",
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};
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static unsigned int rzg2l_adc_readl(struct rzg2l_adc *adc, u32 reg)
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{
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return readl(adc->base + reg);
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}
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static void rzg2l_adc_writel(struct rzg2l_adc *adc, unsigned int reg, u32 val)
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{
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writel(val, adc->base + reg);
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}
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static void rzg2l_adc_pwr(struct rzg2l_adc *adc, bool on)
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{
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u32 reg;
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reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));
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if (on)
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reg |= RZG2L_ADM0_PWDWNB;
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else
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reg &= ~RZG2L_ADM0_PWDWNB;
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rzg2l_adc_writel(adc, RZG2L_ADM(0), reg);
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udelay(2);
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}
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static void rzg2l_adc_start_stop(struct rzg2l_adc *adc, bool start)
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{
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int timeout = 5;
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u32 reg;
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reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));
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if (start)
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reg |= RZG2L_ADM0_ADCE;
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else
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reg &= ~RZG2L_ADM0_ADCE;
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rzg2l_adc_writel(adc, RZG2L_ADM(0), reg);
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if (start)
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return;
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do {
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usleep_range(100, 200);
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reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));
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timeout--;
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if (!timeout) {
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pr_err("%s stopping ADC timed out\n", __func__);
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break;
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}
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} while (((reg & RZG2L_ADM0_ADBSY) || (reg & RZG2L_ADM0_ADCE)));
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}
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static void rzg2l_set_trigger(struct rzg2l_adc *adc)
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{
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u32 reg;
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/*
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* Setup ADM1 for SW trigger
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* EGA[13:12] - Set 00 to indicate hardware trigger is invalid
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* BS[4] - Enable 1-buffer mode
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* MS[1] - Enable Select mode
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* TRG[0] - Enable software trigger mode
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*/
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reg = rzg2l_adc_readl(adc, RZG2L_ADM(1));
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reg &= ~RZG2L_ADM1_EGA_MASK;
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reg &= ~RZG2L_ADM1_BS;
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reg &= ~RZG2L_ADM1_TRG;
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reg |= RZG2L_ADM1_MS;
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rzg2l_adc_writel(adc, RZG2L_ADM(1), reg);
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}
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static int rzg2l_adc_conversion_setup(struct rzg2l_adc *adc, u8 ch)
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{
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u32 reg;
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if (rzg2l_adc_readl(adc, RZG2L_ADM(0)) & RZG2L_ADM0_ADBSY)
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return -EBUSY;
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rzg2l_set_trigger(adc);
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/* Select analog input channel subjected to conversion. */
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reg = rzg2l_adc_readl(adc, RZG2L_ADM(2));
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reg &= ~RZG2L_ADM2_CHSEL_MASK;
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reg |= BIT(ch);
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rzg2l_adc_writel(adc, RZG2L_ADM(2), reg);
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/*
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* Setup ADINT
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* INTS[31] - Select pulse signal
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* CSEEN[16] - Enable channel select error interrupt
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* INTEN[7:0] - Select channel interrupt
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*/
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reg = rzg2l_adc_readl(adc, RZG2L_ADINT);
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reg &= ~RZG2L_ADINT_INTS;
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reg &= ~RZG2L_ADINT_INTEN_MASK;
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reg |= (RZG2L_ADINT_CSEEN | BIT(ch));
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rzg2l_adc_writel(adc, RZG2L_ADINT, reg);
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return 0;
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}
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static int rzg2l_adc_set_power(struct iio_dev *indio_dev, bool on)
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{
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struct device *dev = indio_dev->dev.parent;
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if (on)
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return pm_runtime_resume_and_get(dev);
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return pm_runtime_put_sync(dev);
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}
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static int rzg2l_adc_conversion(struct iio_dev *indio_dev, struct rzg2l_adc *adc, u8 ch)
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{
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int ret;
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ret = rzg2l_adc_set_power(indio_dev, true);
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if (ret)
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return ret;
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ret = rzg2l_adc_conversion_setup(adc, ch);
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if (ret) {
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rzg2l_adc_set_power(indio_dev, false);
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return ret;
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}
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reinit_completion(&adc->completion);
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rzg2l_adc_start_stop(adc, true);
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if (!wait_for_completion_timeout(&adc->completion, RZG2L_ADC_TIMEOUT)) {
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rzg2l_adc_writel(adc, RZG2L_ADINT,
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rzg2l_adc_readl(adc, RZG2L_ADINT) & ~RZG2L_ADINT_INTEN_MASK);
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rzg2l_adc_start_stop(adc, false);
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rzg2l_adc_set_power(indio_dev, false);
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return -ETIMEDOUT;
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}
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return rzg2l_adc_set_power(indio_dev, false);
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}
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static int rzg2l_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct rzg2l_adc *adc = iio_priv(indio_dev);
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int ret;
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u8 ch;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (chan->type != IIO_VOLTAGE)
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return -EINVAL;
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mutex_lock(&adc->lock);
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ch = chan->channel & RZG2L_ADC_CHN_MASK;
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ret = rzg2l_adc_conversion(indio_dev, adc, ch);
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if (ret) {
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mutex_unlock(&adc->lock);
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return ret;
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}
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*val = adc->last_val[ch];
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mutex_unlock(&adc->lock);
|
|
|
|
return IIO_VAL_INT;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int rzg2l_adc_read_label(struct iio_dev *iio_dev,
|
|
const struct iio_chan_spec *chan,
|
|
char *label)
|
|
{
|
|
return sysfs_emit(label, "%s\n", rzg2l_adc_channel_name[chan->channel]);
|
|
}
|
|
|
|
static const struct iio_info rzg2l_adc_iio_info = {
|
|
.read_raw = rzg2l_adc_read_raw,
|
|
.read_label = rzg2l_adc_read_label,
|
|
};
|
|
|
|
static irqreturn_t rzg2l_adc_isr(int irq, void *dev_id)
|
|
{
|
|
struct rzg2l_adc *adc = dev_id;
|
|
unsigned long intst;
|
|
u32 reg;
|
|
int ch;
|
|
|
|
reg = rzg2l_adc_readl(adc, RZG2L_ADSTS);
|
|
|
|
/* A/D conversion channel select error interrupt */
|
|
if (reg & RZG2L_ADSTS_CSEST) {
|
|
rzg2l_adc_writel(adc, RZG2L_ADSTS, reg);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
intst = reg & RZG2L_ADSTS_INTST_MASK;
|
|
if (!intst)
|
|
return IRQ_NONE;
|
|
|
|
for_each_set_bit(ch, &intst, RZG2L_ADC_MAX_CHANNELS)
|
|
adc->last_val[ch] = rzg2l_adc_readl(adc, RZG2L_ADCR(ch)) & RZG2L_ADCR_AD_MASK;
|
|
|
|
/* clear the channel interrupt */
|
|
rzg2l_adc_writel(adc, RZG2L_ADSTS, reg);
|
|
|
|
complete(&adc->completion);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int rzg2l_adc_parse_properties(struct platform_device *pdev, struct rzg2l_adc *adc)
|
|
{
|
|
struct iio_chan_spec *chan_array;
|
|
struct fwnode_handle *fwnode;
|
|
struct rzg2l_adc_data *data;
|
|
unsigned int channel;
|
|
int num_channels;
|
|
int ret;
|
|
u8 i;
|
|
|
|
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
num_channels = device_get_child_node_count(&pdev->dev);
|
|
if (!num_channels) {
|
|
dev_err(&pdev->dev, "no channel children\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (num_channels > RZG2L_ADC_MAX_CHANNELS) {
|
|
dev_err(&pdev->dev, "num of channel children out of range\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
chan_array = devm_kcalloc(&pdev->dev, num_channels, sizeof(*chan_array),
|
|
GFP_KERNEL);
|
|
if (!chan_array)
|
|
return -ENOMEM;
|
|
|
|
i = 0;
|
|
device_for_each_child_node(&pdev->dev, fwnode) {
|
|
ret = fwnode_property_read_u32(fwnode, "reg", &channel);
|
|
if (ret) {
|
|
fwnode_handle_put(fwnode);
|
|
return ret;
|
|
}
|
|
|
|
if (channel >= RZG2L_ADC_MAX_CHANNELS) {
|
|
fwnode_handle_put(fwnode);
|
|
return -EINVAL;
|
|
}
|
|
|
|
chan_array[i].type = IIO_VOLTAGE;
|
|
chan_array[i].indexed = 1;
|
|
chan_array[i].channel = channel;
|
|
chan_array[i].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
|
|
chan_array[i].datasheet_name = rzg2l_adc_channel_name[channel];
|
|
i++;
|
|
}
|
|
|
|
data->num_channels = num_channels;
|
|
data->channels = chan_array;
|
|
adc->data = data;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rzg2l_adc_hw_init(struct rzg2l_adc *adc)
|
|
{
|
|
int timeout = 5;
|
|
u32 reg;
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(adc->pclk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* SW reset */
|
|
reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));
|
|
reg |= RZG2L_ADM0_SRESB;
|
|
rzg2l_adc_writel(adc, RZG2L_ADM(0), reg);
|
|
|
|
while (!(rzg2l_adc_readl(adc, RZG2L_ADM(0)) & RZG2L_ADM0_SRESB)) {
|
|
if (!timeout) {
|
|
ret = -EBUSY;
|
|
goto exit_hw_init;
|
|
}
|
|
timeout--;
|
|
usleep_range(100, 200);
|
|
}
|
|
|
|
/* Only division by 4 can be set */
|
|
reg = rzg2l_adc_readl(adc, RZG2L_ADIVC);
|
|
reg &= ~RZG2L_ADIVC_DIVADC_MASK;
|
|
reg |= RZG2L_ADIVC_DIVADC_4;
|
|
rzg2l_adc_writel(adc, RZG2L_ADIVC, reg);
|
|
|
|
/*
|
|
* Setup AMD3
|
|
* ADIL[31:24] - Should be always set to 0
|
|
* ADCMP[23:16] - Should be always set to 0xe
|
|
* ADSMP[15:0] - Set default (0x578) sampling period
|
|
*/
|
|
reg = rzg2l_adc_readl(adc, RZG2L_ADM(3));
|
|
reg &= ~RZG2L_ADM3_ADIL_MASK;
|
|
reg &= ~RZG2L_ADM3_ADCMP_MASK;
|
|
reg &= ~RZG2L_ADM3_ADSMP_MASK;
|
|
reg |= (RZG2L_ADM3_ADCMP_E | RZG2L_ADSMP_DEFAULT_SAMPLING);
|
|
rzg2l_adc_writel(adc, RZG2L_ADM(3), reg);
|
|
|
|
exit_hw_init:
|
|
clk_disable_unprepare(adc->pclk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void rzg2l_adc_pm_runtime_disable(void *data)
|
|
{
|
|
struct device *dev = data;
|
|
|
|
pm_runtime_disable(dev->parent);
|
|
}
|
|
|
|
static void rzg2l_adc_pm_runtime_set_suspended(void *data)
|
|
{
|
|
struct device *dev = data;
|
|
|
|
pm_runtime_set_suspended(dev->parent);
|
|
}
|
|
|
|
static void rzg2l_adc_reset_assert(void *data)
|
|
{
|
|
reset_control_assert(data);
|
|
}
|
|
|
|
static int rzg2l_adc_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct iio_dev *indio_dev;
|
|
struct rzg2l_adc *adc;
|
|
int ret;
|
|
int irq;
|
|
|
|
indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
adc = iio_priv(indio_dev);
|
|
|
|
ret = rzg2l_adc_parse_properties(pdev, adc);
|
|
if (ret)
|
|
return ret;
|
|
|
|
mutex_init(&adc->lock);
|
|
|
|
adc->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(adc->base))
|
|
return PTR_ERR(adc->base);
|
|
|
|
adc->pclk = devm_clk_get(dev, "pclk");
|
|
if (IS_ERR(adc->pclk)) {
|
|
dev_err(dev, "Failed to get pclk");
|
|
return PTR_ERR(adc->pclk);
|
|
}
|
|
|
|
adc->adclk = devm_clk_get(dev, "adclk");
|
|
if (IS_ERR(adc->adclk)) {
|
|
dev_err(dev, "Failed to get adclk");
|
|
return PTR_ERR(adc->adclk);
|
|
}
|
|
|
|
adc->adrstn = devm_reset_control_get_exclusive(dev, "adrst-n");
|
|
if (IS_ERR(adc->adrstn)) {
|
|
dev_err(dev, "failed to get adrstn\n");
|
|
return PTR_ERR(adc->adrstn);
|
|
}
|
|
|
|
adc->presetn = devm_reset_control_get_exclusive(dev, "presetn");
|
|
if (IS_ERR(adc->presetn)) {
|
|
dev_err(dev, "failed to get presetn\n");
|
|
return PTR_ERR(adc->presetn);
|
|
}
|
|
|
|
ret = reset_control_deassert(adc->adrstn);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to deassert adrstn pin, %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = devm_add_action_or_reset(&pdev->dev,
|
|
rzg2l_adc_reset_assert, adc->adrstn);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to register adrstn assert devm action, %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = reset_control_deassert(adc->presetn);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to deassert presetn pin, %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = devm_add_action_or_reset(&pdev->dev,
|
|
rzg2l_adc_reset_assert, adc->presetn);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to register presetn assert devm action, %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = rzg2l_adc_hw_init(adc);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to initialize ADC HW, %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
ret = devm_request_irq(dev, irq, rzg2l_adc_isr,
|
|
0, dev_name(dev), adc);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
init_completion(&adc->completion);
|
|
|
|
platform_set_drvdata(pdev, indio_dev);
|
|
|
|
indio_dev->name = DRIVER_NAME;
|
|
indio_dev->info = &rzg2l_adc_iio_info;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = adc->data->channels;
|
|
indio_dev->num_channels = adc->data->num_channels;
|
|
|
|
pm_runtime_set_suspended(dev);
|
|
ret = devm_add_action_or_reset(&pdev->dev,
|
|
rzg2l_adc_pm_runtime_set_suspended, &indio_dev->dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pm_runtime_enable(dev);
|
|
ret = devm_add_action_or_reset(&pdev->dev,
|
|
rzg2l_adc_pm_runtime_disable, &indio_dev->dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return devm_iio_device_register(dev, indio_dev);
|
|
}
|
|
|
|
static const struct of_device_id rzg2l_adc_match[] = {
|
|
{ .compatible = "renesas,rzg2l-adc",},
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, rzg2l_adc_match);
|
|
|
|
static int __maybe_unused rzg2l_adc_pm_runtime_suspend(struct device *dev)
|
|
{
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
struct rzg2l_adc *adc = iio_priv(indio_dev);
|
|
|
|
rzg2l_adc_pwr(adc, false);
|
|
clk_disable_unprepare(adc->adclk);
|
|
clk_disable_unprepare(adc->pclk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __maybe_unused rzg2l_adc_pm_runtime_resume(struct device *dev)
|
|
{
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
struct rzg2l_adc *adc = iio_priv(indio_dev);
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(adc->pclk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_prepare_enable(adc->adclk);
|
|
if (ret) {
|
|
clk_disable_unprepare(adc->pclk);
|
|
return ret;
|
|
}
|
|
|
|
rzg2l_adc_pwr(adc, true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops rzg2l_adc_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(rzg2l_adc_pm_runtime_suspend,
|
|
rzg2l_adc_pm_runtime_resume,
|
|
NULL)
|
|
};
|
|
|
|
static struct platform_driver rzg2l_adc_driver = {
|
|
.probe = rzg2l_adc_probe,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.of_match_table = rzg2l_adc_match,
|
|
.pm = &rzg2l_adc_pm_ops,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(rzg2l_adc_driver);
|
|
|
|
MODULE_AUTHOR("Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>");
|
|
MODULE_DESCRIPTION("Renesas RZ/G2L ADC driver");
|
|
MODULE_LICENSE("GPL v2");
|