mirror of
https://github.com/torvalds/linux.git
synced 2024-12-05 02:23:16 +00:00
0ea8ce61cb
Add some basic documentation for LoongArch. LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64). Tested-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: WANG Xuerui <git@xen0n.name> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
29 lines
442 B
ReStructuredText
29 lines
442 B
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
|
|
|
|
CPU Architectures
|
|
=================
|
|
|
|
These books provide programming details about architecture-specific
|
|
implementation.
|
|
|
|
.. toctree::
|
|
:maxdepth: 2
|
|
|
|
arc/index
|
|
arm/index
|
|
arm64/index
|
|
ia64/index
|
|
loongarch/index
|
|
m68k/index
|
|
mips/index
|
|
nios2/index
|
|
openrisc/index
|
|
parisc/index
|
|
powerpc/index
|
|
riscv/index
|
|
s390/index
|
|
sh/index
|
|
sparc/index
|
|
x86/index
|
|
xtensa/index
|