mirror of
https://github.com/torvalds/linux.git
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367 lines
9.2 KiB
ArmAsm
367 lines
9.2 KiB
ArmAsm
/*
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* arch/s390/kernel/head31.S
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*
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* Copyright (C) IBM Corp. 2005,2006
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*
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* Author(s): Hartmut Penner <hp@de.ibm.com>
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* Martin Schwidefsky <schwidefsky@de.ibm.com>
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* Rob van der Heij <rvdhei@iae.nl>
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* Heiko Carstens <heiko.carstens@de.ibm.com>
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*
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*/
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#
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# startup-code at 0x10000, running in absolute addressing mode
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# this is called either by the ipl loader or directly by PSW restart
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# or linload or SALIPL
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#
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.org 0x10000
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startup:basr %r13,0 # get base
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.LPG0: l %r13,0f-.LPG0(%r13)
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b 0(%r13)
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0: .long startup_continue
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#
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# params at 10400 (setup.h)
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#
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.org PARMAREA
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.long 0,0 # IPL_DEVICE
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.long 0,0 # INITRD_START
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.long 0,0 # INITRD_SIZE
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.org COMMAND_LINE
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.byte "root=/dev/ram0 ro"
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.byte 0
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.org 0x11000
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startup_continue:
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basr %r13,0 # get base
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.LPG1: mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0)
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lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
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l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
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# move IPL device to lowcore
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mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
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#
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# Setup stack
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#
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l %r15,.Linittu-.LPG1(%r13)
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mvc __LC_CURRENT(4),__TI_task(%r15)
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ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
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st %r15,__LC_KERNEL_STACK # set end of kernel stack
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ahi %r15,-96
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xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
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l %r14,.Lipl_save_parameters-.LPG1(%r13)
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basr %r14,%r14
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#
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# clear bss memory
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#
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l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
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l %r3,.Lbss_end-.LPG1(%r13) # end of bss
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sr %r3,%r2 # length of bss
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sr %r4,%r4
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sr %r5,%r5 # set src,length and pad to zero
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sr %r0,%r0
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mvcle %r2,%r4,0 # clear mem
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jo .-4 # branch back, if not finish
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l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
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.Lservicecall:
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stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
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stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
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la %r1,0x200 # set bit 22
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o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
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st %r1,.Lcr-.LPG1(%r13)
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lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
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mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
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la %r1, .Lsclph-.LPG1(%r13)
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a %r1,__LC_EXT_NEW_PSW+4 # set handler
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st %r1,__LC_EXT_NEW_PSW+4
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l %r4,.Lsccbaddr-.LPG1(%r13) # %r4 is our index for sccb stuff
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lr %r1,%r4 # our sccb
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.insn rre,0xb2200000,%r2,%r1 # service call
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ipm %r1
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srl %r1,28 # get cc code
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xr %r3, %r3
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chi %r1,3
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be .Lfchunk-.LPG1(%r13) # leave
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chi %r1,2
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be .Lservicecall-.LPG1(%r13)
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lpsw .Lwaitsclp-.LPG1(%r13)
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.Lsclph:
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lh %r1,.Lsccbr-.Lsccb(%r4)
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chi %r1,0x10 # 0x0010 is the sucess code
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je .Lprocsccb # let's process the sccb
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chi %r1,0x1f0
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bne .Lfchunk-.LPG1(%r13) # unhandled error code
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c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
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bne .Lfchunk-.LPG1(%r13) # if no, give up
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l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
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b .Lservicecall-.LPG1(%r13)
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.Lprocsccb:
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lhi %r1,0
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icm %r1,3,.Lscpincr1-.Lsccb(%r4) # use this one if != 0
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jnz .Lscnd
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lhi %r1,0x800 # otherwise report 2GB
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.Lscnd:
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lhi %r3,0x800 # limit reported memory size to 2GB
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cr %r1,%r3
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jl .Lno2gb
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lr %r1,%r3
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.Lno2gb:
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xr %r3,%r3 # same logic
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ic %r3,.Lscpa1-.Lsccb(%r4)
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chi %r3,0x00
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jne .Lcompmem
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l %r3,.Lscpa2-.Lsccb(%r4)
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.Lcompmem:
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mr %r2,%r1 # mem in MB on 128-bit
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l %r1,.Lonemb-.LPG1(%r13)
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mr %r2,%r1 # mem size in bytes in %r3
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b .Lfchunk-.LPG1(%r13)
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.align 4
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.Lipl_save_parameters:
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.long ipl_save_parameters
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.Linittu:
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.long init_thread_union
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.Lpmask:
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.byte 0
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.align 8
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.Lpcext:.long 0x00080000,0x80000000
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.Lcr:
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.long 0x00 # place holder for cr0
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.Lwaitsclp:
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.long 0x010a0000,0x80000000 + .Lsclph
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.Lrcp:
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.int 0x00120001 # Read SCP forced code
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.Lrcp2:
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.int 0x00020001 # Read SCP code
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.Lonemb:
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.int 0x100000
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.Lfchunk:
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#
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# find memory chunks.
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#
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lr %r9,%r3 # end of mem
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mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
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la %r1,1 # test in increments of 128KB
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sll %r1,17
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l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
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slr %r4,%r4 # set start of chunk to zero
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slr %r5,%r5 # set end of chunk to zero
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slr %r6,%r6 # set access code to zero
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la %r10, MEMORY_CHUNKS # number of chunks
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.Lloop:
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tprot 0(%r5),0 # test protection of first byte
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ipm %r7
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srl %r7,28
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clr %r6,%r7 # compare cc with last access code
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be .Lsame-.LPG1(%r13)
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b .Lchkmem-.LPG1(%r13)
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.Lsame:
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ar %r5,%r1 # add 128KB to end of chunk
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bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
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.Lchkmem: # > 2GB or tprot got a program check
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clr %r4,%r5 # chunk size > 0?
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be .Lchkloop-.LPG1(%r13)
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st %r4,0(%r3) # store start address of chunk
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lr %r0,%r5
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slr %r0,%r4
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st %r0,4(%r3) # store size of chunk
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st %r6,8(%r3) # store type of chunk
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la %r3,12(%r3)
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l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
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st %r5,0(%r4) # store last end to memory size
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ahi %r10,-1 # update chunk number
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.Lchkloop:
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lr %r6,%r7 # set access code to last cc
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# we got an exception or we're starting a new
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# chunk , we must check if we should
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# still try to find valid memory (if we detected
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# the amount of available storage), and if we
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# have chunks left
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xr %r0,%r0
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clr %r0,%r9 # did we detect memory?
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je .Ldonemem # if not, leave
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chi %r10,0 # do we have chunks left?
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je .Ldonemem
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alr %r5,%r1 # add 128KB to end of chunk
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lr %r4,%r5 # potential new chunk
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clr %r5,%r9 # should we go on?
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jl .Lloop
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.Ldonemem:
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l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
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#
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# find out if we are running under VM
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#
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stidp __LC_CPUID # store cpuid
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tm __LC_CPUID,0xff # running under VM ?
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bno .Lnovm-.LPG1(%r13)
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oi 3(%r12),1 # set VM flag
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.Lnovm:
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lh %r0,__LC_CPUID+4 # get cpu version
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chi %r0,0x7490 # running on a P/390 ?
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bne .Lnop390-.LPG1(%r13)
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oi 3(%r12),4 # set P/390 flag
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.Lnop390:
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#
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# find out if we have an IEEE fpu
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#
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mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
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efpc %r0,0 # test IEEE extract fpc instruction
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oi 3(%r12),2 # set IEEE fpu flag
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.Lchkfpu:
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#
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# find out if we have the CSP instruction
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#
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mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
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la %r0,0
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lr %r1,%r0
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la %r2,4
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csp %r0,%r2 # Test CSP instruction
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oi 3(%r12),8 # set CSP flag
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.Lchkcsp:
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#
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# find out if we have the MVPG instruction
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#
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mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
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sr %r0,%r0
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la %r1,0
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la %r2,0
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mvpg %r1,%r2 # Test CSP instruction
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oi 3(%r12),16 # set MVPG flag
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.Lchkmvpg:
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#
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# find out if we have the IDTE instruction
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#
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mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
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.long 0xb2b10000 # store facility list
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tm 0xc8,0x08 # check bit for clearing-by-ASCE
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bno .Lchkidte-.LPG1(%r13)
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lhi %r1,2094
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lhi %r2,0
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.long 0xb98e2001
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oi 3(%r12),0x80 # set IDTE flag
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.Lchkidte:
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#
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# find out if the diag 0x9c is available
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#
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mvc __LC_PGM_NEW_PSW(8),.Lpcdiag9c-.LPG1(%r13)
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stap __LC_CPUID+4 # store cpu address
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lh %r1,__LC_CPUID+4
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diag %r1,0,0x9c # test diag 0x9c
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oi 2(%r12),1 # set diag9c flag
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.Lchkdiag9c:
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lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
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# virtual and never return ...
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.align 8
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.Lentry:.long 0x00080000,0x80000000 + _stext
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.Lctl: .long 0x04b50002 # cr0: various things
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.long 0 # cr1: primary space segment table
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.long .Lduct # cr2: dispatchable unit control table
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.long 0 # cr3: instruction authorization
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.long 0 # cr4: instruction authorization
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.long 0xffffffff # cr5: primary-aste origin
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.long 0 # cr6: I/O interrupts
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.long 0 # cr7: secondary space segment table
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.long 0 # cr8: access registers translation
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.long 0 # cr9: tracing off
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.long 0 # cr10: tracing off
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.long 0 # cr11: tracing off
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.long 0 # cr12: tracing off
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.long 0 # cr13: home space segment table
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.long 0xc0000000 # cr14: machine check handling off
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.long 0 # cr15: linkage stack operations
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.Lduct: .long 0,0,0,0,0,0,0,0
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.long 0,0,0,0,0,0,0,0
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.Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
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.Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
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.Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
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.Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
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.Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
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.Lpcdiag9c:.long 0x00080000,0x80000000 + .Lchkdiag9c
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.Lmemsize:.long memory_size
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.Lmchunk:.long memory_chunk
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.Lmflags:.long machine_flags
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.Lbss_bgn: .long __bss_start
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.Lbss_end: .long _end
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.Lparmaddr: .long PARMAREA
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.Lsccbaddr: .long .Lsccb
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.globl ipl_schib
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ipl_schib:
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.rept 13
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.long 0
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.endr
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.globl ipl_flags
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ipl_flags:
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.long 0
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.globl ipl_devno
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ipl_devno:
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.word 0
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.org 0x12000
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.globl s390_readinfo_sccb
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s390_readinfo_sccb:
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.Lsccb:
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.hword 0x1000 # length, one page
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.byte 0x00,0x00,0x00
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.byte 0x80 # variable response bit set
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.Lsccbr:
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.hword 0x00 # response code
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.Lscpincr1:
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.hword 0x00
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.Lscpa1:
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.byte 0x00
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.fill 89,1,0
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.Lscpa2:
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.int 0x00
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.Lscpincr2:
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.quad 0x00
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.fill 3984,1,0
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.org 0x13000
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#ifdef CONFIG_SHARED_KERNEL
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.org 0x100000
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#endif
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#
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# startup-code, running in absolute addressing mode
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#
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.globl _stext
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_stext: basr %r13,0 # get base
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.LPG3:
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# check control registers
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stctl %c0,%c15,0(%r15)
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oi 2(%r15),0x40 # enable sigp emergency signal
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oi 0(%r15),0x10 # switch on low address protection
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lctl %c0,%c15,0(%r15)
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#
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lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
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l %r14,.Lstart-.LPG3(%r13)
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basr %r14,%r14 # call start_kernel
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#
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# We returned from start_kernel ?!? PANIK
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#
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basr %r13,0
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lpsw .Ldw-.(%r13) # load disabled wait psw
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#
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.align 8
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.Ldw: .long 0x000a0000,0x00000000
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.Lstart:.long start_kernel
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.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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