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f3c75e7a93
When GPIO library asks pin control to set the bias, it doesn't pass
any value of it and argument is considered boolean (and this is true
for ACPI GpioIo() / GpioInt() resources, by the way). Thus, individual
drivers must behave well, when they got the resistance value of 1 Ohm,
i.e. transforming it to sane default.
In case of Intel pin control hardware the 5 kOhm sounds plausible
because on one hand it's a minimum of resistors present in all
hardware generations and at the same time it's high enough to minimize
leakage current (will be only 200 uA with the above choice).
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
pinctrl-baytrail.c | ||
pinctrl-broxton.c | ||
pinctrl-cannonlake.c | ||
pinctrl-cedarfork.c | ||
pinctrl-cherryview.c | ||
pinctrl-denverton.c | ||
pinctrl-emmitsburg.c | ||
pinctrl-geminilake.c | ||
pinctrl-icelake.c | ||
pinctrl-intel.c | ||
pinctrl-intel.h | ||
pinctrl-jasperlake.c | ||
pinctrl-lewisburg.c | ||
pinctrl-lynxpoint.c | ||
pinctrl-merrifield.c | ||
pinctrl-sunrisepoint.c | ||
pinctrl-tigerlake.c |