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0cc8bddb5b
While investigating the clang `ge` uninitialized variable report, it was
discovered the default switch would have unintended consequences. Due to
the switch to __phy_modify, the driver would modify the ID values in the
default scenario.
Fix this by promoting the interface mode switch and aborting when the
mode is not a supported RGMII mode.
This prevents the `ge` and `fe` variables from ever being used
uninitialized.
Fixes: 48e8c6f161 ("net: phy: add driver for Motorcomm yt8511 phy")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
138 lines
3.4 KiB
C
138 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for Motorcomm PHYs
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*
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* Author: Peter Geis <pgwipeout@gmail.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#define PHY_ID_YT8511 0x0000010a
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#define YT8511_PAGE_SELECT 0x1e
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#define YT8511_PAGE 0x1f
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#define YT8511_EXT_CLK_GATE 0x0c
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#define YT8511_EXT_DELAY_DRIVE 0x0d
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#define YT8511_EXT_SLEEP_CTRL 0x27
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/* 2b00 25m from pll
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* 2b01 25m from xtl *default*
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* 2b10 62.m from pll
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* 2b11 125m from pll
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*/
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#define YT8511_CLK_125M (BIT(2) | BIT(1))
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#define YT8511_PLLON_SLP BIT(14)
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/* RX Delay enabled = 1.8ns 1000T, 8ns 10/100T */
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#define YT8511_DELAY_RX BIT(0)
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/* TX Gig-E Delay is bits 7:4, default 0x5
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* TX Fast-E Delay is bits 15:12, default 0xf
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* Delay = 150ps * N - 250ps
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* On = 2000ps, off = 50ps
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*/
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#define YT8511_DELAY_GE_TX_EN (0xf << 4)
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#define YT8511_DELAY_GE_TX_DIS (0x2 << 4)
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#define YT8511_DELAY_FE_TX_EN (0xf << 12)
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#define YT8511_DELAY_FE_TX_DIS (0x2 << 12)
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static int yt8511_read_page(struct phy_device *phydev)
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{
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return __phy_read(phydev, YT8511_PAGE_SELECT);
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};
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static int yt8511_write_page(struct phy_device *phydev, int page)
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{
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return __phy_write(phydev, YT8511_PAGE_SELECT, page);
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};
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static int yt8511_config_init(struct phy_device *phydev)
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{
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int oldpage, ret = 0;
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unsigned int ge, fe;
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oldpage = phy_select_page(phydev, YT8511_EXT_CLK_GATE);
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if (oldpage < 0)
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goto err_restore_page;
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/* set rgmii delay mode */
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switch (phydev->interface) {
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case PHY_INTERFACE_MODE_RGMII:
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ge = YT8511_DELAY_GE_TX_DIS;
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fe = YT8511_DELAY_FE_TX_DIS;
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break;
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case PHY_INTERFACE_MODE_RGMII_RXID:
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ge = YT8511_DELAY_RX | YT8511_DELAY_GE_TX_DIS;
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fe = YT8511_DELAY_FE_TX_DIS;
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break;
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case PHY_INTERFACE_MODE_RGMII_TXID:
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ge = YT8511_DELAY_GE_TX_EN;
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fe = YT8511_DELAY_FE_TX_EN;
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break;
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case PHY_INTERFACE_MODE_RGMII_ID:
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ge = YT8511_DELAY_RX | YT8511_DELAY_GE_TX_EN;
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fe = YT8511_DELAY_FE_TX_EN;
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break;
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default: /* do not support other modes */
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ret = -EOPNOTSUPP;
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goto err_restore_page;
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}
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ret = __phy_modify(phydev, YT8511_PAGE, (YT8511_DELAY_RX | YT8511_DELAY_GE_TX_EN), ge);
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if (ret < 0)
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goto err_restore_page;
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/* set clock mode to 125mhz */
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ret = __phy_modify(phydev, YT8511_PAGE, 0, YT8511_CLK_125M);
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if (ret < 0)
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goto err_restore_page;
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/* fast ethernet delay is in a separate page */
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ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_DELAY_DRIVE);
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if (ret < 0)
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goto err_restore_page;
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ret = __phy_modify(phydev, YT8511_PAGE, YT8511_DELAY_FE_TX_EN, fe);
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if (ret < 0)
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goto err_restore_page;
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/* leave pll enabled in sleep */
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ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_SLEEP_CTRL);
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if (ret < 0)
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goto err_restore_page;
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ret = __phy_modify(phydev, YT8511_PAGE, 0, YT8511_PLLON_SLP);
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if (ret < 0)
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goto err_restore_page;
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err_restore_page:
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return phy_restore_page(phydev, oldpage, ret);
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}
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static struct phy_driver motorcomm_phy_drvs[] = {
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{
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PHY_ID_MATCH_EXACT(PHY_ID_YT8511),
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.name = "YT8511 Gigabit Ethernet",
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.config_init = yt8511_config_init,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.read_page = yt8511_read_page,
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.write_page = yt8511_write_page,
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},
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};
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module_phy_driver(motorcomm_phy_drvs);
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MODULE_DESCRIPTION("Motorcomm PHY driver");
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MODULE_AUTHOR("Peter Geis");
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MODULE_LICENSE("GPL");
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static const struct mdio_device_id __maybe_unused motorcomm_tbl[] = {
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{ PHY_ID_MATCH_EXACT(PHY_ID_YT8511) },
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{ /* sentinal */ }
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};
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MODULE_DEVICE_TABLE(mdio, motorcomm_tbl);
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