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e53a59dc55
The video enum_dv_timings operation is deprecated and unused. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
326 lines
9.8 KiB
C
326 lines
9.8 KiB
C
/*
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* Samsung HDMI Physical interface driver
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*
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* Copyright (C) 2010-2011 Samsung Electronics Co.Ltd
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* Author: Tomasz Stanislawski <t.stanislaws@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/err.h>
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#include <media/v4l2-subdev.h>
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MODULE_AUTHOR("Tomasz Stanislawski <t.stanislaws@samsung.com>");
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MODULE_DESCRIPTION("Samsung HDMI Physical interface driver");
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MODULE_LICENSE("GPL");
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struct hdmiphy_conf {
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unsigned long pixclk;
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const u8 *data;
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};
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struct hdmiphy_ctx {
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struct v4l2_subdev sd;
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const struct hdmiphy_conf *conf_tab;
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};
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static const struct hdmiphy_conf hdmiphy_conf_s5pv210[] = {
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{ .pixclk = 27000000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,
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0x6B, 0x10, 0x02, 0x52, 0xDF, 0xF2, 0x54, 0x87,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 27027000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,
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0x6B, 0x10, 0x02, 0x52, 0xDF, 0xF2, 0x54, 0x87,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xE2, 0x26, 0x00, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 74176000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xEF, 0x5B,
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0x6D, 0x10, 0x01, 0x52, 0xEF, 0xF3, 0x54, 0xB9,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xA5, 0x26, 0x01, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 74250000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xF8, 0x40,
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0x6A, 0x10, 0x01, 0x52, 0xFF, 0xF1, 0x54, 0xBA,
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0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xA4, 0x26, 0x01, 0x00, 0x00, 0x00, }
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},
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{ /* end marker */ }
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};
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static const struct hdmiphy_conf hdmiphy_conf_exynos4210[] = {
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{ .pixclk = 27000000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,
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0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 27027000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,
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0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xE2, 0x26, 0x00, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 74176000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xEF, 0x5B,
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0x6D, 0x10, 0x01, 0x51, 0xEF, 0xF3, 0x54, 0xB9,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xA5, 0x26, 0x01, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 74250000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xF8, 0x40,
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0x6A, 0x10, 0x01, 0x51, 0xFF, 0xF1, 0x54, 0xBA,
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0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x22, 0x40, 0xA4, 0x26, 0x01, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 148352000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xEF, 0x5B,
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0x6D, 0x18, 0x00, 0x51, 0xEF, 0xF3, 0x54, 0xB9,
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0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x11, 0x40, 0xA5, 0x26, 0x02, 0x00, 0x00, 0x00, }
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},
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{ .pixclk = 148500000, .data = (u8 [32]) {
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0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xF8, 0x40,
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0x6A, 0x18, 0x00, 0x51, 0xFF, 0xF1, 0x54, 0xBA,
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0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,
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0x11, 0x40, 0xA4, 0x26, 0x02, 0x00, 0x00, 0x00, }
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},
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{ /* end marker */ }
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};
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static const struct hdmiphy_conf hdmiphy_conf_exynos4212[] = {
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{ .pixclk = 27000000, .data = (u8 [32]) {
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0x01, 0x11, 0x2D, 0x75, 0x00, 0x01, 0x00, 0x08,
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0x82, 0x00, 0x0E, 0xD9, 0x45, 0xA0, 0x34, 0xC0,
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0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x71,
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0x54, 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 27027000, .data = (u8 [32]) {
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0x01, 0x91, 0x2D, 0x72, 0x00, 0x64, 0x12, 0x08,
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0x43, 0x20, 0x0E, 0xD9, 0x45, 0xA0, 0x34, 0xC0,
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0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x71,
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0x54, 0xE2, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 74176000, .data = (u8 [32]) {
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0x01, 0x91, 0x3E, 0x35, 0x00, 0x5B, 0xDE, 0x08,
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0x82, 0x20, 0x73, 0xD9, 0x45, 0xA0, 0x34, 0xC0,
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0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x52,
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0x54, 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 74250000, .data = (u8 [32]) {
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0x01, 0x91, 0x3E, 0x35, 0x00, 0x40, 0xF0, 0x08,
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0x82, 0x20, 0x73, 0xD9, 0x45, 0xA0, 0x34, 0xC0,
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0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x52,
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0x54, 0xA4, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 148500000, .data = (u8 [32]) {
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0x01, 0x91, 0x3E, 0x15, 0x00, 0x40, 0xF0, 0x08,
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0x82, 0x20, 0x73, 0xD9, 0x45, 0xA0, 0x34, 0xC0,
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0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0xA4,
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0x54, 0x4A, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00, }
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},
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{ /* end marker */ }
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};
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static const struct hdmiphy_conf hdmiphy_conf_exynos4412[] = {
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{ .pixclk = 27000000, .data = (u8 [32]) {
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0x01, 0x11, 0x2D, 0x75, 0x40, 0x01, 0x00, 0x08,
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0x82, 0x00, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
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0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,
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0x54, 0xE4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 27027000, .data = (u8 [32]) {
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0x01, 0x91, 0x2D, 0x72, 0x40, 0x64, 0x12, 0x08,
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0x43, 0x20, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
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0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,
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0x54, 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 74176000, .data = (u8 [32]) {
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0x01, 0x91, 0x1F, 0x10, 0x40, 0x5B, 0xEF, 0x08,
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0x81, 0x20, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
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0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,
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0x54, 0xA6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 74250000, .data = (u8 [32]) {
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0x01, 0x91, 0x1F, 0x10, 0x40, 0x40, 0xF8, 0x08,
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0x81, 0x20, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
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0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,
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0x54, 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }
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},
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{ .pixclk = 148500000, .data = (u8 [32]) {
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0x01, 0x91, 0x1F, 0x00, 0x40, 0x40, 0xF8, 0x08,
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0x81, 0x20, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
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0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,
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0x54, 0x4B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00, }
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},
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{ /* end marker */ }
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};
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static inline struct hdmiphy_ctx *sd_to_ctx(struct v4l2_subdev *sd)
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{
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return container_of(sd, struct hdmiphy_ctx, sd);
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}
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static const u8 *hdmiphy_find_conf(unsigned long pixclk,
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const struct hdmiphy_conf *conf)
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{
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for (; conf->pixclk; ++conf)
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if (conf->pixclk == pixclk)
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return conf->data;
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return NULL;
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}
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static int hdmiphy_s_power(struct v4l2_subdev *sd, int on)
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{
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/* to be implemented */
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return 0;
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}
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static int hdmiphy_s_dv_timings(struct v4l2_subdev *sd,
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struct v4l2_dv_timings *timings)
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{
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const u8 *data;
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u8 buffer[32];
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int ret;
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struct hdmiphy_ctx *ctx = sd_to_ctx(sd);
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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struct device *dev = &client->dev;
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unsigned long pixclk = timings->bt.pixelclock;
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dev_info(dev, "s_dv_timings\n");
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if ((timings->bt.flags & V4L2_DV_FL_REDUCED_FPS) && pixclk == 74250000)
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pixclk = 74176000;
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data = hdmiphy_find_conf(pixclk, ctx->conf_tab);
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if (!data) {
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dev_err(dev, "format not supported\n");
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return -EINVAL;
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}
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/* storing configuration to the device */
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memcpy(buffer, data, 32);
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ret = i2c_master_send(client, buffer, 32);
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if (ret != 32) {
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dev_err(dev, "failed to configure HDMIPHY via I2C\n");
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return -EIO;
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}
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return 0;
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}
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static int hdmiphy_dv_timings_cap(struct v4l2_subdev *sd,
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struct v4l2_dv_timings_cap *cap)
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{
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if (cap->pad != 0)
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return -EINVAL;
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cap->type = V4L2_DV_BT_656_1120;
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/* The phy only determines the pixelclock, leave the other values
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* at 0 to signify that we have no information for them. */
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cap->bt.min_pixelclock = 27000000;
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cap->bt.max_pixelclock = 148500000;
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return 0;
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}
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static int hdmiphy_s_stream(struct v4l2_subdev *sd, int enable)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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struct device *dev = &client->dev;
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u8 buffer[2];
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int ret;
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dev_info(dev, "s_stream(%d)\n", enable);
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/* going to/from configuration from/to operation mode */
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buffer[0] = 0x1f;
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buffer[1] = enable ? 0x80 : 0x00;
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ret = i2c_master_send(client, buffer, 2);
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if (ret != 2) {
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dev_err(dev, "stream (%d) failed\n", enable);
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return -EIO;
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}
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return 0;
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}
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static const struct v4l2_subdev_core_ops hdmiphy_core_ops = {
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.s_power = hdmiphy_s_power,
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};
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static const struct v4l2_subdev_video_ops hdmiphy_video_ops = {
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.s_dv_timings = hdmiphy_s_dv_timings,
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.s_stream = hdmiphy_s_stream,
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};
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static const struct v4l2_subdev_pad_ops hdmiphy_pad_ops = {
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.dv_timings_cap = hdmiphy_dv_timings_cap,
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};
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static const struct v4l2_subdev_ops hdmiphy_ops = {
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.core = &hdmiphy_core_ops,
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.video = &hdmiphy_video_ops,
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.pad = &hdmiphy_pad_ops,
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};
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static int hdmiphy_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct hdmiphy_ctx *ctx;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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ctx->conf_tab = (struct hdmiphy_conf *)id->driver_data;
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v4l2_i2c_subdev_init(&ctx->sd, client, &hdmiphy_ops);
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dev_info(&client->dev, "probe successful\n");
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return 0;
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}
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static int hdmiphy_remove(struct i2c_client *client)
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{
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struct v4l2_subdev *sd = i2c_get_clientdata(client);
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struct hdmiphy_ctx *ctx = sd_to_ctx(sd);
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kfree(ctx);
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dev_info(&client->dev, "remove successful\n");
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return 0;
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}
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static const struct i2c_device_id hdmiphy_id[] = {
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{ "hdmiphy", (unsigned long)hdmiphy_conf_exynos4210 },
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{ "hdmiphy-s5pv210", (unsigned long)hdmiphy_conf_s5pv210 },
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{ "hdmiphy-exynos4210", (unsigned long)hdmiphy_conf_exynos4210 },
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{ "hdmiphy-exynos4212", (unsigned long)hdmiphy_conf_exynos4212 },
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{ "hdmiphy-exynos4412", (unsigned long)hdmiphy_conf_exynos4412 },
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{ },
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};
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MODULE_DEVICE_TABLE(i2c, hdmiphy_id);
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static struct i2c_driver hdmiphy_driver = {
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.driver = {
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.name = "s5p-hdmiphy",
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.owner = THIS_MODULE,
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},
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.probe = hdmiphy_probe,
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.remove = hdmiphy_remove,
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.id_table = hdmiphy_id,
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};
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module_i2c_driver(hdmiphy_driver);
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