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99306dfc06
Pull x86 timer updates from Thomas Gleixner:
"These updates are related to TSC handling:
- Support platforms which have synchronized TSCs but the boot CPU has
a non zero TSC_ADJUST value, which is considered a firmware bug on
normal systems.
This applies to HPE/SGI UV platforms where the platform firmware
uses TSC_ADJUST to ensure TSC synchronization across a huge number
of sockets, but due to power on timings the boot CPU cannot be
guaranteed to have a zero TSC_ADJUST register value.
- Fix the ordering of udelay calibration and kvmclock_init()
- Cleanup the udelay and calibration code"
* 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/tsc: Mark cyc2ns_init() and detect_art() __init
x86/platform/UV: Mark tsc_check_sync as an init function
x86/tsc: Make CONFIG_X86_TSC=n build work again
x86/platform/UV: Add check of TSC state set by UV BIOS
x86/tsc: Provide a means to disable TSC ART
x86/tsc: Drastically reduce the number of firmware bug warnings
x86/tsc: Skip TSC test and error messages if already unstable
x86/tsc: Add option that TSC on Socket 0 being non-zero is valid
x86/timers: Move simple_udelay_calibration() past kvmclock_init()
x86/timers: Make recalibrate_cpu_khz() void
x86/timers: Move the simple udelay calibration to tsc.h
39 lines
1.0 KiB
C
39 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_TIMER_H
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#define _ASM_X86_TIMER_H
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#include <linux/pm.h>
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#include <linux/percpu.h>
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#include <linux/interrupt.h>
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#include <linux/math64.h>
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#define TICK_SIZE (tick_nsec / 1000)
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unsigned long long native_sched_clock(void);
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extern void recalibrate_cpu_khz(void);
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extern int no_timer_check;
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extern bool using_native_sched_clock(void);
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/*
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* We use the full linear equation: f(x) = a + b*x, in order to allow
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* a continuous function in the face of dynamic freq changes.
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*
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* Continuity means that when our frequency changes our slope (b); we want to
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* ensure that: f(t) == f'(t), which gives: a + b*t == a' + b'*t.
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*
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* Without an offset (a) the above would not be possible.
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*
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* See the comment near cycles_2_ns() for details on how we compute (b).
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*/
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struct cyc2ns_data {
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u32 cyc2ns_mul;
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u32 cyc2ns_shift;
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u64 cyc2ns_offset;
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}; /* 16 bytes */
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extern void cyc2ns_read_begin(struct cyc2ns_data *);
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extern void cyc2ns_read_end(void);
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#endif /* _ASM_X86_TIMER_H */
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