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29f006fdef
Only x86 provides try_cmpxchg() outside of the atomic_t interfaces, provide generic fallbacks to create this interface from the widely available cmpxchg() function. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/159870621515.1229682.15506193091065001742.stgit@devnote2
255 lines
6.3 KiB
C
255 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_ATOMIC64_64_H
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#define _ASM_X86_ATOMIC64_64_H
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#include <linux/types.h>
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#include <asm/alternative.h>
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#include <asm/cmpxchg.h>
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/* The 64-bit atomic type */
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#define ATOMIC64_INIT(i) { (i) }
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/**
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* arch_atomic64_read - read atomic64 variable
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* @v: pointer of type atomic64_t
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*
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* Atomically reads the value of @v.
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* Doesn't imply a read memory barrier.
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*/
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static inline s64 arch_atomic64_read(const atomic64_t *v)
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{
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return __READ_ONCE((v)->counter);
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}
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/**
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* arch_atomic64_set - set atomic64 variable
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* @v: pointer to type atomic64_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*/
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static inline void arch_atomic64_set(atomic64_t *v, s64 i)
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{
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__WRITE_ONCE(v->counter, i);
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}
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/**
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* arch_atomic64_add - add integer to atomic64 variable
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* @i: integer value to add
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* @v: pointer to type atomic64_t
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*
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* Atomically adds @i to @v.
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*/
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static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "addq %1,%0"
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: "=m" (v->counter)
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: "er" (i), "m" (v->counter) : "memory");
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}
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/**
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* arch_atomic64_sub - subtract the atomic64 variable
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* @i: integer value to subtract
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* @v: pointer to type atomic64_t
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*
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* Atomically subtracts @i from @v.
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*/
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static inline void arch_atomic64_sub(s64 i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "subq %1,%0"
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: "=m" (v->counter)
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: "er" (i), "m" (v->counter) : "memory");
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}
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/**
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* arch_atomic64_sub_and_test - subtract value from variable and test result
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* @i: integer value to subtract
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* @v: pointer to type atomic64_t
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*
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* Atomically subtracts @i from @v and returns
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* true if the result is zero, or false for all
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* other cases.
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*/
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static inline bool arch_atomic64_sub_and_test(s64 i, atomic64_t *v)
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{
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return GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, e, "er", i);
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}
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#define arch_atomic64_sub_and_test arch_atomic64_sub_and_test
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/**
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* arch_atomic64_inc - increment atomic64 variable
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* @v: pointer to type atomic64_t
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*
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* Atomically increments @v by 1.
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*/
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static __always_inline void arch_atomic64_inc(atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "incq %0"
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: "=m" (v->counter)
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: "m" (v->counter) : "memory");
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}
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#define arch_atomic64_inc arch_atomic64_inc
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/**
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* arch_atomic64_dec - decrement atomic64 variable
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* @v: pointer to type atomic64_t
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*
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* Atomically decrements @v by 1.
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*/
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static __always_inline void arch_atomic64_dec(atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "decq %0"
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: "=m" (v->counter)
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: "m" (v->counter) : "memory");
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}
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#define arch_atomic64_dec arch_atomic64_dec
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/**
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* arch_atomic64_dec_and_test - decrement and test
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* @v: pointer to type atomic64_t
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*
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* Atomically decrements @v by 1 and
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* returns true if the result is 0, or false for all other
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* cases.
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*/
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static inline bool arch_atomic64_dec_and_test(atomic64_t *v)
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{
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return GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, e);
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}
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#define arch_atomic64_dec_and_test arch_atomic64_dec_and_test
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/**
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* arch_atomic64_inc_and_test - increment and test
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* @v: pointer to type atomic64_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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static inline bool arch_atomic64_inc_and_test(atomic64_t *v)
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{
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return GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, e);
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}
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#define arch_atomic64_inc_and_test arch_atomic64_inc_and_test
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/**
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* arch_atomic64_add_negative - add and test if negative
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* @i: integer value to add
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* @v: pointer to type atomic64_t
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*
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* Atomically adds @i to @v and returns true
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* if the result is negative, or false when
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* result is greater than or equal to zero.
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*/
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static inline bool arch_atomic64_add_negative(s64 i, atomic64_t *v)
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{
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return GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, s, "er", i);
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}
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#define arch_atomic64_add_negative arch_atomic64_add_negative
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/**
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* arch_atomic64_add_return - add and return
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* @i: integer value to add
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* @v: pointer to type atomic64_t
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)
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{
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return i + xadd(&v->counter, i);
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}
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#define arch_atomic64_add_return arch_atomic64_add_return
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static inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v)
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{
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return arch_atomic64_add_return(-i, v);
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}
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#define arch_atomic64_sub_return arch_atomic64_sub_return
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static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)
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{
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return xadd(&v->counter, i);
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}
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#define arch_atomic64_fetch_add arch_atomic64_fetch_add
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static inline s64 arch_atomic64_fetch_sub(s64 i, atomic64_t *v)
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{
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return xadd(&v->counter, -i);
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}
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#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub
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static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
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{
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return arch_cmpxchg(&v->counter, old, new);
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}
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#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg
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static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new)
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{
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return arch_try_cmpxchg(&v->counter, old, new);
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}
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#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg
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static inline s64 arch_atomic64_xchg(atomic64_t *v, s64 new)
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{
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return arch_xchg(&v->counter, new);
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}
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#define arch_atomic64_xchg arch_atomic64_xchg
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static inline void arch_atomic64_and(s64 i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "andq %1,%0"
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: "+m" (v->counter)
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: "er" (i)
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: "memory");
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}
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static inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read(v);
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do {
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} while (!arch_atomic64_try_cmpxchg(v, &val, val & i));
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return val;
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}
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#define arch_atomic64_fetch_and arch_atomic64_fetch_and
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static inline void arch_atomic64_or(s64 i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "orq %1,%0"
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: "+m" (v->counter)
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: "er" (i)
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: "memory");
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}
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static inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read(v);
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do {
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} while (!arch_atomic64_try_cmpxchg(v, &val, val | i));
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return val;
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}
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#define arch_atomic64_fetch_or arch_atomic64_fetch_or
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static inline void arch_atomic64_xor(s64 i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "xorq %1,%0"
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: "+m" (v->counter)
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: "er" (i)
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: "memory");
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}
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static inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read(v);
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do {
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} while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i));
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return val;
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}
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#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
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#endif /* _ASM_X86_ATOMIC64_64_H */
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