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To support APX functionality, the EVEX prefix is used to: - promote legacy instructions - promote VEX instructions - add new instructions Promoted VEX instructions require no extra annotation because the opcodes do not change and the permissive nature of the instruction decoder already allows them to have an EVEX prefix. Promoted legacy instructions and new instructions are placed in map 4 which has not been used before. Create a new table for map 4 and add APX instructions. Annotate SCALABLE instructions with "(es)" - refer to patch "x86/insn: Add support for APX EVEX to the instruction decoder logic". SCALABLE instructions must be represented in both no-prefix (NP) and 66 prefix forms. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240502105853.5338-9-adrian.hunter@intel.com
1323 lines
44 KiB
Plaintext
1323 lines
44 KiB
Plaintext
# x86 Opcode Maps
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#
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# This is (mostly) based on following documentations.
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# - Intel(R) 64 and IA-32 Architectures Software Developer's Manual Vol.2C
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# (#326018-047US, June 2013)
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#
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#<Opcode maps>
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# Table: table-name
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# Referrer: escaped-name
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# AVXcode: avx-code
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# opcode: mnemonic|GrpXXX [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...]
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# (or)
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# opcode: escape # escaped-name
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# EndTable
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#
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# mnemonics that begin with lowercase 'v' accept a VEX or EVEX prefix
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# mnemonics that begin with lowercase 'k' accept a VEX prefix
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#
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#<group maps>
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# GrpTable: GrpXXX
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# reg: mnemonic [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...]
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# EndTable
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#
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# AVX Superscripts
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# (ev): this opcode requires EVEX prefix.
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# (es): this opcode requires EVEX prefix and is SCALABALE.
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# (evo): this opcode is changed by EVEX prefix (EVEX opcode)
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# (v): this opcode requires VEX prefix.
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# (v1): this opcode only supports 128bit VEX.
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#
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# Last Prefix Superscripts
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# - (66): the last prefix is 0x66
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# - (F3): the last prefix is 0xF3
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# - (F2): the last prefix is 0xF2
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# - (!F3) : the last prefix is not 0xF3 (including non-last prefix case)
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# - (66&F2): Both 0x66 and 0xF2 prefixes are specified.
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#
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# REX2 Prefix
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# - (!REX2): REX2 is not allowed
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# - (REX2): REX2 variant e.g. JMPABS
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Table: one byte opcode
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Referrer:
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AVXcode:
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# 0x00 - 0x0f
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00: ADD Eb,Gb
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01: ADD Ev,Gv
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02: ADD Gb,Eb
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03: ADD Gv,Ev
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04: ADD AL,Ib
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05: ADD rAX,Iz
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06: PUSH ES (i64)
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07: POP ES (i64)
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08: OR Eb,Gb
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09: OR Ev,Gv
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0a: OR Gb,Eb
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0b: OR Gv,Ev
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0c: OR AL,Ib
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0d: OR rAX,Iz
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0e: PUSH CS (i64)
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0f: escape # 2-byte escape
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# 0x10 - 0x1f
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10: ADC Eb,Gb
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11: ADC Ev,Gv
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12: ADC Gb,Eb
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13: ADC Gv,Ev
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14: ADC AL,Ib
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15: ADC rAX,Iz
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16: PUSH SS (i64)
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17: POP SS (i64)
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18: SBB Eb,Gb
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19: SBB Ev,Gv
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1a: SBB Gb,Eb
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1b: SBB Gv,Ev
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1c: SBB AL,Ib
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1d: SBB rAX,Iz
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1e: PUSH DS (i64)
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1f: POP DS (i64)
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# 0x20 - 0x2f
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20: AND Eb,Gb
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21: AND Ev,Gv
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22: AND Gb,Eb
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23: AND Gv,Ev
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24: AND AL,Ib
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25: AND rAx,Iz
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26: SEG=ES (Prefix)
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27: DAA (i64)
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28: SUB Eb,Gb
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29: SUB Ev,Gv
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2a: SUB Gb,Eb
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2b: SUB Gv,Ev
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2c: SUB AL,Ib
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2d: SUB rAX,Iz
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2e: SEG=CS (Prefix)
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2f: DAS (i64)
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# 0x30 - 0x3f
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30: XOR Eb,Gb
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31: XOR Ev,Gv
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32: XOR Gb,Eb
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33: XOR Gv,Ev
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34: XOR AL,Ib
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35: XOR rAX,Iz
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36: SEG=SS (Prefix)
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37: AAA (i64)
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38: CMP Eb,Gb
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39: CMP Ev,Gv
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3a: CMP Gb,Eb
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3b: CMP Gv,Ev
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3c: CMP AL,Ib
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3d: CMP rAX,Iz
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3e: SEG=DS (Prefix)
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3f: AAS (i64)
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# 0x40 - 0x4f
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40: INC eAX (i64) | REX (o64)
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41: INC eCX (i64) | REX.B (o64)
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42: INC eDX (i64) | REX.X (o64)
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43: INC eBX (i64) | REX.XB (o64)
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44: INC eSP (i64) | REX.R (o64)
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45: INC eBP (i64) | REX.RB (o64)
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46: INC eSI (i64) | REX.RX (o64)
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47: INC eDI (i64) | REX.RXB (o64)
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48: DEC eAX (i64) | REX.W (o64)
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49: DEC eCX (i64) | REX.WB (o64)
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4a: DEC eDX (i64) | REX.WX (o64)
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4b: DEC eBX (i64) | REX.WXB (o64)
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4c: DEC eSP (i64) | REX.WR (o64)
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4d: DEC eBP (i64) | REX.WRB (o64)
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4e: DEC eSI (i64) | REX.WRX (o64)
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4f: DEC eDI (i64) | REX.WRXB (o64)
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# 0x50 - 0x5f
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50: PUSH rAX/r8 (d64)
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51: PUSH rCX/r9 (d64)
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52: PUSH rDX/r10 (d64)
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53: PUSH rBX/r11 (d64)
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54: PUSH rSP/r12 (d64)
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55: PUSH rBP/r13 (d64)
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56: PUSH rSI/r14 (d64)
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57: PUSH rDI/r15 (d64)
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58: POP rAX/r8 (d64)
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59: POP rCX/r9 (d64)
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5a: POP rDX/r10 (d64)
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5b: POP rBX/r11 (d64)
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5c: POP rSP/r12 (d64)
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5d: POP rBP/r13 (d64)
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5e: POP rSI/r14 (d64)
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5f: POP rDI/r15 (d64)
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# 0x60 - 0x6f
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60: PUSHA/PUSHAD (i64)
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61: POPA/POPAD (i64)
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62: BOUND Gv,Ma (i64) | EVEX (Prefix)
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63: ARPL Ew,Gw (i64) | MOVSXD Gv,Ev (o64)
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64: SEG=FS (Prefix)
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65: SEG=GS (Prefix)
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66: Operand-Size (Prefix)
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67: Address-Size (Prefix)
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68: PUSH Iz
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69: IMUL Gv,Ev,Iz
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6a: PUSH Ib (d64)
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6b: IMUL Gv,Ev,Ib
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6c: INS/INSB Yb,DX
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6d: INS/INSW/INSD Yz,DX
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6e: OUTS/OUTSB DX,Xb
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6f: OUTS/OUTSW/OUTSD DX,Xz
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# 0x70 - 0x7f
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70: JO Jb (!REX2)
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71: JNO Jb (!REX2)
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72: JB/JNAE/JC Jb (!REX2)
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73: JNB/JAE/JNC Jb (!REX2)
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74: JZ/JE Jb (!REX2)
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75: JNZ/JNE Jb (!REX2)
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76: JBE/JNA Jb (!REX2)
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77: JNBE/JA Jb (!REX2)
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78: JS Jb (!REX2)
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79: JNS Jb (!REX2)
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7a: JP/JPE Jb (!REX2)
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7b: JNP/JPO Jb (!REX2)
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7c: JL/JNGE Jb (!REX2)
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7d: JNL/JGE Jb (!REX2)
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7e: JLE/JNG Jb (!REX2)
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7f: JNLE/JG Jb (!REX2)
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# 0x80 - 0x8f
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80: Grp1 Eb,Ib (1A)
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81: Grp1 Ev,Iz (1A)
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82: Grp1 Eb,Ib (1A),(i64)
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83: Grp1 Ev,Ib (1A)
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84: TEST Eb,Gb
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85: TEST Ev,Gv
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86: XCHG Eb,Gb
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87: XCHG Ev,Gv
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88: MOV Eb,Gb
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89: MOV Ev,Gv
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8a: MOV Gb,Eb
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8b: MOV Gv,Ev
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8c: MOV Ev,Sw
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8d: LEA Gv,M
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8e: MOV Sw,Ew
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8f: Grp1A (1A) | POP Ev (d64)
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# 0x90 - 0x9f
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90: NOP | PAUSE (F3) | XCHG r8,rAX
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91: XCHG rCX/r9,rAX
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92: XCHG rDX/r10,rAX
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93: XCHG rBX/r11,rAX
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94: XCHG rSP/r12,rAX
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95: XCHG rBP/r13,rAX
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96: XCHG rSI/r14,rAX
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97: XCHG rDI/r15,rAX
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98: CBW/CWDE/CDQE
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99: CWD/CDQ/CQO
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9a: CALLF Ap (i64)
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9b: FWAIT/WAIT
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9c: PUSHF/D/Q Fv (d64)
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9d: POPF/D/Q Fv (d64)
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9e: SAHF
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9f: LAHF
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# 0xa0 - 0xaf
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a0: MOV AL,Ob (!REX2)
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a1: MOV rAX,Ov (!REX2) | JMPABS O (REX2),(o64)
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a2: MOV Ob,AL (!REX2)
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a3: MOV Ov,rAX (!REX2)
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a4: MOVS/B Yb,Xb (!REX2)
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a5: MOVS/W/D/Q Yv,Xv (!REX2)
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a6: CMPS/B Xb,Yb (!REX2)
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a7: CMPS/W/D Xv,Yv (!REX2)
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a8: TEST AL,Ib (!REX2)
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a9: TEST rAX,Iz (!REX2)
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aa: STOS/B Yb,AL (!REX2)
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ab: STOS/W/D/Q Yv,rAX (!REX2)
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ac: LODS/B AL,Xb (!REX2)
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ad: LODS/W/D/Q rAX,Xv (!REX2)
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ae: SCAS/B AL,Yb (!REX2)
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# Note: The May 2011 Intel manual shows Xv for the second parameter of the
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# next instruction but Yv is correct
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af: SCAS/W/D/Q rAX,Yv (!REX2)
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# 0xb0 - 0xbf
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b0: MOV AL/R8L,Ib
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b1: MOV CL/R9L,Ib
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b2: MOV DL/R10L,Ib
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b3: MOV BL/R11L,Ib
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b4: MOV AH/R12L,Ib
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b5: MOV CH/R13L,Ib
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b6: MOV DH/R14L,Ib
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b7: MOV BH/R15L,Ib
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b8: MOV rAX/r8,Iv
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b9: MOV rCX/r9,Iv
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ba: MOV rDX/r10,Iv
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bb: MOV rBX/r11,Iv
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bc: MOV rSP/r12,Iv
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bd: MOV rBP/r13,Iv
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be: MOV rSI/r14,Iv
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bf: MOV rDI/r15,Iv
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# 0xc0 - 0xcf
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c0: Grp2 Eb,Ib (1A)
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c1: Grp2 Ev,Ib (1A)
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c2: RETN Iw (f64)
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c3: RETN
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c4: LES Gz,Mp (i64) | VEX+2byte (Prefix)
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c5: LDS Gz,Mp (i64) | VEX+1byte (Prefix)
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c6: Grp11A Eb,Ib (1A)
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c7: Grp11B Ev,Iz (1A)
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c8: ENTER Iw,Ib
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c9: LEAVE (d64)
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ca: RETF Iw
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cb: RETF
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cc: INT3
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cd: INT Ib
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ce: INTO (i64)
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cf: IRET/D/Q
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# 0xd0 - 0xdf
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d0: Grp2 Eb,1 (1A)
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d1: Grp2 Ev,1 (1A)
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d2: Grp2 Eb,CL (1A)
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d3: Grp2 Ev,CL (1A)
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d4: AAM Ib (i64)
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d5: AAD Ib (i64) | REX2 (Prefix),(o64)
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d6:
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d7: XLAT/XLATB
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d8: ESC
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d9: ESC
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da: ESC
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db: ESC
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dc: ESC
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dd: ESC
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de: ESC
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df: ESC
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# 0xe0 - 0xef
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# Note: "forced64" is Intel CPU behavior: they ignore 0x66 prefix
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# in 64-bit mode. AMD CPUs accept 0x66 prefix, it causes RIP truncation
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# to 16 bits. In 32-bit mode, 0x66 is accepted by both Intel and AMD.
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e0: LOOPNE/LOOPNZ Jb (f64) (!REX2)
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e1: LOOPE/LOOPZ Jb (f64) (!REX2)
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e2: LOOP Jb (f64) (!REX2)
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e3: JrCXZ Jb (f64) (!REX2)
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e4: IN AL,Ib (!REX2)
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e5: IN eAX,Ib (!REX2)
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e6: OUT Ib,AL (!REX2)
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e7: OUT Ib,eAX (!REX2)
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# With 0x66 prefix in 64-bit mode, for AMD CPUs immediate offset
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# in "near" jumps and calls is 16-bit. For CALL,
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# push of return address is 16-bit wide, RSP is decremented by 2
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# but is not truncated to 16 bits, unlike RIP.
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e8: CALL Jz (f64) (!REX2)
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e9: JMP-near Jz (f64) (!REX2)
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ea: JMP-far Ap (i64) (!REX2)
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eb: JMP-short Jb (f64) (!REX2)
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ec: IN AL,DX (!REX2)
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ed: IN eAX,DX (!REX2)
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ee: OUT DX,AL (!REX2)
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ef: OUT DX,eAX (!REX2)
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# 0xf0 - 0xff
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f0: LOCK (Prefix)
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f1:
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f2: REPNE (Prefix) | XACQUIRE (Prefix)
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f3: REP/REPE (Prefix) | XRELEASE (Prefix)
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f4: HLT
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f5: CMC
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f6: Grp3_1 Eb (1A)
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f7: Grp3_2 Ev (1A)
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f8: CLC
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f9: STC
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fa: CLI
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fb: STI
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fc: CLD
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fd: STD
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fe: Grp4 (1A)
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ff: Grp5 (1A)
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EndTable
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Table: 2-byte opcode (0x0f)
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Referrer: 2-byte escape
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AVXcode: 1
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# 0x0f 0x00-0x0f
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00: Grp6 (1A)
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01: Grp7 (1A)
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02: LAR Gv,Ew
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03: LSL Gv,Ew
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04:
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05: SYSCALL (o64)
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06: CLTS
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07: SYSRET (o64)
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08: INVD
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09: WBINVD | WBNOINVD (F3)
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0a:
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0b: UD2 (1B)
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0c:
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# AMD's prefetch group. Intel supports prefetchw(/1) only.
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0d: GrpP
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0e: FEMMS
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# 3DNow! uses the last imm byte as opcode extension.
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0f: 3DNow! Pq,Qq,Ib
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# 0x0f 0x10-0x1f
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# NOTE: According to Intel SDM opcode map, vmovups and vmovupd has no operands
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# but it actually has operands. And also, vmovss and vmovsd only accept 128bit.
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# MOVSS/MOVSD has too many forms(3) on SDM. This map just shows a typical form.
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# Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
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# Reference A.1
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10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
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11: vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
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12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (F3) | vmovddup Vx,Wx (F2)
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13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
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14: vunpcklps Vx,Hx,Wx | vunpcklpd Vx,Hx,Wx (66)
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15: vunpckhps Vx,Hx,Wx | vunpckhpd Vx,Hx,Wx (66)
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16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,Wx (F3)
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17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
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18: Grp16 (1A)
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19:
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# Intel SDM opcode map does not list MPX instructions. For now using Gv for
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# bnd registers and Ev for everything else is OK because the instruction
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# decoder does not use the information except as an indication that there is
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# a ModR/M byte.
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1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev
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1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
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1c: Grp20 (1A),(1C)
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1d:
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1e: Grp21 (1A)
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1f: NOP Ev
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# 0x0f 0x20-0x2f
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20: MOV Rd,Cd
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21: MOV Rd,Dd
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22: MOV Cd,Rd
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23: MOV Dd,Rd
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24:
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25:
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26:
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27:
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28: vmovaps Vps,Wps | vmovapd Vpd,Wpd (66)
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29: vmovaps Wps,Vps | vmovapd Wpd,Vpd (66)
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2a: cvtpi2ps Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
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2b: vmovntps Mps,Vps | vmovntpd Mpd,Vpd (66)
|
|
2c: cvttps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
|
|
2d: cvtps2pi Ppi,Wps | cvtpd2pi Qpi,Wpd (66) | vcvtss2si Gy,Wss (F3),(v1) | vcvtsd2si Gy,Wsd (F2),(v1)
|
|
2e: vucomiss Vss,Wss (v1) | vucomisd Vsd,Wsd (66),(v1)
|
|
2f: vcomiss Vss,Wss (v1) | vcomisd Vsd,Wsd (66),(v1)
|
|
# 0x0f 0x30-0x3f
|
|
30: WRMSR (!REX2)
|
|
31: RDTSC (!REX2)
|
|
32: RDMSR (!REX2)
|
|
33: RDPMC (!REX2)
|
|
34: SYSENTER (!REX2)
|
|
35: SYSEXIT (!REX2)
|
|
36:
|
|
37: GETSEC (!REX2)
|
|
38: escape # 3-byte escape 1
|
|
39:
|
|
3a: escape # 3-byte escape 2
|
|
3b:
|
|
3c:
|
|
3d:
|
|
3e:
|
|
3f:
|
|
# 0x0f 0x40-0x4f
|
|
40: CMOVO Gv,Ev
|
|
41: CMOVNO Gv,Ev | kandw/q Vk,Hk,Uk | kandb/d Vk,Hk,Uk (66)
|
|
42: CMOVB/C/NAE Gv,Ev | kandnw/q Vk,Hk,Uk | kandnb/d Vk,Hk,Uk (66)
|
|
43: CMOVAE/NB/NC Gv,Ev
|
|
44: CMOVE/Z Gv,Ev | knotw/q Vk,Uk | knotb/d Vk,Uk (66)
|
|
45: CMOVNE/NZ Gv,Ev | korw/q Vk,Hk,Uk | korb/d Vk,Hk,Uk (66)
|
|
46: CMOVBE/NA Gv,Ev | kxnorw/q Vk,Hk,Uk | kxnorb/d Vk,Hk,Uk (66)
|
|
47: CMOVA/NBE Gv,Ev | kxorw/q Vk,Hk,Uk | kxorb/d Vk,Hk,Uk (66)
|
|
48: CMOVS Gv,Ev
|
|
49: CMOVNS Gv,Ev
|
|
4a: CMOVP/PE Gv,Ev | kaddw/q Vk,Hk,Uk | kaddb/d Vk,Hk,Uk (66)
|
|
4b: CMOVNP/PO Gv,Ev | kunpckbw Vk,Hk,Uk (66) | kunpckwd/dq Vk,Hk,Uk
|
|
4c: CMOVL/NGE Gv,Ev
|
|
4d: CMOVNL/GE Gv,Ev
|
|
4e: CMOVLE/NG Gv,Ev
|
|
4f: CMOVNLE/G Gv,Ev
|
|
# 0x0f 0x50-0x5f
|
|
50: vmovmskps Gy,Ups | vmovmskpd Gy,Upd (66)
|
|
51: vsqrtps Vps,Wps | vsqrtpd Vpd,Wpd (66) | vsqrtss Vss,Hss,Wss (F3),(v1) | vsqrtsd Vsd,Hsd,Wsd (F2),(v1)
|
|
52: vrsqrtps Vps,Wps | vrsqrtss Vss,Hss,Wss (F3),(v1)
|
|
53: vrcpps Vps,Wps | vrcpss Vss,Hss,Wss (F3),(v1)
|
|
54: vandps Vps,Hps,Wps | vandpd Vpd,Hpd,Wpd (66)
|
|
55: vandnps Vps,Hps,Wps | vandnpd Vpd,Hpd,Wpd (66)
|
|
56: vorps Vps,Hps,Wps | vorpd Vpd,Hpd,Wpd (66)
|
|
57: vxorps Vps,Hps,Wps | vxorpd Vpd,Hpd,Wpd (66)
|
|
58: vaddps Vps,Hps,Wps | vaddpd Vpd,Hpd,Wpd (66) | vaddss Vss,Hss,Wss (F3),(v1) | vaddsd Vsd,Hsd,Wsd (F2),(v1)
|
|
59: vmulps Vps,Hps,Wps | vmulpd Vpd,Hpd,Wpd (66) | vmulss Vss,Hss,Wss (F3),(v1) | vmulsd Vsd,Hsd,Wsd (F2),(v1)
|
|
5a: vcvtps2pd Vpd,Wps | vcvtpd2ps Vps,Wpd (66) | vcvtss2sd Vsd,Hx,Wss (F3),(v1) | vcvtsd2ss Vss,Hx,Wsd (F2),(v1)
|
|
5b: vcvtdq2ps Vps,Wdq | vcvtqq2ps Vps,Wqq (evo) | vcvtps2dq Vdq,Wps (66) | vcvttps2dq Vdq,Wps (F3)
|
|
5c: vsubps Vps,Hps,Wps | vsubpd Vpd,Hpd,Wpd (66) | vsubss Vss,Hss,Wss (F3),(v1) | vsubsd Vsd,Hsd,Wsd (F2),(v1)
|
|
5d: vminps Vps,Hps,Wps | vminpd Vpd,Hpd,Wpd (66) | vminss Vss,Hss,Wss (F3),(v1) | vminsd Vsd,Hsd,Wsd (F2),(v1)
|
|
5e: vdivps Vps,Hps,Wps | vdivpd Vpd,Hpd,Wpd (66) | vdivss Vss,Hss,Wss (F3),(v1) | vdivsd Vsd,Hsd,Wsd (F2),(v1)
|
|
5f: vmaxps Vps,Hps,Wps | vmaxpd Vpd,Hpd,Wpd (66) | vmaxss Vss,Hss,Wss (F3),(v1) | vmaxsd Vsd,Hsd,Wsd (F2),(v1)
|
|
# 0x0f 0x60-0x6f
|
|
60: punpcklbw Pq,Qd | vpunpcklbw Vx,Hx,Wx (66),(v1)
|
|
61: punpcklwd Pq,Qd | vpunpcklwd Vx,Hx,Wx (66),(v1)
|
|
62: punpckldq Pq,Qd | vpunpckldq Vx,Hx,Wx (66),(v1)
|
|
63: packsswb Pq,Qq | vpacksswb Vx,Hx,Wx (66),(v1)
|
|
64: pcmpgtb Pq,Qq | vpcmpgtb Vx,Hx,Wx (66),(v1)
|
|
65: pcmpgtw Pq,Qq | vpcmpgtw Vx,Hx,Wx (66),(v1)
|
|
66: pcmpgtd Pq,Qq | vpcmpgtd Vx,Hx,Wx (66),(v1)
|
|
67: packuswb Pq,Qq | vpackuswb Vx,Hx,Wx (66),(v1)
|
|
68: punpckhbw Pq,Qd | vpunpckhbw Vx,Hx,Wx (66),(v1)
|
|
69: punpckhwd Pq,Qd | vpunpckhwd Vx,Hx,Wx (66),(v1)
|
|
6a: punpckhdq Pq,Qd | vpunpckhdq Vx,Hx,Wx (66),(v1)
|
|
6b: packssdw Pq,Qd | vpackssdw Vx,Hx,Wx (66),(v1)
|
|
6c: vpunpcklqdq Vx,Hx,Wx (66),(v1)
|
|
6d: vpunpckhqdq Vx,Hx,Wx (66),(v1)
|
|
6e: movd/q Pd,Ey | vmovd/q Vy,Ey (66),(v1)
|
|
6f: movq Pq,Qq | vmovdqa Vx,Wx (66) | vmovdqa32/64 Vx,Wx (66),(evo) | vmovdqu Vx,Wx (F3) | vmovdqu32/64 Vx,Wx (F3),(evo) | vmovdqu8/16 Vx,Wx (F2),(ev)
|
|
# 0x0f 0x70-0x7f
|
|
70: pshufw Pq,Qq,Ib | vpshufd Vx,Wx,Ib (66),(v1) | vpshufhw Vx,Wx,Ib (F3),(v1) | vpshuflw Vx,Wx,Ib (F2),(v1)
|
|
71: Grp12 (1A)
|
|
72: Grp13 (1A)
|
|
73: Grp14 (1A)
|
|
74: pcmpeqb Pq,Qq | vpcmpeqb Vx,Hx,Wx (66),(v1)
|
|
75: pcmpeqw Pq,Qq | vpcmpeqw Vx,Hx,Wx (66),(v1)
|
|
76: pcmpeqd Pq,Qq | vpcmpeqd Vx,Hx,Wx (66),(v1)
|
|
# Note: Remove (v), because vzeroall and vzeroupper becomes emms without VEX.
|
|
77: emms | vzeroupper | vzeroall
|
|
78: VMREAD Ey,Gy | vcvttps2udq/pd2udq Vx,Wpd (evo) | vcvttsd2usi Gv,Wx (F2),(ev) | vcvttss2usi Gv,Wx (F3),(ev) | vcvttps2uqq/pd2uqq Vx,Wx (66),(ev)
|
|
79: VMWRITE Gy,Ey | vcvtps2udq/pd2udq Vx,Wpd (evo) | vcvtsd2usi Gv,Wx (F2),(ev) | vcvtss2usi Gv,Wx (F3),(ev) | vcvtps2uqq/pd2uqq Vx,Wx (66),(ev)
|
|
7a: vcvtudq2pd/uqq2pd Vpd,Wx (F3),(ev) | vcvtudq2ps/uqq2ps Vpd,Wx (F2),(ev) | vcvttps2qq/pd2qq Vx,Wx (66),(ev)
|
|
7b: vcvtusi2sd Vpd,Hpd,Ev (F2),(ev) | vcvtusi2ss Vps,Hps,Ev (F3),(ev) | vcvtps2qq/pd2qq Vx,Wx (66),(ev)
|
|
7c: vhaddpd Vpd,Hpd,Wpd (66) | vhaddps Vps,Hps,Wps (F2)
|
|
7d: vhsubpd Vpd,Hpd,Wpd (66) | vhsubps Vps,Hps,Wps (F2)
|
|
7e: movd/q Ey,Pd | vmovd/q Ey,Vy (66),(v1) | vmovq Vq,Wq (F3),(v1)
|
|
7f: movq Qq,Pq | vmovdqa Wx,Vx (66) | vmovdqa32/64 Wx,Vx (66),(evo) | vmovdqu Wx,Vx (F3) | vmovdqu32/64 Wx,Vx (F3),(evo) | vmovdqu8/16 Wx,Vx (F2),(ev)
|
|
# 0x0f 0x80-0x8f
|
|
# Note: "forced64" is Intel CPU behavior (see comment about CALL insn).
|
|
80: JO Jz (f64) (!REX2)
|
|
81: JNO Jz (f64) (!REX2)
|
|
82: JB/JC/JNAE Jz (f64) (!REX2)
|
|
83: JAE/JNB/JNC Jz (f64) (!REX2)
|
|
84: JE/JZ Jz (f64) (!REX2)
|
|
85: JNE/JNZ Jz (f64) (!REX2)
|
|
86: JBE/JNA Jz (f64) (!REX2)
|
|
87: JA/JNBE Jz (f64) (!REX2)
|
|
88: JS Jz (f64) (!REX2)
|
|
89: JNS Jz (f64) (!REX2)
|
|
8a: JP/JPE Jz (f64) (!REX2)
|
|
8b: JNP/JPO Jz (f64) (!REX2)
|
|
8c: JL/JNGE Jz (f64) (!REX2)
|
|
8d: JNL/JGE Jz (f64) (!REX2)
|
|
8e: JLE/JNG Jz (f64) (!REX2)
|
|
8f: JNLE/JG Jz (f64) (!REX2)
|
|
# 0x0f 0x90-0x9f
|
|
90: SETO Eb | kmovw/q Vk,Wk | kmovb/d Vk,Wk (66)
|
|
91: SETNO Eb | kmovw/q Mv,Vk | kmovb/d Mv,Vk (66)
|
|
92: SETB/C/NAE Eb | kmovw Vk,Rv | kmovb Vk,Rv (66) | kmovq/d Vk,Rv (F2)
|
|
93: SETAE/NB/NC Eb | kmovw Gv,Uk | kmovb Gv,Uk (66) | kmovq/d Gv,Uk (F2)
|
|
94: SETE/Z Eb
|
|
95: SETNE/NZ Eb
|
|
96: SETBE/NA Eb
|
|
97: SETA/NBE Eb
|
|
98: SETS Eb | kortestw/q Vk,Uk | kortestb/d Vk,Uk (66)
|
|
99: SETNS Eb | ktestw/q Vk,Uk | ktestb/d Vk,Uk (66)
|
|
9a: SETP/PE Eb
|
|
9b: SETNP/PO Eb
|
|
9c: SETL/NGE Eb
|
|
9d: SETNL/GE Eb
|
|
9e: SETLE/NG Eb
|
|
9f: SETNLE/G Eb
|
|
# 0x0f 0xa0-0xaf
|
|
a0: PUSH FS (d64)
|
|
a1: POP FS (d64)
|
|
a2: CPUID
|
|
a3: BT Ev,Gv
|
|
a4: SHLD Ev,Gv,Ib
|
|
a5: SHLD Ev,Gv,CL
|
|
a6: GrpPDLK
|
|
a7: GrpRNG
|
|
a8: PUSH GS (d64)
|
|
a9: POP GS (d64)
|
|
aa: RSM
|
|
ab: BTS Ev,Gv
|
|
ac: SHRD Ev,Gv,Ib
|
|
ad: SHRD Ev,Gv,CL
|
|
ae: Grp15 (1A),(1C)
|
|
af: IMUL Gv,Ev
|
|
# 0x0f 0xb0-0xbf
|
|
b0: CMPXCHG Eb,Gb
|
|
b1: CMPXCHG Ev,Gv
|
|
b2: LSS Gv,Mp
|
|
b3: BTR Ev,Gv
|
|
b4: LFS Gv,Mp
|
|
b5: LGS Gv,Mp
|
|
b6: MOVZX Gv,Eb
|
|
b7: MOVZX Gv,Ew
|
|
b8: JMPE (!F3) | POPCNT Gv,Ev (F3)
|
|
b9: Grp10 (1A)
|
|
ba: Grp8 Ev,Ib (1A)
|
|
bb: BTC Ev,Gv
|
|
bc: BSF Gv,Ev (!F3) | TZCNT Gv,Ev (F3)
|
|
bd: BSR Gv,Ev (!F3) | LZCNT Gv,Ev (F3)
|
|
be: MOVSX Gv,Eb
|
|
bf: MOVSX Gv,Ew
|
|
# 0x0f 0xc0-0xcf
|
|
c0: XADD Eb,Gb
|
|
c1: XADD Ev,Gv
|
|
c2: vcmpps Vps,Hps,Wps,Ib | vcmppd Vpd,Hpd,Wpd,Ib (66) | vcmpss Vss,Hss,Wss,Ib (F3),(v1) | vcmpsd Vsd,Hsd,Wsd,Ib (F2),(v1)
|
|
c3: movnti My,Gy
|
|
c4: pinsrw Pq,Ry/Mw,Ib | vpinsrw Vdq,Hdq,Ry/Mw,Ib (66),(v1)
|
|
c5: pextrw Gd,Nq,Ib | vpextrw Gd,Udq,Ib (66),(v1)
|
|
c6: vshufps Vps,Hps,Wps,Ib | vshufpd Vpd,Hpd,Wpd,Ib (66)
|
|
c7: Grp9 (1A)
|
|
c8: BSWAP RAX/EAX/R8/R8D
|
|
c9: BSWAP RCX/ECX/R9/R9D
|
|
ca: BSWAP RDX/EDX/R10/R10D
|
|
cb: BSWAP RBX/EBX/R11/R11D
|
|
cc: BSWAP RSP/ESP/R12/R12D
|
|
cd: BSWAP RBP/EBP/R13/R13D
|
|
ce: BSWAP RSI/ESI/R14/R14D
|
|
cf: BSWAP RDI/EDI/R15/R15D
|
|
# 0x0f 0xd0-0xdf
|
|
d0: vaddsubpd Vpd,Hpd,Wpd (66) | vaddsubps Vps,Hps,Wps (F2)
|
|
d1: psrlw Pq,Qq | vpsrlw Vx,Hx,Wx (66),(v1)
|
|
d2: psrld Pq,Qq | vpsrld Vx,Hx,Wx (66),(v1)
|
|
d3: psrlq Pq,Qq | vpsrlq Vx,Hx,Wx (66),(v1)
|
|
d4: paddq Pq,Qq | vpaddq Vx,Hx,Wx (66),(v1)
|
|
d5: pmullw Pq,Qq | vpmullw Vx,Hx,Wx (66),(v1)
|
|
d6: vmovq Wq,Vq (66),(v1) | movq2dq Vdq,Nq (F3) | movdq2q Pq,Uq (F2)
|
|
d7: pmovmskb Gd,Nq | vpmovmskb Gd,Ux (66),(v1)
|
|
d8: psubusb Pq,Qq | vpsubusb Vx,Hx,Wx (66),(v1)
|
|
d9: psubusw Pq,Qq | vpsubusw Vx,Hx,Wx (66),(v1)
|
|
da: pminub Pq,Qq | vpminub Vx,Hx,Wx (66),(v1)
|
|
db: pand Pq,Qq | vpand Vx,Hx,Wx (66),(v1) | vpandd/q Vx,Hx,Wx (66),(evo)
|
|
dc: paddusb Pq,Qq | vpaddusb Vx,Hx,Wx (66),(v1)
|
|
dd: paddusw Pq,Qq | vpaddusw Vx,Hx,Wx (66),(v1)
|
|
de: pmaxub Pq,Qq | vpmaxub Vx,Hx,Wx (66),(v1)
|
|
df: pandn Pq,Qq | vpandn Vx,Hx,Wx (66),(v1) | vpandnd/q Vx,Hx,Wx (66),(evo)
|
|
# 0x0f 0xe0-0xef
|
|
e0: pavgb Pq,Qq | vpavgb Vx,Hx,Wx (66),(v1)
|
|
e1: psraw Pq,Qq | vpsraw Vx,Hx,Wx (66),(v1)
|
|
e2: psrad Pq,Qq | vpsrad Vx,Hx,Wx (66),(v1)
|
|
e3: pavgw Pq,Qq | vpavgw Vx,Hx,Wx (66),(v1)
|
|
e4: pmulhuw Pq,Qq | vpmulhuw Vx,Hx,Wx (66),(v1)
|
|
e5: pmulhw Pq,Qq | vpmulhw Vx,Hx,Wx (66),(v1)
|
|
e6: vcvttpd2dq Vx,Wpd (66) | vcvtdq2pd Vx,Wdq (F3) | vcvtdq2pd/qq2pd Vx,Wdq (F3),(evo) | vcvtpd2dq Vx,Wpd (F2)
|
|
e7: movntq Mq,Pq | vmovntdq Mx,Vx (66)
|
|
e8: psubsb Pq,Qq | vpsubsb Vx,Hx,Wx (66),(v1)
|
|
e9: psubsw Pq,Qq | vpsubsw Vx,Hx,Wx (66),(v1)
|
|
ea: pminsw Pq,Qq | vpminsw Vx,Hx,Wx (66),(v1)
|
|
eb: por Pq,Qq | vpor Vx,Hx,Wx (66),(v1) | vpord/q Vx,Hx,Wx (66),(evo)
|
|
ec: paddsb Pq,Qq | vpaddsb Vx,Hx,Wx (66),(v1)
|
|
ed: paddsw Pq,Qq | vpaddsw Vx,Hx,Wx (66),(v1)
|
|
ee: pmaxsw Pq,Qq | vpmaxsw Vx,Hx,Wx (66),(v1)
|
|
ef: pxor Pq,Qq | vpxor Vx,Hx,Wx (66),(v1) | vpxord/q Vx,Hx,Wx (66),(evo)
|
|
# 0x0f 0xf0-0xff
|
|
f0: vlddqu Vx,Mx (F2)
|
|
f1: psllw Pq,Qq | vpsllw Vx,Hx,Wx (66),(v1)
|
|
f2: pslld Pq,Qq | vpslld Vx,Hx,Wx (66),(v1)
|
|
f3: psllq Pq,Qq | vpsllq Vx,Hx,Wx (66),(v1)
|
|
f4: pmuludq Pq,Qq | vpmuludq Vx,Hx,Wx (66),(v1)
|
|
f5: pmaddwd Pq,Qq | vpmaddwd Vx,Hx,Wx (66),(v1)
|
|
f6: psadbw Pq,Qq | vpsadbw Vx,Hx,Wx (66),(v1)
|
|
f7: maskmovq Pq,Nq | vmaskmovdqu Vx,Ux (66),(v1)
|
|
f8: psubb Pq,Qq | vpsubb Vx,Hx,Wx (66),(v1)
|
|
f9: psubw Pq,Qq | vpsubw Vx,Hx,Wx (66),(v1)
|
|
fa: psubd Pq,Qq | vpsubd Vx,Hx,Wx (66),(v1)
|
|
fb: psubq Pq,Qq | vpsubq Vx,Hx,Wx (66),(v1)
|
|
fc: paddb Pq,Qq | vpaddb Vx,Hx,Wx (66),(v1)
|
|
fd: paddw Pq,Qq | vpaddw Vx,Hx,Wx (66),(v1)
|
|
fe: paddd Pq,Qq | vpaddd Vx,Hx,Wx (66),(v1)
|
|
ff: UD0
|
|
EndTable
|
|
|
|
Table: 3-byte opcode 1 (0x0f 0x38)
|
|
Referrer: 3-byte escape 1
|
|
AVXcode: 2
|
|
# 0x0f 0x38 0x00-0x0f
|
|
00: pshufb Pq,Qq | vpshufb Vx,Hx,Wx (66),(v1)
|
|
01: phaddw Pq,Qq | vphaddw Vx,Hx,Wx (66),(v1)
|
|
02: phaddd Pq,Qq | vphaddd Vx,Hx,Wx (66),(v1)
|
|
03: phaddsw Pq,Qq | vphaddsw Vx,Hx,Wx (66),(v1)
|
|
04: pmaddubsw Pq,Qq | vpmaddubsw Vx,Hx,Wx (66),(v1)
|
|
05: phsubw Pq,Qq | vphsubw Vx,Hx,Wx (66),(v1)
|
|
06: phsubd Pq,Qq | vphsubd Vx,Hx,Wx (66),(v1)
|
|
07: phsubsw Pq,Qq | vphsubsw Vx,Hx,Wx (66),(v1)
|
|
08: psignb Pq,Qq | vpsignb Vx,Hx,Wx (66),(v1)
|
|
09: psignw Pq,Qq | vpsignw Vx,Hx,Wx (66),(v1)
|
|
0a: psignd Pq,Qq | vpsignd Vx,Hx,Wx (66),(v1)
|
|
0b: pmulhrsw Pq,Qq | vpmulhrsw Vx,Hx,Wx (66),(v1)
|
|
0c: vpermilps Vx,Hx,Wx (66),(v)
|
|
0d: vpermilpd Vx,Hx,Wx (66),(v)
|
|
0e: vtestps Vx,Wx (66),(v)
|
|
0f: vtestpd Vx,Wx (66),(v)
|
|
# 0x0f 0x38 0x10-0x1f
|
|
10: pblendvb Vdq,Wdq (66) | vpsrlvw Vx,Hx,Wx (66),(evo) | vpmovuswb Wx,Vx (F3),(ev)
|
|
11: vpmovusdb Wx,Vd (F3),(ev) | vpsravw Vx,Hx,Wx (66),(ev)
|
|
12: vpmovusqb Wx,Vq (F3),(ev) | vpsllvw Vx,Hx,Wx (66),(ev)
|
|
13: vcvtph2ps Vx,Wx (66),(v) | vpmovusdw Wx,Vd (F3),(ev)
|
|
14: blendvps Vdq,Wdq (66) | vpmovusqw Wx,Vq (F3),(ev) | vprorvd/q Vx,Hx,Wx (66),(evo)
|
|
15: blendvpd Vdq,Wdq (66) | vpmovusqd Wx,Vq (F3),(ev) | vprolvd/q Vx,Hx,Wx (66),(evo)
|
|
16: vpermps Vqq,Hqq,Wqq (66),(v) | vpermps/d Vqq,Hqq,Wqq (66),(evo)
|
|
17: vptest Vx,Wx (66)
|
|
18: vbroadcastss Vx,Wd (66),(v)
|
|
19: vbroadcastsd Vqq,Wq (66),(v) | vbroadcastf32x2 Vqq,Wq (66),(evo)
|
|
1a: vbroadcastf128 Vqq,Mdq (66),(v) | vbroadcastf32x4/64x2 Vqq,Wq (66),(evo)
|
|
1b: vbroadcastf32x8/64x4 Vqq,Mdq (66),(ev)
|
|
1c: pabsb Pq,Qq | vpabsb Vx,Wx (66),(v1)
|
|
1d: pabsw Pq,Qq | vpabsw Vx,Wx (66),(v1)
|
|
1e: pabsd Pq,Qq | vpabsd Vx,Wx (66),(v1)
|
|
1f: vpabsq Vx,Wx (66),(ev)
|
|
# 0x0f 0x38 0x20-0x2f
|
|
20: vpmovsxbw Vx,Ux/Mq (66),(v1) | vpmovswb Wx,Vx (F3),(ev)
|
|
21: vpmovsxbd Vx,Ux/Md (66),(v1) | vpmovsdb Wx,Vd (F3),(ev)
|
|
22: vpmovsxbq Vx,Ux/Mw (66),(v1) | vpmovsqb Wx,Vq (F3),(ev)
|
|
23: vpmovsxwd Vx,Ux/Mq (66),(v1) | vpmovsdw Wx,Vd (F3),(ev)
|
|
24: vpmovsxwq Vx,Ux/Md (66),(v1) | vpmovsqw Wx,Vq (F3),(ev)
|
|
25: vpmovsxdq Vx,Ux/Mq (66),(v1) | vpmovsqd Wx,Vq (F3),(ev)
|
|
26: vptestmb/w Vk,Hx,Wx (66),(ev) | vptestnmb/w Vk,Hx,Wx (F3),(ev)
|
|
27: vptestmd/q Vk,Hx,Wx (66),(ev) | vptestnmd/q Vk,Hx,Wx (F3),(ev)
|
|
28: vpmuldq Vx,Hx,Wx (66),(v1) | vpmovm2b/w Vx,Uk (F3),(ev)
|
|
29: vpcmpeqq Vx,Hx,Wx (66),(v1) | vpmovb2m/w2m Vk,Ux (F3),(ev)
|
|
2a: vmovntdqa Vx,Mx (66),(v1) | vpbroadcastmb2q Vx,Uk (F3),(ev)
|
|
2b: vpackusdw Vx,Hx,Wx (66),(v1)
|
|
2c: vmaskmovps Vx,Hx,Mx (66),(v) | vscalefps/d Vx,Hx,Wx (66),(evo)
|
|
2d: vmaskmovpd Vx,Hx,Mx (66),(v) | vscalefss/d Vx,Hx,Wx (66),(evo)
|
|
2e: vmaskmovps Mx,Hx,Vx (66),(v)
|
|
2f: vmaskmovpd Mx,Hx,Vx (66),(v)
|
|
# 0x0f 0x38 0x30-0x3f
|
|
30: vpmovzxbw Vx,Ux/Mq (66),(v1) | vpmovwb Wx,Vx (F3),(ev)
|
|
31: vpmovzxbd Vx,Ux/Md (66),(v1) | vpmovdb Wx,Vd (F3),(ev)
|
|
32: vpmovzxbq Vx,Ux/Mw (66),(v1) | vpmovqb Wx,Vq (F3),(ev)
|
|
33: vpmovzxwd Vx,Ux/Mq (66),(v1) | vpmovdw Wx,Vd (F3),(ev)
|
|
34: vpmovzxwq Vx,Ux/Md (66),(v1) | vpmovqw Wx,Vq (F3),(ev)
|
|
35: vpmovzxdq Vx,Ux/Mq (66),(v1) | vpmovqd Wx,Vq (F3),(ev)
|
|
36: vpermd Vqq,Hqq,Wqq (66),(v) | vpermd/q Vqq,Hqq,Wqq (66),(evo)
|
|
37: vpcmpgtq Vx,Hx,Wx (66),(v1)
|
|
38: vpminsb Vx,Hx,Wx (66),(v1) | vpmovm2d/q Vx,Uk (F3),(ev)
|
|
39: vpminsd Vx,Hx,Wx (66),(v1) | vpminsd/q Vx,Hx,Wx (66),(evo) | vpmovd2m/q2m Vk,Ux (F3),(ev)
|
|
3a: vpminuw Vx,Hx,Wx (66),(v1) | vpbroadcastmw2d Vx,Uk (F3),(ev)
|
|
3b: vpminud Vx,Hx,Wx (66),(v1) | vpminud/q Vx,Hx,Wx (66),(evo)
|
|
3c: vpmaxsb Vx,Hx,Wx (66),(v1)
|
|
3d: vpmaxsd Vx,Hx,Wx (66),(v1) | vpmaxsd/q Vx,Hx,Wx (66),(evo)
|
|
3e: vpmaxuw Vx,Hx,Wx (66),(v1)
|
|
3f: vpmaxud Vx,Hx,Wx (66),(v1) | vpmaxud/q Vx,Hx,Wx (66),(evo)
|
|
# 0x0f 0x38 0x40-0x8f
|
|
40: vpmulld Vx,Hx,Wx (66),(v1) | vpmulld/q Vx,Hx,Wx (66),(evo)
|
|
41: vphminposuw Vdq,Wdq (66),(v1)
|
|
42: vgetexpps/d Vx,Wx (66),(ev)
|
|
43: vgetexpss/d Vx,Hx,Wx (66),(ev)
|
|
44: vplzcntd/q Vx,Wx (66),(ev)
|
|
45: vpsrlvd/q Vx,Hx,Wx (66),(v)
|
|
46: vpsravd Vx,Hx,Wx (66),(v) | vpsravd/q Vx,Hx,Wx (66),(evo)
|
|
47: vpsllvd/q Vx,Hx,Wx (66),(v)
|
|
# Skip 0x48
|
|
49: TILERELEASE (v1),(000),(11B) | LDTILECFG Mtc (v1)(000) | STTILECFG Mtc (66),(v1),(000) | TILEZERO Vt (F2),(v1),(11B)
|
|
# Skip 0x4a
|
|
4b: TILELOADD Vt,Wsm (F2),(v1) | TILELOADDT1 Vt,Wsm (66),(v1) | TILESTORED Wsm,Vt (F3),(v)
|
|
4c: vrcp14ps/d Vpd,Wpd (66),(ev)
|
|
4d: vrcp14ss/d Vsd,Hpd,Wsd (66),(ev)
|
|
4e: vrsqrt14ps/d Vpd,Wpd (66),(ev)
|
|
4f: vrsqrt14ss/d Vsd,Hsd,Wsd (66),(ev)
|
|
50: vpdpbusd Vx,Hx,Wx (66) | vpdpbssd Vx,Hx,Wx (F2),(v) | vpdpbsud Vx,Hx,Wx (F3),(v) | vpdpbuud Vx,Hx,Wx (v)
|
|
51: vpdpbusds Vx,Hx,Wx (66) | vpdpbssds Vx,Hx,Wx (F2),(v) | vpdpbsuds Vx,Hx,Wx (F3),(v) | vpdpbuuds Vx,Hx,Wx (v)
|
|
52: vdpbf16ps Vx,Hx,Wx (F3),(ev) | vpdpwssd Vx,Hx,Wx (66) | vp4dpwssd Vdqq,Hdqq,Wdq (F2),(ev)
|
|
53: vpdpwssds Vx,Hx,Wx (66) | vp4dpwssds Vdqq,Hdqq,Wdq (F2),(ev)
|
|
54: vpopcntb/w Vx,Wx (66),(ev)
|
|
55: vpopcntd/q Vx,Wx (66),(ev)
|
|
58: vpbroadcastd Vx,Wx (66),(v)
|
|
59: vpbroadcastq Vx,Wx (66),(v) | vbroadcasti32x2 Vx,Wx (66),(evo)
|
|
5a: vbroadcasti128 Vqq,Mdq (66),(v) | vbroadcasti32x4/64x2 Vx,Wx (66),(evo)
|
|
5b: vbroadcasti32x8/64x4 Vqq,Mdq (66),(ev)
|
|
5c: TDPBF16PS Vt,Wt,Ht (F3),(v1) | TDPFP16PS Vt,Wt,Ht (F2),(v1),(o64)
|
|
# Skip 0x5d
|
|
5e: TDPBSSD Vt,Wt,Ht (F2),(v1) | TDPBSUD Vt,Wt,Ht (F3),(v1) | TDPBUSD Vt,Wt,Ht (66),(v1) | TDPBUUD Vt,Wt,Ht (v1)
|
|
# Skip 0x5f-0x61
|
|
62: vpexpandb/w Vx,Wx (66),(ev)
|
|
63: vpcompressb/w Wx,Vx (66),(ev)
|
|
64: vpblendmd/q Vx,Hx,Wx (66),(ev)
|
|
65: vblendmps/d Vx,Hx,Wx (66),(ev)
|
|
66: vpblendmb/w Vx,Hx,Wx (66),(ev)
|
|
68: vp2intersectd/q Kx,Hx,Wx (F2),(ev)
|
|
# Skip 0x69-0x6b
|
|
6c: TCMMIMFP16PS Vt,Wt,Ht (66),(v1),(o64) | TCMMRLFP16PS Vt,Wt,Ht (v1),(o64)
|
|
# Skip 0x6d-0x6f
|
|
70: vpshldvw Vx,Hx,Wx (66),(ev)
|
|
71: vpshldvd/q Vx,Hx,Wx (66),(ev)
|
|
72: vcvtne2ps2bf16 Vx,Hx,Wx (F2),(ev) | vcvtneps2bf16 Vx,Wx (F3) | vpshrdvw Vx,Hx,Wx (66),(ev)
|
|
73: vpshrdvd/q Vx,Hx,Wx (66),(ev)
|
|
75: vpermi2b/w Vx,Hx,Wx (66),(ev)
|
|
76: vpermi2d/q Vx,Hx,Wx (66),(ev)
|
|
77: vpermi2ps/d Vx,Hx,Wx (66),(ev)
|
|
78: vpbroadcastb Vx,Wx (66),(v)
|
|
79: vpbroadcastw Vx,Wx (66),(v)
|
|
7a: vpbroadcastb Vx,Rv (66),(ev)
|
|
7b: vpbroadcastw Vx,Rv (66),(ev)
|
|
7c: vpbroadcastd/q Vx,Rv (66),(ev)
|
|
7d: vpermt2b/w Vx,Hx,Wx (66),(ev)
|
|
7e: vpermt2d/q Vx,Hx,Wx (66),(ev)
|
|
7f: vpermt2ps/d Vx,Hx,Wx (66),(ev)
|
|
80: INVEPT Gy,Mdq (66)
|
|
81: INVVPID Gy,Mdq (66)
|
|
82: INVPCID Gy,Mdq (66)
|
|
83: vpmultishiftqb Vx,Hx,Wx (66),(ev)
|
|
88: vexpandps/d Vpd,Wpd (66),(ev)
|
|
89: vpexpandd/q Vx,Wx (66),(ev)
|
|
8a: vcompressps/d Wx,Vx (66),(ev)
|
|
8b: vpcompressd/q Wx,Vx (66),(ev)
|
|
8c: vpmaskmovd/q Vx,Hx,Mx (66),(v)
|
|
8d: vpermb/w Vx,Hx,Wx (66),(ev)
|
|
8e: vpmaskmovd/q Mx,Vx,Hx (66),(v)
|
|
8f: vpshufbitqmb Kx,Hx,Wx (66),(ev)
|
|
# 0x0f 0x38 0x90-0xbf (FMA)
|
|
90: vgatherdd/q Vx,Hx,Wx (66),(v) | vpgatherdd/q Vx,Wx (66),(evo)
|
|
91: vgatherqd/q Vx,Hx,Wx (66),(v) | vpgatherqd/q Vx,Wx (66),(evo)
|
|
92: vgatherdps/d Vx,Hx,Wx (66),(v)
|
|
93: vgatherqps/d Vx,Hx,Wx (66),(v)
|
|
94:
|
|
95:
|
|
96: vfmaddsub132ps/d Vx,Hx,Wx (66),(v)
|
|
97: vfmsubadd132ps/d Vx,Hx,Wx (66),(v)
|
|
98: vfmadd132ps/d Vx,Hx,Wx (66),(v)
|
|
99: vfmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
9a: vfmsub132ps/d Vx,Hx,Wx (66),(v) | v4fmaddps Vdqq,Hdqq,Wdq (F2),(ev)
|
|
9b: vfmsub132ss/d Vx,Hx,Wx (66),(v),(v1) | v4fmaddss Vdq,Hdq,Wdq (F2),(ev)
|
|
9c: vfnmadd132ps/d Vx,Hx,Wx (66),(v)
|
|
9d: vfnmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
9e: vfnmsub132ps/d Vx,Hx,Wx (66),(v)
|
|
9f: vfnmsub132ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
a0: vpscatterdd/q Wx,Vx (66),(ev)
|
|
a1: vpscatterqd/q Wx,Vx (66),(ev)
|
|
a2: vscatterdps/d Wx,Vx (66),(ev)
|
|
a3: vscatterqps/d Wx,Vx (66),(ev)
|
|
a6: vfmaddsub213ps/d Vx,Hx,Wx (66),(v)
|
|
a7: vfmsubadd213ps/d Vx,Hx,Wx (66),(v)
|
|
a8: vfmadd213ps/d Vx,Hx,Wx (66),(v)
|
|
a9: vfmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
aa: vfmsub213ps/d Vx,Hx,Wx (66),(v) | v4fnmaddps Vdqq,Hdqq,Wdq (F2),(ev)
|
|
ab: vfmsub213ss/d Vx,Hx,Wx (66),(v),(v1) | v4fnmaddss Vdq,Hdq,Wdq (F2),(ev)
|
|
ac: vfnmadd213ps/d Vx,Hx,Wx (66),(v)
|
|
ad: vfnmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
ae: vfnmsub213ps/d Vx,Hx,Wx (66),(v)
|
|
af: vfnmsub213ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
b0: vcvtneebf162ps Vx,Mx (F3),(!11B),(v) | vcvtneeph2ps Vx,Mx (66),(!11B),(v) | vcvtneobf162ps Vx,Mx (F2),(!11B),(v) | vcvtneoph2ps Vx,Mx (!11B),(v)
|
|
b1: vbcstnebf162ps Vx,Mw (F3),(!11B),(v) | vbcstnesh2ps Vx,Mw (66),(!11B),(v)
|
|
b4: vpmadd52luq Vx,Hx,Wx (66)
|
|
b5: vpmadd52huq Vx,Hx,Wx (66)
|
|
b6: vfmaddsub231ps/d Vx,Hx,Wx (66),(v)
|
|
b7: vfmsubadd231ps/d Vx,Hx,Wx (66),(v)
|
|
b8: vfmadd231ps/d Vx,Hx,Wx (66),(v)
|
|
b9: vfmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
ba: vfmsub231ps/d Vx,Hx,Wx (66),(v)
|
|
bb: vfmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
bc: vfnmadd231ps/d Vx,Hx,Wx (66),(v)
|
|
bd: vfnmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
be: vfnmsub231ps/d Vx,Hx,Wx (66),(v)
|
|
bf: vfnmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
|
|
# 0x0f 0x38 0xc0-0xff
|
|
c4: vpconflictd/q Vx,Wx (66),(ev)
|
|
c6: Grp18 (1A)
|
|
c7: Grp19 (1A)
|
|
c8: sha1nexte Vdq,Wdq | vexp2ps/d Vx,Wx (66),(ev)
|
|
c9: sha1msg1 Vdq,Wdq
|
|
ca: sha1msg2 Vdq,Wdq | vrcp28ps/d Vx,Wx (66),(ev)
|
|
cb: sha256rnds2 Vdq,Wdq | vrcp28ss/d Vx,Hx,Wx (66),(ev) | vsha512rnds2 Vqq,Hqq,Udq (F2),(11B),(v)
|
|
cc: sha256msg1 Vdq,Wdq | vrsqrt28ps/d Vx,Wx (66),(ev) | vsha512msg1 Vqq,Udq (F2),(11B),(v)
|
|
cd: sha256msg2 Vdq,Wdq | vrsqrt28ss/d Vx,Hx,Wx (66),(ev) | vsha512msg2 Vqq,Uqq (F2),(11B),(v)
|
|
cf: vgf2p8mulb Vx,Wx (66)
|
|
d2: vpdpwsud Vx,Hx,Wx (F3),(v) | vpdpwusd Vx,Hx,Wx (66),(v) | vpdpwuud Vx,Hx,Wx (v)
|
|
d3: vpdpwsuds Vx,Hx,Wx (F3),(v) | vpdpwusds Vx,Hx,Wx (66),(v) | vpdpwuuds Vx,Hx,Wx (v)
|
|
d8: AESENCWIDE128KL Qpi (F3),(000),(00B) | AESENCWIDE256KL Qpi (F3),(000),(10B) | AESDECWIDE128KL Qpi (F3),(000),(01B) | AESDECWIDE256KL Qpi (F3),(000),(11B)
|
|
da: vsm3msg1 Vdq,Hdq,Udq (v1) | vsm3msg2 Vdq,Hdq,Udq (66),(v1) | vsm4key4 Vx,Hx,Wx (F3),(v) | vsm4rnds4 Vx,Hx,Wx (F2),(v)
|
|
db: VAESIMC Vdq,Wdq (66),(v1)
|
|
dc: vaesenc Vx,Hx,Wx (66) | LOADIWKEY Vx,Hx (F3) | AESENC128KL Vpd,Qpi (F3)
|
|
dd: vaesenclast Vx,Hx,Wx (66) | AESDEC128KL Vpd,Qpi (F3)
|
|
de: vaesdec Vx,Hx,Wx (66) | AESENC256KL Vpd,Qpi (F3)
|
|
df: vaesdeclast Vx,Hx,Wx (66) | AESDEC256KL Vpd,Qpi (F3)
|
|
e0: CMPOXADD My,Gy,By (66),(v1),(o64)
|
|
e1: CMPNOXADD My,Gy,By (66),(v1),(o64)
|
|
e2: CMPBXADD My,Gy,By (66),(v1),(o64)
|
|
e3: CMPNBXADD My,Gy,By (66),(v1),(o64)
|
|
e4: CMPZXADD My,Gy,By (66),(v1),(o64)
|
|
e5: CMPNZXADD My,Gy,By (66),(v1),(o64)
|
|
e6: CMPBEXADD My,Gy,By (66),(v1),(o64)
|
|
e7: CMPNBEXADD My,Gy,By (66),(v1),(o64)
|
|
e8: CMPSXADD My,Gy,By (66),(v1),(o64)
|
|
e9: CMPNSXADD My,Gy,By (66),(v1),(o64)
|
|
ea: CMPPXADD My,Gy,By (66),(v1),(o64)
|
|
eb: CMPNPXADD My,Gy,By (66),(v1),(o64)
|
|
ec: CMPLXADD My,Gy,By (66),(v1),(o64)
|
|
ed: CMPNLXADD My,Gy,By (66),(v1),(o64)
|
|
ee: CMPLEXADD My,Gy,By (66),(v1),(o64)
|
|
ef: CMPNLEXADD My,Gy,By (66),(v1),(o64)
|
|
f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | CRC32 Gd,Eb (66&F2)
|
|
f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
|
|
f2: ANDN Gy,By,Ey (v)
|
|
f3: Grp17 (1A)
|
|
f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | WRUSSD/Q My,Gy (66)
|
|
f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy
|
|
f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
|
|
f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) | URDMSR Rq,Gq (F2),(11B) | UWRMSR Gq,Rq (F3),(11B)
|
|
f9: MOVDIRI My,Gy
|
|
fa: ENCODEKEY128 Ew,Ew (F3)
|
|
fb: ENCODEKEY256 Ew,Ew (F3)
|
|
fc: AADD My,Gy | AAND My,Gy (66) | AOR My,Gy (F2) | AXOR My,Gy (F3)
|
|
EndTable
|
|
|
|
Table: 3-byte opcode 2 (0x0f 0x3a)
|
|
Referrer: 3-byte escape 2
|
|
AVXcode: 3
|
|
# 0x0f 0x3a 0x00-0xff
|
|
00: vpermq Vqq,Wqq,Ib (66),(v)
|
|
01: vpermpd Vqq,Wqq,Ib (66),(v)
|
|
02: vpblendd Vx,Hx,Wx,Ib (66),(v)
|
|
03: valignd/q Vx,Hx,Wx,Ib (66),(ev)
|
|
04: vpermilps Vx,Wx,Ib (66),(v)
|
|
05: vpermilpd Vx,Wx,Ib (66),(v)
|
|
06: vperm2f128 Vqq,Hqq,Wqq,Ib (66),(v)
|
|
07:
|
|
08: vroundps Vx,Wx,Ib (66) | vrndscaleps Vx,Wx,Ib (66),(evo) | vrndscaleph Vx,Wx,Ib (evo)
|
|
09: vroundpd Vx,Wx,Ib (66) | vrndscalepd Vx,Wx,Ib (66),(evo)
|
|
0a: vroundss Vss,Wss,Ib (66),(v1) | vrndscaless Vx,Hx,Wx,Ib (66),(evo) | vrndscalesh Vx,Hx,Wx,Ib (evo)
|
|
0b: vroundsd Vsd,Wsd,Ib (66),(v1) | vrndscalesd Vx,Hx,Wx,Ib (66),(evo)
|
|
0c: vblendps Vx,Hx,Wx,Ib (66)
|
|
0d: vblendpd Vx,Hx,Wx,Ib (66)
|
|
0e: vpblendw Vx,Hx,Wx,Ib (66),(v1)
|
|
0f: palignr Pq,Qq,Ib | vpalignr Vx,Hx,Wx,Ib (66),(v1)
|
|
14: vpextrb Rd/Mb,Vdq,Ib (66),(v1)
|
|
15: vpextrw Rd/Mw,Vdq,Ib (66),(v1)
|
|
16: vpextrd/q Ey,Vdq,Ib (66),(v1)
|
|
17: vextractps Ed,Vdq,Ib (66),(v1)
|
|
18: vinsertf128 Vqq,Hqq,Wqq,Ib (66),(v) | vinsertf32x4/64x2 Vqq,Hqq,Wqq,Ib (66),(evo)
|
|
19: vextractf128 Wdq,Vqq,Ib (66),(v) | vextractf32x4/64x2 Wdq,Vqq,Ib (66),(evo)
|
|
1a: vinsertf32x8/64x4 Vqq,Hqq,Wqq,Ib (66),(ev)
|
|
1b: vextractf32x8/64x4 Wdq,Vqq,Ib (66),(ev)
|
|
1d: vcvtps2ph Wx,Vx,Ib (66),(v)
|
|
1e: vpcmpud/q Vk,Hd,Wd,Ib (66),(ev)
|
|
1f: vpcmpd/q Vk,Hd,Wd,Ib (66),(ev)
|
|
20: vpinsrb Vdq,Hdq,Ry/Mb,Ib (66),(v1)
|
|
21: vinsertps Vdq,Hdq,Udq/Md,Ib (66),(v1)
|
|
22: vpinsrd/q Vdq,Hdq,Ey,Ib (66),(v1)
|
|
23: vshuff32x4/64x2 Vx,Hx,Wx,Ib (66),(ev)
|
|
25: vpternlogd/q Vx,Hx,Wx,Ib (66),(ev)
|
|
26: vgetmantps/d Vx,Wx,Ib (66),(ev) | vgetmantph Vx,Wx,Ib (ev)
|
|
27: vgetmantss/d Vx,Hx,Wx,Ib (66),(ev) | vgetmantsh Vx,Hx,Wx,Ib (ev)
|
|
30: kshiftrb/w Vk,Uk,Ib (66),(v)
|
|
31: kshiftrd/q Vk,Uk,Ib (66),(v)
|
|
32: kshiftlb/w Vk,Uk,Ib (66),(v)
|
|
33: kshiftld/q Vk,Uk,Ib (66),(v)
|
|
38: vinserti128 Vqq,Hqq,Wqq,Ib (66),(v) | vinserti32x4/64x2 Vqq,Hqq,Wqq,Ib (66),(evo)
|
|
39: vextracti128 Wdq,Vqq,Ib (66),(v) | vextracti32x4/64x2 Wdq,Vqq,Ib (66),(evo)
|
|
3a: vinserti32x8/64x4 Vqq,Hqq,Wqq,Ib (66),(ev)
|
|
3b: vextracti32x8/64x4 Wdq,Vqq,Ib (66),(ev)
|
|
3e: vpcmpub/w Vk,Hk,Wx,Ib (66),(ev)
|
|
3f: vpcmpb/w Vk,Hk,Wx,Ib (66),(ev)
|
|
40: vdpps Vx,Hx,Wx,Ib (66)
|
|
41: vdppd Vdq,Hdq,Wdq,Ib (66),(v1)
|
|
42: vmpsadbw Vx,Hx,Wx,Ib (66),(v1) | vdbpsadbw Vx,Hx,Wx,Ib (66),(evo)
|
|
43: vshufi32x4/64x2 Vx,Hx,Wx,Ib (66),(ev)
|
|
44: vpclmulqdq Vx,Hx,Wx,Ib (66)
|
|
46: vperm2i128 Vqq,Hqq,Wqq,Ib (66),(v)
|
|
4a: vblendvps Vx,Hx,Wx,Lx (66),(v)
|
|
4b: vblendvpd Vx,Hx,Wx,Lx (66),(v)
|
|
4c: vpblendvb Vx,Hx,Wx,Lx (66),(v1)
|
|
50: vrangeps/d Vx,Hx,Wx,Ib (66),(ev)
|
|
51: vrangess/d Vx,Hx,Wx,Ib (66),(ev)
|
|
54: vfixupimmps/d Vx,Hx,Wx,Ib (66),(ev)
|
|
55: vfixupimmss/d Vx,Hx,Wx,Ib (66),(ev)
|
|
56: vreduceps/d Vx,Wx,Ib (66),(ev) | vreduceph Vx,Wx,Ib (ev)
|
|
57: vreducess/d Vx,Hx,Wx,Ib (66),(ev) | vreducesh Vx,Hx,Wx,Ib (ev)
|
|
60: vpcmpestrm Vdq,Wdq,Ib (66),(v1)
|
|
61: vpcmpestri Vdq,Wdq,Ib (66),(v1)
|
|
62: vpcmpistrm Vdq,Wdq,Ib (66),(v1)
|
|
63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
|
|
66: vfpclassps/d Vk,Wx,Ib (66),(ev) | vfpclassph Vx,Wx,Ib (ev)
|
|
67: vfpclassss/d Vk,Wx,Ib (66),(ev) | vfpclasssh Vx,Wx,Ib (ev)
|
|
70: vpshldw Vx,Hx,Wx,Ib (66),(ev)
|
|
71: vpshldd/q Vx,Hx,Wx,Ib (66),(ev)
|
|
72: vpshrdw Vx,Hx,Wx,Ib (66),(ev)
|
|
73: vpshrdd/q Vx,Hx,Wx,Ib (66),(ev)
|
|
c2: vcmpph Vx,Hx,Wx,Ib (ev) | vcmpsh Vx,Hx,Wx,Ib (F3),(ev)
|
|
cc: sha1rnds4 Vdq,Wdq,Ib
|
|
ce: vgf2p8affineqb Vx,Wx,Ib (66)
|
|
cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
|
|
de: vsm3rnds2 Vdq,Hdq,Wdq,Ib (66),(v1)
|
|
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
|
|
f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B)
|
|
EndTable
|
|
|
|
Table: EVEX map 4
|
|
Referrer:
|
|
AVXcode: 4
|
|
00: ADD Eb,Gb (ev)
|
|
01: ADD Ev,Gv (es) | ADD Ev,Gv (66),(es)
|
|
02: ADD Gb,Eb (ev)
|
|
03: ADD Gv,Ev (es) | ADD Gv,Ev (66),(es)
|
|
08: OR Eb,Gb (ev)
|
|
09: OR Ev,Gv (es) | OR Ev,Gv (66),(es)
|
|
0a: OR Gb,Eb (ev)
|
|
0b: OR Gv,Ev (es) | OR Gv,Ev (66),(es)
|
|
10: ADC Eb,Gb (ev)
|
|
11: ADC Ev,Gv (es) | ADC Ev,Gv (66),(es)
|
|
12: ADC Gb,Eb (ev)
|
|
13: ADC Gv,Ev (es) | ADC Gv,Ev (66),(es)
|
|
18: SBB Eb,Gb (ev)
|
|
19: SBB Ev,Gv (es) | SBB Ev,Gv (66),(es)
|
|
1a: SBB Gb,Eb (ev)
|
|
1b: SBB Gv,Ev (es) | SBB Gv,Ev (66),(es)
|
|
20: AND Eb,Gb (ev)
|
|
21: AND Ev,Gv (es) | AND Ev,Gv (66),(es)
|
|
22: AND Gb,Eb (ev)
|
|
23: AND Gv,Ev (es) | AND Gv,Ev (66),(es)
|
|
24: SHLD Ev,Gv,Ib (es) | SHLD Ev,Gv,Ib (66),(es)
|
|
28: SUB Eb,Gb (ev)
|
|
29: SUB Ev,Gv (es) | SUB Ev,Gv (66),(es)
|
|
2a: SUB Gb,Eb (ev)
|
|
2b: SUB Gv,Ev (es) | SUB Gv,Ev (66),(es)
|
|
2c: SHRD Ev,Gv,Ib (es) | SHRD Ev,Gv,Ib (66),(es)
|
|
30: XOR Eb,Gb (ev)
|
|
31: XOR Ev,Gv (es) | XOR Ev,Gv (66),(es)
|
|
32: XOR Gb,Eb (ev)
|
|
33: XOR Gv,Ev (es) | XOR Gv,Ev (66),(es)
|
|
# CCMPSCC instructions are: CCOMB, CCOMBE, CCOMF, CCOML, CCOMLE, CCOMNB, CCOMNBE, CCOMNL, CCOMNLE,
|
|
# CCOMNO, CCOMNS, CCOMNZ, CCOMO, CCOMS, CCOMT, CCOMZ
|
|
38: CCMPSCC Eb,Gb (ev)
|
|
39: CCMPSCC Ev,Gv (es) | CCMPSCC Ev,Gv (66),(es)
|
|
3a: CCMPSCC Gv,Ev (ev)
|
|
3b: CCMPSCC Gv,Ev (es) | CCMPSCC Gv,Ev (66),(es)
|
|
40: CMOVO Gv,Ev (es) | CMOVO Gv,Ev (66),(es) | CFCMOVO Ev,Ev (es) | CFCMOVO Ev,Ev (66),(es) | SETO Eb (F2),(ev)
|
|
41: CMOVNO Gv,Ev (es) | CMOVNO Gv,Ev (66),(es) | CFCMOVNO Ev,Ev (es) | CFCMOVNO Ev,Ev (66),(es) | SETNO Eb (F2),(ev)
|
|
42: CMOVB Gv,Ev (es) | CMOVB Gv,Ev (66),(es) | CFCMOVB Ev,Ev (es) | CFCMOVB Ev,Ev (66),(es) | SETB Eb (F2),(ev)
|
|
43: CMOVNB Gv,Ev (es) | CMOVNB Gv,Ev (66),(es) | CFCMOVNB Ev,Ev (es) | CFCMOVNB Ev,Ev (66),(es) | SETNB Eb (F2),(ev)
|
|
44: CMOVZ Gv,Ev (es) | CMOVZ Gv,Ev (66),(es) | CFCMOVZ Ev,Ev (es) | CFCMOVZ Ev,Ev (66),(es) | SETZ Eb (F2),(ev)
|
|
45: CMOVNZ Gv,Ev (es) | CMOVNZ Gv,Ev (66),(es) | CFCMOVNZ Ev,Ev (es) | CFCMOVNZ Ev,Ev (66),(es) | SETNZ Eb (F2),(ev)
|
|
46: CMOVBE Gv,Ev (es) | CMOVBE Gv,Ev (66),(es) | CFCMOVBE Ev,Ev (es) | CFCMOVBE Ev,Ev (66),(es) | SETBE Eb (F2),(ev)
|
|
47: CMOVNBE Gv,Ev (es) | CMOVNBE Gv,Ev (66),(es) | CFCMOVNBE Ev,Ev (es) | CFCMOVNBE Ev,Ev (66),(es) | SETNBE Eb (F2),(ev)
|
|
48: CMOVS Gv,Ev (es) | CMOVS Gv,Ev (66),(es) | CFCMOVS Ev,Ev (es) | CFCMOVS Ev,Ev (66),(es) | SETS Eb (F2),(ev)
|
|
49: CMOVNS Gv,Ev (es) | CMOVNS Gv,Ev (66),(es) | CFCMOVNS Ev,Ev (es) | CFCMOVNS Ev,Ev (66),(es) | SETNS Eb (F2),(ev)
|
|
4a: CMOVP Gv,Ev (es) | CMOVP Gv,Ev (66),(es) | CFCMOVP Ev,Ev (es) | CFCMOVP Ev,Ev (66),(es) | SETP Eb (F2),(ev)
|
|
4b: CMOVNP Gv,Ev (es) | CMOVNP Gv,Ev (66),(es) | CFCMOVNP Ev,Ev (es) | CFCMOVNP Ev,Ev (66),(es) | SETNP Eb (F2),(ev)
|
|
4c: CMOVL Gv,Ev (es) | CMOVL Gv,Ev (66),(es) | CFCMOVL Ev,Ev (es) | CFCMOVL Ev,Ev (66),(es) | SETL Eb (F2),(ev)
|
|
4d: CMOVNL Gv,Ev (es) | CMOVNL Gv,Ev (66),(es) | CFCMOVNL Ev,Ev (es) | CFCMOVNL Ev,Ev (66),(es) | SETNL Eb (F2),(ev)
|
|
4e: CMOVLE Gv,Ev (es) | CMOVLE Gv,Ev (66),(es) | CFCMOVLE Ev,Ev (es) | CFCMOVLE Ev,Ev (66),(es) | SETLE Eb (F2),(ev)
|
|
4f: CMOVNLE Gv,Ev (es) | CMOVNLE Gv,Ev (66),(es) | CFCMOVNLE Ev,Ev (es) | CFCMOVNLE Ev,Ev (66),(es) | SETNLE Eb (F2),(ev)
|
|
60: MOVBE Gv,Ev (es) | MOVBE Gv,Ev (66),(es)
|
|
61: MOVBE Ev,Gv (es) | MOVBE Ev,Gv (66),(es)
|
|
65: WRUSSD Md,Gd (66),(ev) | WRUSSQ Mq,Gq (66),(ev)
|
|
66: ADCX Gy,Ey (66),(ev) | ADOX Gy,Ey (F3),(ev) | WRSSD Md,Gd (ev) | WRSSQ Mq,Gq (66),(ev)
|
|
69: IMUL Gv,Ev,Iz (es) | IMUL Gv,Ev,Iz (66),(es)
|
|
6b: IMUL Gv,Ev,Ib (es) | IMUL Gv,Ev,Ib (66),(es)
|
|
80: Grp1 Eb,Ib (1A),(ev)
|
|
81: Grp1 Ev,Iz (1A),(es)
|
|
83: Grp1 Ev,Ib (1A),(es)
|
|
# CTESTSCC instructions are: CTESTB, CTESTBE, CTESTF, CTESTL, CTESTLE, CTESTNB, CTESTNBE, CTESTNL,
|
|
# CTESTNLE, CTESTNO, CTESTNS, CTESTNZ, CTESTO, CTESTS, CTESTT, CTESTZ
|
|
84: CTESTSCC (ev)
|
|
85: CTESTSCC (es) | CTESTSCC (66),(es)
|
|
88: POPCNT Gv,Ev (es) | POPCNT Gv,Ev (66),(es)
|
|
8f: POP2 Bq,Rq (000),(11B),(ev)
|
|
a5: SHLD Ev,Gv,CL (es) | SHLD Ev,Gv,CL (66),(es)
|
|
ad: SHRD Ev,Gv,CL (es) | SHRD Ev,Gv,CL (66),(es)
|
|
af: IMUL Gv,Ev (es) | IMUL Gv,Ev (66),(es)
|
|
c0: Grp2 Eb,Ib (1A),(ev)
|
|
c1: Grp2 Ev,Ib (1A),(es)
|
|
d0: Grp2 Eb,1 (1A),(ev)
|
|
d1: Grp2 Ev,1 (1A),(es)
|
|
d2: Grp2 Eb,CL (1A),(ev)
|
|
d3: Grp2 Ev,CL (1A),(es)
|
|
f0: CRC32 Gy,Eb (es) | INVEPT Gq,Mdq (F3),(ev)
|
|
f1: CRC32 Gy,Ey (es) | CRC32 Gy,Ey (66),(es) | INVVPID Gy,Mdq (F3),(ev)
|
|
f2: INVPCID Gy,Mdq (F3),(ev)
|
|
f4: TZCNT Gv,Ev (es) | TZCNT Gv,Ev (66),(es)
|
|
f5: LZCNT Gv,Ev (es) | LZCNT Gv,Ev (66),(es)
|
|
f6: Grp3_1 Eb (1A),(ev)
|
|
f7: Grp3_2 Ev (1A),(es)
|
|
f8: MOVDIR64B Gv,Mdqq (66),(ev) | ENQCMD Gv,Mdqq (F2),(ev) | ENQCMDS Gv,Mdqq (F3),(ev) | URDMSR Rq,Gq (F2),(11B),(ev) | UWRMSR Gq,Rq (F3),(11B),(ev)
|
|
f9: MOVDIRI My,Gy (ev)
|
|
fe: Grp4 (1A),(ev)
|
|
ff: Grp5 (1A),(es) | PUSH2 Bq,Rq (110),(11B),(ev)
|
|
EndTable
|
|
|
|
Table: EVEX map 5
|
|
Referrer:
|
|
AVXcode: 5
|
|
10: vmovsh Vx,Hx,Wx (F3),(ev) | vmovsh Vx,Wx (F3),(ev)
|
|
11: vmovsh Wx,Hx,Vx (F3),(ev) | vmovsh Wx,Vx (F3),(ev)
|
|
1d: vcvtps2phx Vx,Wx (66),(ev) | vcvtss2sh Vx,Hx,Wx (ev)
|
|
2a: vcvtsi2sh Vx,Hx,Wx (F3),(ev)
|
|
2c: vcvttsh2si Vx,Wx (F3),(ev)
|
|
2d: vcvtsh2si Vx,Wx (F3),(ev)
|
|
2e: vucomish Vx,Wx (ev)
|
|
2f: vcomish Vx,Wx (ev)
|
|
51: vsqrtph Vx,Wx (ev) | vsqrtsh Vx,Hx,Wx (F3),(ev)
|
|
58: vaddph Vx,Hx,Wx (ev) | vaddsh Vx,Hx,Wx (F3),(ev)
|
|
59: vmulph Vx,Hx,Wx (ev) | vmulsh Vx,Hx,Wx (F3),(ev)
|
|
5a: vcvtpd2ph Vx,Wx (66),(ev) | vcvtph2pd Vx,Wx (ev) | vcvtsd2sh Vx,Hx,Wx (F2),(ev) | vcvtsh2sd Vx,Hx,Wx (F3),(ev)
|
|
5b: vcvtdq2ph Vx,Wx (ev) | vcvtph2dq Vx,Wx (66),(ev) | vcvtqq2ph Vx,Wx (ev) | vcvttph2dq Vx,Wx (F3),(ev)
|
|
5c: vsubph Vx,Hx,Wx (ev) | vsubsh Vx,Hx,Wx (F3),(ev)
|
|
5d: vminph Vx,Hx,Wx (ev) | vminsh Vx,Hx,Wx (F3),(ev)
|
|
5e: vdivph Vx,Hx,Wx (ev) | vdivsh Vx,Hx,Wx (F3),(ev)
|
|
5f: vmaxph Vx,Hx,Wx (ev) | vmaxsh Vx,Hx,Wx (F3),(ev)
|
|
6e: vmovw Vx,Wx (66),(ev)
|
|
78: vcvttph2udq Vx,Wx (ev) | vcvttph2uqq Vx,Wx (66),(ev) | vcvttsh2usi Vx,Wx (F3),(ev)
|
|
79: vcvtph2udq Vx,Wx (ev) | vcvtph2uqq Vx,Wx (66),(ev) | vcvtsh2usi Vx,Wx (F3),(ev)
|
|
7a: vcvttph2qq Vx,Wx (66),(ev) | vcvtudq2ph Vx,Wx (F2),(ev) | vcvtuqq2ph Vx,Wx (F2),(ev)
|
|
7b: vcvtph2qq Vx,Wx (66),(ev) | vcvtusi2sh Vx,Hx,Wx (F3),(ev)
|
|
7c: vcvttph2uw Vx,Wx (ev) | vcvttph2w Vx,Wx (66),(ev)
|
|
7d: vcvtph2uw Vx,Wx (ev) | vcvtph2w Vx,Wx (66),(ev) | vcvtuw2ph Vx,Wx (F2),(ev) | vcvtw2ph Vx,Wx (F3),(ev)
|
|
7e: vmovw Wx,Vx (66),(ev)
|
|
EndTable
|
|
|
|
Table: EVEX map 6
|
|
Referrer:
|
|
AVXcode: 6
|
|
13: vcvtph2psx Vx,Wx (66),(ev) | vcvtsh2ss Vx,Hx,Wx (ev)
|
|
2c: vscalefph Vx,Hx,Wx (66),(ev)
|
|
2d: vscalefsh Vx,Hx,Wx (66),(ev)
|
|
42: vgetexpph Vx,Wx (66),(ev)
|
|
43: vgetexpsh Vx,Hx,Wx (66),(ev)
|
|
4c: vrcpph Vx,Wx (66),(ev)
|
|
4d: vrcpsh Vx,Hx,Wx (66),(ev)
|
|
4e: vrsqrtph Vx,Wx (66),(ev)
|
|
4f: vrsqrtsh Vx,Hx,Wx (66),(ev)
|
|
56: vfcmaddcph Vx,Hx,Wx (F2),(ev) | vfmaddcph Vx,Hx,Wx (F3),(ev)
|
|
57: vfcmaddcsh Vx,Hx,Wx (F2),(ev) | vfmaddcsh Vx,Hx,Wx (F3),(ev)
|
|
96: vfmaddsub132ph Vx,Hx,Wx (66),(ev)
|
|
97: vfmsubadd132ph Vx,Hx,Wx (66),(ev)
|
|
98: vfmadd132ph Vx,Hx,Wx (66),(ev)
|
|
99: vfmadd132sh Vx,Hx,Wx (66),(ev)
|
|
9a: vfmsub132ph Vx,Hx,Wx (66),(ev)
|
|
9b: vfmsub132sh Vx,Hx,Wx (66),(ev)
|
|
9c: vfnmadd132ph Vx,Hx,Wx (66),(ev)
|
|
9d: vfnmadd132sh Vx,Hx,Wx (66),(ev)
|
|
9e: vfnmsub132ph Vx,Hx,Wx (66),(ev)
|
|
9f: vfnmsub132sh Vx,Hx,Wx (66),(ev)
|
|
a6: vfmaddsub213ph Vx,Hx,Wx (66),(ev)
|
|
a7: vfmsubadd213ph Vx,Hx,Wx (66),(ev)
|
|
a8: vfmadd213ph Vx,Hx,Wx (66),(ev)
|
|
a9: vfmadd213sh Vx,Hx,Wx (66),(ev)
|
|
aa: vfmsub213ph Vx,Hx,Wx (66),(ev)
|
|
ab: vfmsub213sh Vx,Hx,Wx (66),(ev)
|
|
ac: vfnmadd213ph Vx,Hx,Wx (66),(ev)
|
|
ad: vfnmadd213sh Vx,Hx,Wx (66),(ev)
|
|
ae: vfnmsub213ph Vx,Hx,Wx (66),(ev)
|
|
af: vfnmsub213sh Vx,Hx,Wx (66),(ev)
|
|
b6: vfmaddsub231ph Vx,Hx,Wx (66),(ev)
|
|
b7: vfmsubadd231ph Vx,Hx,Wx (66),(ev)
|
|
b8: vfmadd231ph Vx,Hx,Wx (66),(ev)
|
|
b9: vfmadd231sh Vx,Hx,Wx (66),(ev)
|
|
ba: vfmsub231ph Vx,Hx,Wx (66),(ev)
|
|
bb: vfmsub231sh Vx,Hx,Wx (66),(ev)
|
|
bc: vfnmadd231ph Vx,Hx,Wx (66),(ev)
|
|
bd: vfnmadd231sh Vx,Hx,Wx (66),(ev)
|
|
be: vfnmsub231ph Vx,Hx,Wx (66),(ev)
|
|
bf: vfnmsub231sh Vx,Hx,Wx (66),(ev)
|
|
d6: vfcmulcph Vx,Hx,Wx (F2),(ev) | vfmulcph Vx,Hx,Wx (F3),(ev)
|
|
d7: vfcmulcsh Vx,Hx,Wx (F2),(ev) | vfmulcsh Vx,Hx,Wx (F3),(ev)
|
|
EndTable
|
|
|
|
Table: VEX map 7
|
|
Referrer:
|
|
AVXcode: 7
|
|
f8: URDMSR Rq,Id (F2),(v1),(11B) | UWRMSR Id,Rq (F3),(v1),(11B)
|
|
EndTable
|
|
|
|
GrpTable: Grp1
|
|
0: ADD
|
|
1: OR
|
|
2: ADC
|
|
3: SBB
|
|
4: AND
|
|
5: SUB
|
|
6: XOR
|
|
7: CMP
|
|
EndTable
|
|
|
|
GrpTable: Grp1A
|
|
0: POP
|
|
EndTable
|
|
|
|
GrpTable: Grp2
|
|
0: ROL
|
|
1: ROR
|
|
2: RCL
|
|
3: RCR
|
|
4: SHL/SAL
|
|
5: SHR
|
|
6:
|
|
7: SAR
|
|
EndTable
|
|
|
|
GrpTable: Grp3_1
|
|
0: TEST Eb,Ib
|
|
1: TEST Eb,Ib
|
|
2: NOT Eb
|
|
3: NEG Eb
|
|
4: MUL AL,Eb
|
|
5: IMUL AL,Eb
|
|
6: DIV AL,Eb
|
|
7: IDIV AL,Eb
|
|
EndTable
|
|
|
|
GrpTable: Grp3_2
|
|
0: TEST Ev,Iz
|
|
1: TEST Ev,Iz
|
|
2: NOT Ev
|
|
3: NEG Ev
|
|
4: MUL rAX,Ev
|
|
5: IMUL rAX,Ev
|
|
6: DIV rAX,Ev
|
|
7: IDIV rAX,Ev
|
|
EndTable
|
|
|
|
GrpTable: Grp4
|
|
0: INC Eb
|
|
1: DEC Eb
|
|
EndTable
|
|
|
|
GrpTable: Grp5
|
|
0: INC Ev
|
|
1: DEC Ev
|
|
# Note: "forced64" is Intel CPU behavior (see comment about CALL insn).
|
|
2: CALLN Ev (f64)
|
|
3: CALLF Ep
|
|
4: JMPN Ev (f64)
|
|
5: JMPF Mp
|
|
6: PUSH Ev (d64)
|
|
7:
|
|
EndTable
|
|
|
|
GrpTable: Grp6
|
|
0: SLDT Rv/Mw
|
|
1: STR Rv/Mw
|
|
2: LLDT Ew
|
|
3: LTR Ew
|
|
4: VERR Ew
|
|
5: VERW Ew
|
|
6: LKGS Ew (F2)
|
|
EndTable
|
|
|
|
GrpTable: Grp7
|
|
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) | WRMSRNS (110),(11B) | RDMSRLIST (F2),(110),(11B) | WRMSRLIST (F3),(110),(11B) | PBNDKB (111),(11B)
|
|
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) | ERETU (F3),(010),(11B) | ERETS (F2),(010),(11B)
|
|
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
|
|
3: LIDT Ms
|
|
4: SMSW Mw/Rv
|
|
5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B)
|
|
6: LMSW Ew
|
|
7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
|
|
EndTable
|
|
|
|
GrpTable: Grp8
|
|
4: BT
|
|
5: BTS
|
|
6: BTR
|
|
7: BTC
|
|
EndTable
|
|
|
|
GrpTable: Grp9
|
|
1: CMPXCHG8B/16B Mq/Mdq
|
|
3: xrstors
|
|
4: xsavec
|
|
5: xsaves
|
|
6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3)
|
|
7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
|
|
EndTable
|
|
|
|
GrpTable: Grp10
|
|
# all are UD1
|
|
0: UD1
|
|
1: UD1
|
|
2: UD1
|
|
3: UD1
|
|
4: UD1
|
|
5: UD1
|
|
6: UD1
|
|
7: UD1
|
|
EndTable
|
|
|
|
# Grp11A and Grp11B are expressed as Grp11 in Intel SDM
|
|
GrpTable: Grp11A
|
|
0: MOV Eb,Ib
|
|
7: XABORT Ib (000),(11B)
|
|
EndTable
|
|
|
|
GrpTable: Grp11B
|
|
0: MOV Eb,Iz
|
|
7: XBEGIN Jz (000),(11B)
|
|
EndTable
|
|
|
|
GrpTable: Grp12
|
|
2: psrlw Nq,Ib (11B) | vpsrlw Hx,Ux,Ib (66),(11B),(v1)
|
|
4: psraw Nq,Ib (11B) | vpsraw Hx,Ux,Ib (66),(11B),(v1)
|
|
6: psllw Nq,Ib (11B) | vpsllw Hx,Ux,Ib (66),(11B),(v1)
|
|
EndTable
|
|
|
|
GrpTable: Grp13
|
|
0: vprord/q Hx,Wx,Ib (66),(ev)
|
|
1: vprold/q Hx,Wx,Ib (66),(ev)
|
|
2: psrld Nq,Ib (11B) | vpsrld Hx,Ux,Ib (66),(11B),(v1)
|
|
4: psrad Nq,Ib (11B) | vpsrad Hx,Ux,Ib (66),(11B),(v1) | vpsrad/q Hx,Ux,Ib (66),(evo)
|
|
6: pslld Nq,Ib (11B) | vpslld Hx,Ux,Ib (66),(11B),(v1)
|
|
EndTable
|
|
|
|
GrpTable: Grp14
|
|
2: psrlq Nq,Ib (11B) | vpsrlq Hx,Ux,Ib (66),(11B),(v1)
|
|
3: vpsrldq Hx,Ux,Ib (66),(11B),(v1)
|
|
6: psllq Nq,Ib (11B) | vpsllq Hx,Ux,Ib (66),(11B),(v1)
|
|
7: vpslldq Hx,Ux,Ib (66),(11B),(v1)
|
|
EndTable
|
|
|
|
GrpTable: Grp15
|
|
0: fxsave | RDFSBASE Ry (F3),(11B)
|
|
1: fxstor | RDGSBASE Ry (F3),(11B)
|
|
2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B)
|
|
3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
|
|
4: XSAVE | ptwrite Ey (F3),(11B)
|
|
5: XRSTOR | lfence (11B) | INCSSPD/Q Ry (F3),(11B)
|
|
6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) | CLRSSBSY Mq (F3)
|
|
7: clflush | clflushopt (66) | sfence (11B)
|
|
EndTable
|
|
|
|
GrpTable: Grp16
|
|
0: prefetch NTA
|
|
1: prefetch T0
|
|
2: prefetch T1
|
|
3: prefetch T2
|
|
6: prefetch IT1
|
|
7: prefetch IT0
|
|
EndTable
|
|
|
|
GrpTable: Grp17
|
|
1: BLSR By,Ey (v)
|
|
2: BLSMSK By,Ey (v)
|
|
3: BLSI By,Ey (v)
|
|
EndTable
|
|
|
|
GrpTable: Grp18
|
|
1: vgatherpf0dps/d Wx (66),(ev)
|
|
2: vgatherpf1dps/d Wx (66),(ev)
|
|
5: vscatterpf0dps/d Wx (66),(ev)
|
|
6: vscatterpf1dps/d Wx (66),(ev)
|
|
EndTable
|
|
|
|
GrpTable: Grp19
|
|
1: vgatherpf0qps/d Wx (66),(ev)
|
|
2: vgatherpf1qps/d Wx (66),(ev)
|
|
5: vscatterpf0qps/d Wx (66),(ev)
|
|
6: vscatterpf1qps/d Wx (66),(ev)
|
|
EndTable
|
|
|
|
GrpTable: Grp20
|
|
0: cldemote Mb
|
|
EndTable
|
|
|
|
GrpTable: Grp21
|
|
1: RDSSPD/Q Ry (F3),(11B)
|
|
7: ENDBR64 (F3),(010),(11B) | ENDBR32 (F3),(011),(11B)
|
|
EndTable
|
|
|
|
# AMD's Prefetch Group
|
|
GrpTable: GrpP
|
|
0: PREFETCH
|
|
1: PREFETCHW
|
|
EndTable
|
|
|
|
GrpTable: GrpPDLK
|
|
0: MONTMUL
|
|
1: XSHA1
|
|
2: XSHA2
|
|
EndTable
|
|
|
|
GrpTable: GrpRNG
|
|
0: xstore-rng
|
|
1: xcrypt-ecb
|
|
2: xcrypt-cbc
|
|
4: xcrypt-cfb
|
|
5: xcrypt-ofb
|
|
EndTable
|