Arnd Bergmann 0a7c2fda34 clk: sophgo: avoid open-coded 64-bit division ... On 32-bit architectures, the 64-bit division leads to a link failure: arm-linux-gnueabi-ld: drivers/clk/sophgo/clk-cv18xx-pll.o: in function `fpll_calc_rate': clk-cv18xx-pll.c:(.text.fpll_calc_rate+0x26): undefined reference to `__aeabi_uldivmod' This one is not called in a fast path, and there is already another div_u64() variant used in the same function, so convert it to div64_u64_rem(). Fixes: 80fd61ec46 ("clk: sophgo: Add clock support for CV1800 SoC") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20240415134532.3467817-1-arnd@kernel.org Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404122344.d5pb2N1I-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202404140310.QEjZKtTN-lkp@intel.com/ Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2024-04-19 14:38:01 -07:00
..
clk-cv18xx-common.c
clk-cv18xx-common.h
clk-cv18xx-ip.c
clk-cv18xx-ip.h
clk-cv18xx-pll.c	clk: sophgo: avoid open-coded 64-bit division	2024-04-19 14:38:01 -07:00
clk-cv18xx-pll.h
clk-cv1800.c	clk: sophgo: Make synthesizer struct static	2024-04-11 22:51:24 -07:00
clk-cv1800.h
Kconfig
Makefile