mirror of
https://github.com/torvalds/linux.git
synced 2024-12-01 00:21:32 +00:00
003910ebc8
SoC family such as DRA7 family of processors have, in addition to the regular muxing of pins (as done by pinctrl-single), a separate hardware module called IODelay which is also expected to be configured. The "IODelay" module has it's own register space that is independent of the control module and the padconf register area. With recent changes to the pinctrl framework, we can now support this hardware with a reasonably minimal driver by using #pinctrl-cells, GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS. It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay reconfiguration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do as little of muxing as absolutely necessary without I/O isolation (which can only be done in initial stages of bootloader). NOTE: with the system wide I/O isolation scheme present in DRA7 SoC family, it is not reasonable to do stop all I/O operations for every such pad configuration scheme. So, we will let it glitch when used in this mode. Even with the above limitation, certain functionality such as MMC has mandatory need for IODelay reconfiguration requirements, depending on speed of transfer. In these cases, with careful examination of usecase involved, the expected glitch can be controlled such that it does not impact functionality. In short, IODelay module support as a padconf driver being introduced here is not expected to do SoC wide I/O Isolation and is meant for a limited subset of IODelay configuration requirements that need to be dynamic and whose glitchy behavior will not cause functionality failure for that interface. IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared to 0x0 at all times, even when configuring Manual IO Timing Modes. This is done by eliminating the LOCK_BIT=1 setting from Step of the Manual IO timing Mode configuration procedure. This option leaves the CFG_* registers unprotected from unintended writes to the CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured. This approach is taken to allow for a generic driver to exist in kernel world that has to be used carefully in required usecases. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [tony@atomide.com: updated to use generic pinctrl functions, added binding documentation, updated comments] Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
319 lines
7.6 KiB
Plaintext
319 lines
7.6 KiB
Plaintext
#
|
|
# PINCTRL infrastructure and drivers
|
|
#
|
|
|
|
config PINCTRL
|
|
bool
|
|
|
|
menu "Pin controllers"
|
|
depends on PINCTRL
|
|
|
|
config GENERIC_PINCTRL_GROUPS
|
|
bool
|
|
|
|
config PINMUX
|
|
bool "Support pin multiplexing controllers" if COMPILE_TEST
|
|
|
|
config GENERIC_PINMUX_FUNCTIONS
|
|
bool
|
|
select PINMUX
|
|
|
|
config PINCONF
|
|
bool "Support pin configuration controllers" if COMPILE_TEST
|
|
|
|
config GENERIC_PINCONF
|
|
bool
|
|
select PINCONF
|
|
|
|
config DEBUG_PINCTRL
|
|
bool "Debug PINCTRL calls"
|
|
depends on DEBUG_KERNEL
|
|
help
|
|
Say Y here to add some extra checks and diagnostics to PINCTRL calls.
|
|
|
|
config PINCTRL_ADI2
|
|
bool "ADI pin controller driver"
|
|
depends on BLACKFIN
|
|
select PINMUX
|
|
select IRQ_DOMAIN
|
|
help
|
|
This is the pin controller and gpio driver for ADI BF54x, BF60x and
|
|
future processors. This option is selected automatically when specific
|
|
machine and arch are selected to build.
|
|
|
|
config PINCTRL_AS3722
|
|
tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
|
|
depends on MFD_AS3722 && GPIOLIB
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
AS3722 device supports the configuration of GPIO pins for different
|
|
functionality. This driver supports the pinmux, push-pull and
|
|
open drain configuration for the GPIO pins of AS3722 devices. It also
|
|
supports the GPIO functionality through gpiolib.
|
|
|
|
config PINCTRL_BF54x
|
|
def_bool y if BF54x
|
|
select PINCTRL_ADI2
|
|
|
|
config PINCTRL_BF60x
|
|
def_bool y if BF60x
|
|
select PINCTRL_ADI2
|
|
|
|
config PINCTRL_AT91
|
|
bool "AT91 pinctrl driver"
|
|
depends on OF
|
|
depends on ARCH_AT91
|
|
select PINMUX
|
|
select PINCONF
|
|
select GPIOLIB
|
|
select OF_GPIO
|
|
select GPIOLIB_IRQCHIP
|
|
help
|
|
Say Y here to enable the at91 pinctrl driver
|
|
|
|
config PINCTRL_AT91PIO4
|
|
bool "AT91 PIO4 pinctrl driver"
|
|
depends on OF
|
|
depends on ARCH_AT91
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB
|
|
select GPIOLIB_IRQCHIP
|
|
select OF_GPIO
|
|
help
|
|
Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4
|
|
controller available on sama5d2 SoC.
|
|
|
|
config PINCTRL_AMD
|
|
tristate "AMD GPIO pin control"
|
|
depends on GPIOLIB
|
|
select GPIOLIB_IRQCHIP
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
help
|
|
driver for memory mapped GPIO functionality on AMD platforms
|
|
(x86 or arm).Most pins are usually muxed to some other
|
|
functionality by firmware,so only a small amount is available
|
|
for gpio use.
|
|
|
|
Requires ACPI/FDT device enumeration code to set up a platform
|
|
device.
|
|
|
|
config PINCTRL_DA850_PUPD
|
|
tristate "TI DA850/OMAP-L138/AM18XX pullup/pulldown groups"
|
|
depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST)
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
help
|
|
Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control
|
|
pullup/pulldown pin groups.
|
|
|
|
config PINCTRL_DIGICOLOR
|
|
bool
|
|
depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST)
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
|
|
config PINCTRL_LANTIQ
|
|
bool
|
|
depends on LANTIQ
|
|
select PINMUX
|
|
select PINCONF
|
|
|
|
config PINCTRL_LPC18XX
|
|
bool "NXP LPC18XX/43XX SCU pinctrl driver"
|
|
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
|
|
default ARCH_LPC18XX
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
|
|
|
|
config PINCTRL_FALCON
|
|
bool
|
|
depends on SOC_FALCON
|
|
depends on PINCTRL_LANTIQ
|
|
|
|
config PINCTRL_MESON
|
|
bool
|
|
depends on OF
|
|
select PINMUX
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB
|
|
select OF_GPIO
|
|
select REGMAP_MMIO
|
|
|
|
config PINCTRL_OXNAS
|
|
bool
|
|
depends on OF
|
|
select PINMUX
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB
|
|
select OF_GPIO
|
|
select GPIOLIB_IRQCHIP
|
|
select MFD_SYSCON
|
|
|
|
config PINCTRL_ROCKCHIP
|
|
bool
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
select GENERIC_IRQ_CHIP
|
|
select MFD_SYSCON
|
|
|
|
config PINCTRL_SINGLE
|
|
tristate "One-register-per-pin type device tree based pinctrl driver"
|
|
depends on OF
|
|
select GENERIC_PINCTRL_GROUPS
|
|
select GENERIC_PINMUX_FUNCTIONS
|
|
select GENERIC_PINCONF
|
|
help
|
|
This selects the device tree based generic pinctrl driver.
|
|
|
|
config PINCTRL_SIRF
|
|
bool "CSR SiRFprimaII pin controller driver"
|
|
depends on ARCH_SIRF
|
|
select PINMUX
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB_IRQCHIP
|
|
|
|
config PINCTRL_SX150X
|
|
bool "Semtech SX150x I2C GPIO expander pinctrl driver"
|
|
depends on GPIOLIB && I2C=y
|
|
select PINMUX
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB_IRQCHIP
|
|
select REGMAP
|
|
help
|
|
Say yes here to provide support for Semtech SX150x-series I2C
|
|
GPIO expanders as pinctrl module.
|
|
Compatible models include:
|
|
- 8 bits: sx1508q, sx1502q
|
|
- 16 bits: sx1509q, sx1506q
|
|
|
|
config PINCTRL_PISTACHIO
|
|
def_bool y if MACH_PISTACHIO
|
|
depends on GPIOLIB
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB_IRQCHIP
|
|
select OF_GPIO
|
|
|
|
config PINCTRL_ST
|
|
bool
|
|
depends on OF
|
|
select PINMUX
|
|
select PINCONF
|
|
select GPIOLIB_IRQCHIP
|
|
|
|
config PINCTRL_TZ1090
|
|
bool "Toumaz Xenif TZ1090 pin control driver"
|
|
depends on SOC_TZ1090
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
|
|
config PINCTRL_TZ1090_PDC
|
|
bool "Toumaz Xenif TZ1090 PDC pin control driver"
|
|
depends on SOC_TZ1090
|
|
select PINMUX
|
|
select PINCONF
|
|
|
|
config PINCTRL_U300
|
|
bool "U300 pin controller driver"
|
|
depends on ARCH_U300
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
|
|
config PINCTRL_COH901
|
|
bool "ST-Ericsson U300 COH 901 335/571 GPIO"
|
|
depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
|
|
select GPIOLIB_IRQCHIP
|
|
help
|
|
Say yes here to support GPIO interface on ST-Ericsson U300.
|
|
The names of the two IP block variants supported are
|
|
COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
|
|
ports of 8 GPIO pins each.
|
|
|
|
config PINCTRL_MAX77620
|
|
tristate "MAX77620/MAX20024 Pincontrol support"
|
|
depends on MFD_MAX77620 && OF
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
|
|
This PMIC has 8 GPIO pins that work as GPIO as well as special
|
|
function in alternate mode. This driver also configure push-pull,
|
|
open drain, FPS slots etc.
|
|
|
|
config PINCTRL_PALMAS
|
|
tristate "Pinctrl driver for the PALMAS Series MFD devices"
|
|
depends on OF && MFD_PALMAS
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
Palmas device supports the configuration of pins for different
|
|
functionality. This driver supports the pinmux, push-pull and
|
|
open drain configuration for the Palmas series devices like
|
|
TPS65913, TPS80036 etc.
|
|
|
|
config PINCTRL_PIC32
|
|
bool "Microchip PIC32 pin controller driver"
|
|
depends on OF
|
|
depends on MACH_PIC32
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
select GPIOLIB_IRQCHIP
|
|
select OF_GPIO
|
|
help
|
|
This is the pin controller and gpio driver for Microchip PIC32
|
|
microcontrollers. This option is selected automatically when specific
|
|
machine and arch are selected to build.
|
|
|
|
config PINCTRL_PIC32MZDA
|
|
def_bool y if PIC32MZDA
|
|
select PINCTRL_PIC32
|
|
|
|
config PINCTRL_ZYNQ
|
|
bool "Pinctrl driver for Xilinx Zynq"
|
|
depends on ARCH_ZYNQ
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
This selects the pinctrl driver for Xilinx Zynq.
|
|
|
|
source "drivers/pinctrl/aspeed/Kconfig"
|
|
source "drivers/pinctrl/bcm/Kconfig"
|
|
source "drivers/pinctrl/berlin/Kconfig"
|
|
source "drivers/pinctrl/freescale/Kconfig"
|
|
source "drivers/pinctrl/intel/Kconfig"
|
|
source "drivers/pinctrl/mvebu/Kconfig"
|
|
source "drivers/pinctrl/nomadik/Kconfig"
|
|
source "drivers/pinctrl/pxa/Kconfig"
|
|
source "drivers/pinctrl/qcom/Kconfig"
|
|
source "drivers/pinctrl/samsung/Kconfig"
|
|
source "drivers/pinctrl/sh-pfc/Kconfig"
|
|
source "drivers/pinctrl/spear/Kconfig"
|
|
source "drivers/pinctrl/stm32/Kconfig"
|
|
source "drivers/pinctrl/sunxi/Kconfig"
|
|
source "drivers/pinctrl/tegra/Kconfig"
|
|
source "drivers/pinctrl/ti/Kconfig"
|
|
source "drivers/pinctrl/uniphier/Kconfig"
|
|
source "drivers/pinctrl/vt8500/Kconfig"
|
|
source "drivers/pinctrl/mediatek/Kconfig"
|
|
|
|
config PINCTRL_XWAY
|
|
bool
|
|
depends on SOC_TYPE_XWAY
|
|
depends on PINCTRL_LANTIQ
|
|
|
|
config PINCTRL_TB10X
|
|
bool
|
|
depends on OF && ARC_PLAT_TB10X
|
|
select GPIOLIB
|
|
|
|
endmenu
|