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Add a VMX optimised xor, used primarily for RAID5. On a POWER7 blade this is a decent win: 32regs : 17932.800 MB/sec altivec : 19724.800 MB/sec The bigger gain is when the same test is run in SMT4 mode, as it would if there was a lot of work going on: 8regs : 8377.600 MB/sec altivec : 15801.600 MB/sec I tested this against an array created without the patch, and also verified it worked as expected on a little endian kernel. [ Fix !CONFIG_ALTIVEC build -- BenH ] Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
45 lines
1.1 KiB
Makefile
45 lines
1.1 KiB
Makefile
#
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# Makefile for ppc-specific library files..
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#
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subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
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CFLAGS_REMOVE_code-patching.o = -pg
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CFLAGS_REMOVE_feature-fixups.o = -pg
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obj-y := string.o alloc.o \
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crtsavres.o
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obj-$(CONFIG_PPC32) += div64.o copy_32.o
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obj-$(CONFIG_HAS_IOMEM) += devres.o
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obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
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usercopy_64.o mem_64.o string.o \
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hweight_64.o \
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copyuser_power7.o string_64.o copypage_power7.o
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ifeq ($(CONFIG_GENERIC_CSUM),)
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obj-y += checksum_$(CONFIG_WORD_SIZE).o
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obj-$(CONFIG_PPC64) += checksum_wrappers_64.o
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endif
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ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),)
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obj-$(CONFIG_PPC64) += memcpy_power7.o memcpy_64.o
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endif
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obj-$(CONFIG_PPC_EMULATE_SSTEP) += sstep.o ldstfp.o
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ifeq ($(CONFIG_PPC64),y)
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obj-$(CONFIG_SMP) += locks.o
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obj-$(CONFIG_ALTIVEC) += vmx-helper.o
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endif
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obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
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obj-y += code-patching.o
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obj-y += feature-fixups.o
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obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
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obj-$(CONFIG_ALTIVEC) += xor_vmx.o
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CFLAGS_xor_vmx.o += -maltivec -mabi=altivec
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